AOZ1283PI [AOS]
EZBuck⢠2.5A Simple Buck Regulator; EZBuckâ ?? ¢简单2.5A降压稳压器
| 型号： | AOZ1283PI |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | EZBuck⢠2.5A Simple Buck Regulator |
| 文件： | 总15页 (文件大小：917K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOZ1283
EZBuck™ 2.5A Simple Buck Regulator
General Description
Features
The AOZ1283 is a high voltage, high efficiency, simple to
use, 2.5A buck regulator optimized for a variety of
applications. The AOZ1283 works from a 3.0V to 36V
input voltage range, and provides up to 2.5A of
continuous output current. The output voltage is
adjustable from 30V down to 0.8V.
3.0V to 36V operating input voltage range
50mΩ internal NMOS
Up to 95% efficiency
Adjustable soft-start
Output voltage adjustable from 0.8V to 30V
2.5A continuous output current
Adjustable switching frequency from 200kHz to 2MHz
Cycle-by-cycle current limit
Short-circuit protection
The AOZ1283 integrates an N-channel high-side power
MOSFET. The switching frequency can set from 200kHz
to 2MHz with an external resistor. The soft-start time can
be set with an external capacitor.
Over-voltage protection
Over-temperature protection
EPAD SO-8 package
Applications
Point-of-load DC/DC conversion
Set top boxes and cable modems
DVD drives and HDDs
LCD Monitors & TVs
Telecom/Networking/Datacom equipment
Typical Application
VIN up to 36V
CSS
CIN
VIN
FSW
BS
SS
L1
VOUT
LX
FB
22µH
R1
RF
AOZ1283
CO
EN
COMP
R2
GND
CC
RC
Figure 1. 36V/2.5A Buck Regulator
Rev. 0.4 June 2012
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Page 1 of 15
AOZ1283
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
Green Product
AOZ1283PI
-40 °C to +85 °C
EPAD SO-8
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
1
2
3
4
8
7
6
5
LX
BST
EN
SS
Exposed
PAD
GND
FSW
FB
VIN
COMP
Pin Description
Pin Number
Pin Name
Pin Function
1
2
LX
PWM Output. Connect to inductor.
BST
Bootstrap Voltage Input. Driver supply for High-side NMOS. Connected to 100nF
capacitor between BST and LX.
3
4
5
6
GND
FSW
COMP
FB
Ground.
Frequency Bias. Connect to resistor to determine switching frequency.
Compensation. Connect to resistor and capacitor for system stability.
Feedback Input. It is regulated to 0.8V. The FB pin is used to determine the PWM output
voltage via a resistor divider between the output and GND.
7
SS
EN
VIN
Soft Start.
8
Enable.
Exposed Pad
Supply Voltage Input.
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Page 2 of 15
AOZ1283
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
Recommended Operating Conditions
The device is not guaranteed to operate beyond the
Recommended Operating Conditions.
Parameter
Supply Voltage (VIN)
Rating
Parameter
Supply Voltage (VIN)
Output Voltage (VOUT
Rating
40V
3.0V to 36V
0.8V to VIN*0.85V
-40°C to +85°C
LX to GND
-0.7V to VIN+ 0.3V
-0.3V to +6V
-0.3V to VLX + 6V
+150°C
)
EN, SS, FB and COMP to GND
BST to GND
Ambient Temperature (TA)
Package Thermal Resistance
EPAD SO-8 (JA
)
50°C/W
Junction Temperature (TJ)
Storage Temperature (TS)
ESD Rating(1)
-65°C to +150°C
2kV
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k
Ω in series with 100pF.
Electrical Characteristics
TA = 25 °C, VIN = 12V, VEN = 3V, VOUT = 3.3V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C. These specifications are guaranteed by design.
Symbol
Parameter
Supply Voltage
Conditions
Min.
3
Typ.
Max.
Units
VIN
36
V
VUVLO
Input Under-Voltage Lockout Threshold
VIN rising
VIN falling
2.9
V
V
2.3
IIN
Supply Current (Quiescent)
Shutdown Supply Current
Feedback Voltage
IOUT = 0, VFB = 1V, VEN > 1.2V
VEN = 0V
1
1.5
10
mA
A
IOFF
VFB
TA = 25ºC
788
800
0.5
812
mV
%
VFB_LOAD Load Regulation
VFB_LINE Line Regulation
0.4A < Load < 3.6A
Load = 2A
0.03
0.8
%/V
A
IFB
Feedback Voltage Input Current
VFB = 800mV
ENABLE
VEN_OFF EN Input Threshold
VEN_ON
Off threshold
On threshold
0.4
V
V
1.2
VEN_HYS EN Input Hysteresis
CURRENT LIMIT
200
4
mV
Peak Current Limit
3
2
A
SOFT START (SS)
ISS
Soft Start Source Current
2.5
3
A
MODULATOR
fO
Frequency
RF = 270kꢀ
RF = 46.6kꢀ
RF = 20kꢀ
160
0.8
1.6
200
1
2
240
1.2
2.4
kHz
MHz
MHz
DMAX
Maximum Duty Cycle
fO = 1MHz
87
%
ns
TON_MIN Minimum On Time
150
500
170
4.5
GVEA
GEA
Error Amplifier Voltage Gain
V/V
A/V
A/V
Error Amplifier Transconductance
GCS
Current Sense Circuit Transconductance
Rev. 0.4 June 2012
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Page 3 of 15
AOZ1283
Electrical Characteristics (continued)
TA = 25 °C, VIN = 12V, VEN = 3V, VOUT = 3.3V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C. These specifications are guaranteed by design.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
POWER STATE OUTPUT
ILEAKAGE NMOS Leakage
RDS(ON) NMOS On-Resistance
THERMAL PROTECTION
VEN = 0V, VLX = 0V
10
70
A
VIN = 12V
50
mꢀ
TSD
Thermal Shutdown Threshold
145
45
°C
°C
TSD_HYS Thermal Shutdown Hysteresis
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Page 4 of 15
AOZ1283
Block Diagram
VIN
FSW
Regulator
Current
Sense
BST
LDO
Enable
Detect
BST
SoftStart
EN
Ramp
Generator
OC
SS
CLK
OSC
Driver
FB
PWM
Logic
LX
0.8V
Error
Amplifier
PWM
Comparator
GND
COMP
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Page 5 of 15
AOZ1283
Typical Performance Characteristics
TA = 25°C, VIN = 24V, VEN = 5V, VOUT = 5V, unless otherwise specified.
Full Load Operation
Light Load Operation
IN Ripple
Voltage
(1V/div)
IN Ripple
Voltage
(1V/div)
OUT Ripple
Voltage
(1V/div)
OUT Ripple
Voltage
(1V/div)
LX
Voltage
(20V/div)
LX
Voltage
(20V/div)
Inductor
Current
(2A/div)
Inductor
Current
(1A/div)
1µs/div
1µs/div
Start Up to Full Load
Short Circuit Protection
LX
Voltage
(20V/div)
OUT
Voltage
(2V/div)
OUT
Voltage
(2V/div)
IN
Current
(1A/div)
Inductor
Current
(5A/div)
10ms/div
5ms/div
50% to 100% Load Transient
Short Circuit Recovery
LX
Voltage
(20V/div)
OUT
Voltage
(0.5V/div)
OUT
Voltage
(2V/div)
OUT
Current
(1A/div)
Inductor
Current
(5A/div)
10ms/div
100µs/div
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Page 6 of 15
AOZ1283
Efficiency Curves
Efficiency (Vo=5V, fs=600kHz)
vs. Load Current
95
90
85
80
75
12V–5V
36V–5V
24V–5V
70
65
60
0
0.5
1.0
1.5
2.0
2.5
Load Current (A)
Efficiency (Vo=3.3V, fs=600kHz)
vs. Load Current
100
95
5V–3.3V
12V–3.3V
90
85
80
75
70
65
60
36V–3.3V
24V–3.3V
0
0.5
1.0
1.5
2.0
2.5
Load Current (A)
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Page 7 of 15
AOZ1283
Detailed Description
The AOZ1283 is a current-mode step down regulator
with integrated high side NMOS switch. It operates from
a 3V to 36V input voltage range and supplies up to 4A of
load current. Features include enable control, Power-On
Reset, input under voltage lockout, external soft-start and
thermal shut down.
less than the error voltage, the internal high-side switch
is on. The inductor current flows from the input through
the inductor to the output. When the current signal
exceeds the error voltage, the high-side switch is off. The
inductor current is freewheeling through the Schottky
diode to output.
The AOZ1283 is available in EPAD SO-8 package.
Switching Frequency
The AOZ1283PI switching frequency can be
programmed by an external resistor. The external
resistor value can be calculated by the following formula:
Enable and Soft Start
The AOZ1283 has external soft start feature to limit in-
rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 3V and voltage on
EN pin is HIGH. In soft start process, a 2.5µA internal
current source charges the external capacitor at SS. As
the SS capacitor is charged, the voltage at SS rises. The
SS voltage clamps the reference voltage of the error
amplifier, therefore output voltage rising time follows the
SS pin voltage. With the slow ramping up output voltage,
the inrush current can be prevented. Minimum external
soft-start capacitor 850pF is required, and the
5000
---------------------
RFk =
– 5k
f kHz
O
Some standard values of RF for most commonly used
switching frequency are listed in Table 1.
fo (Hz)
RF (kΩ)
200k
500k
1M
249
100
46.6
20
corresponding soft-start time is about 200µs.
2M
The EN pin of the AOZ1283 is active high. Connect the
EN pin to a voltage between 1.2V to 5V if enable function
is not used. Pull it to ground will disable the AOZ1283.
Do not leave it open. The voltage on EN pin must be
above 1.2V to enable the AOZ1283. When voltage on EN
pin falls below 0.4V, the AOZ1283 is disabled. If an
application circuit requires the AOZ1283 to be disabled,
an open drain or open collector circuit should be used to
interface to EN pin.
Table 1.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network. In the
application circuit shown in Figure 1. The resistor divider
network includes R1 and R2. Usually, a design is started
by picking a fixed R2 value and calculating the required
R1 with equation below.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM).
R
1
------
V
= 0.8 1 +
O
R
2
The AOZ1283 integrates an internal N-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Since the N-MOSFET requires a
gate voltage higher than the input voltage, a boost
capacitor connected between LX pin and BST pin drives
the gate. The boost capacitor is charged while LX is low.
An internal 10ꢀ switch from LX to GND is used to insure
that LX is pulled to GND even in the light load. Output
voltage is divided down by the external voltage divider at
the FB pin. The difference of the FB pin voltage and
reference is amplified by the internal transconductance
error amplifier. The error voltage, which shows on the
COMP pin, is compared against the current signal, which
is sum of inductor current signal and ramp compensation
signal, at PWM comparator input. If the current signal is
Some standard values of R1 and R2 for the most
commonly used output voltage values are listed in
Table 2.
Vo (V)
R1 (kΩ)
R2 (kΩ)
0.8
1.2
1.5
1.8
2.5
3.3
5.0
1.0
4.99
10
Open
10
11.5
10.2
10
12.7
21.5
31.6
52.3
10
10
Table 2.
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Page 8 of 15
AOZ1283
The combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Application Information
The basic AOZ1283PI application circuit is shown in
Figure 1. Component selection is explained as follows.
Protection Features
Input Capacitor
The AOZ1283PI has multiple protection features to
prevent system circuit damage under abnormal
conditions.
The input capacitor (C1 in Figure 1) must be connected
to the VIN pin and GND pin of the AOZ1283 to maintain
steady input voltage and filter out the pulsing input
current. The voltage rating of input capacitor must be
greater than maximum input voltage plus ripple voltage.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1283 employs peak
current mode control, the COMP pin voltage is
proportional to the peak inductor current. The COMP pin
voltage is limited to be between 0.4V and 2.5V internally.
The peak inductor current is automatically limited cycle
by cycle.
The input ripple voltage can be approximated by
equation below:
I
V
V
O
O
O
-----------------
--------
--------
V
=
1 –
IN
f C
V
V
IN
IN
IN
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
The cycle by cycle current limit threshold is internally set.
When the load current reaches the current limit
threshold, the cycle by cycle current limit circuit turns off
the high side switch immediately to terminate the current
duty cycle. The inductor current stop rising. The cycle by
cycle current limit protection directly limits inductor peak
current. The average inductor current is also limited due
to the limitation on peak inductor current. When cycle by
cycle current limit circuit is triggered, the output voltage
drops as the duty cycle decreasing.
V
V
O
O
--------
--------
I
= I
1 –
CIN_RMS
O
V
V
IN
IN
if we let m equal the conversion ratio:
The AOZ1283 has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to
the output voltage. Whenever FB pin voltage is below
0.2V, the short circuit protection circuit is triggered.
V
O
--------
= m
V
IN
The relationship between the input capacitor RMS
current and voltage conversion ratio is calculated and
shown in Figure 2. It can be seen that when V is half of
Power-On Reset (POR)
O
A power-on reset circuit monitors the input voltage. When
the input voltage exceeds 2.9V, the converter starts
operation. When input voltage falls below 2.3V, the
converter will stop switching.
V , C is under the worst current stress. The worst
IN
IN
current stress on C is 0.5 x I .
IN
O
0.5
0.4
0.3
0.2
0.1
0
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side NMOS if the junction temperature exceeds
145ºC. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100ºC.
ICIN_RMS(m)
IO
0
0.5
m
1
Figure 2. ICIN vs. Voltage Conversion Ratio
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Page 9 of 15
AOZ1283
For reliable operation and best performance, the input
capacitors must have current rating higher than I
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
CIN-RMS
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
1
-------------------------
V = I ESR
+
O
L
CO
8 f C
O
Inductor
where,
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
C is output capacitor value, and
O
ESR is the equivalent series resistance of the output
CO
capacitor.
V
V
O
O
----------
--------
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
I
=
1 –
L
f L
V
IN
The peak inductor current is:
I
L
--------
= I +
O
1
I
Lpeak
-------------------------
V = I
2
O
L
8 f C
O
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss.
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
V = I ESR
CO
O
L
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used as
output capacitors.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor needs to be checked for
thermal and efficiency requirements.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
I
L
----------
12
I
=
CO_RMS
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
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Page 10 of 15
AOZ1283
Schottky Diode Selection
In the AOZ1283, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
The external freewheeling diode supplies the current to
the inductor when the high side NMOS switch is off. To
reduce the losses due to the forward voltage drop and
recovery of diode, Schottky diode is recommended to
use. The maximum reverse voltage rating of the chosen
Schottky diode should be greater than the maximum
input voltage, and the current rating should be greater
than the maximum load current.
GEA
fP2
2 CC GVEA
where;
G is the error amplifier transconductance, which is
EA
Low Input operation
When V is lower than 4.5V, such as 3.0V, an external
IN
-6
5V is required to add into the BST pin for proper
operation.
200·10 A/V;
is the error amplifier voltage gain, which is 500 V/V
G
VEA
and
Loop Compensation
C is compensation capacitor.
C
The AOZ1283 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
The zero given by the external compensation network,
capacitor C (C in Figure 1) and resistor R (R in
C
5
C
1
Figure 1), is located at:
1
fZ2
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole and can
be calculated by:
2 CC RC
To design the compensation circuit, a target crossover
frequency f for close loop must be selected. The system
C
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high due to system stability concern.
When designing the compensation loop, converter
stability under all line and load condition must be
considered.
1
fP1
2 CO RL
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
1
fZ1
2 CO ESRCO
where;
C is the output filter capacitor;
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency.
The strategy for choosing R and C is to set the cross
C
C
O
over frequency with R and set the compensator zero
C
R is load resistor value and
ESR is the equivalent series resistance of output
L
with C . Using selected crossover frequency, f , to
C
C
CO
calculate R :
C
capacitor.
VO
2 CO
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
and phase. Several different types of compensation
network can be used for AOZ1283. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
RC fC
VFB GEA GCS
where;
f is desired crossover frequency;
C
V
is 0.8V;
FB
G
is the error amplifier transconductance, which is
200·10 A/V and
is the current sense circuit transconductance, which
EA
-6
G
CS
is 4.5 A/V.
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Page 11 of 15
AOZ1283
The compensation capacitor C and resistor R together
The actual junction temperature can be calculated with
power dissipation in the AOZ1283 and thermal
impedance from junction to ambient.
C
C
make a zero. This zero is put somewhere close to the
dominate pole f but lower than 1/5 of selected
p1
crossover frequency. C can is selected by:
C
P
–P
total_loss diode_loss inductor_loss
--------------------------------------------------------------------------------------------------------------------------
=
–P
T
junction
+ T
1.5
JA
ambient
CC
2 RC fP1
The maximum junction temperature of AOZ1283PI is
145ºC, which limits the maximum load current capability.
Equation above can also be simplified to:
CO RL
The thermal performance of the AOZ1283 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
CC
RC
Easy to use application software which helps to design
and simulate the compensation loop can be found at
www.aosmd.com.
Several layout tips are listed below for the best electric
and thermal performance.
Thermal Management and Layout
Consideration
1. Do not use thermal relief connection to the VIN and
the GND pin. Pour a maximized copper area to the
GND pin and the VIN pin to help thermal dissipation.
In the AOZ1283 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then return to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from inductor, to the
output capacitors and load, to the GND pin of the
AOZ1283, to the LX pins of the AOZ1283. Current flows
in the second loop when the low side diode is on.
2. Input capacitor should be connected to the VIN pin
and the GND pin as close as possible.
3. Make the current trace from LX pins to L to Co to the
GND as short as possible.
4. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
5. Keep sensitive signal trace such as trace connected
with FB pin and COMP pin far away from the LX pins.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and GND pin of the AOZ1283.
In the AOZ1283 buck regulator circuit, the three major
power dissipating components are the AOZ1283,
external diode and output inductor. The total power
dissipation of converter circuit can be measured by input
power minus output power.
P
= V I – V V
IN IN O IN
total_loss
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor:
2
P
= I R
1.1
inductor_loss
O
inductor
The power dissipation of diode is:
V
O
--------
P
= I F 1 –
diodeloss
O
V
V
IN
Rev. 0.4 June 2012
www.aosmd.com
Page 12 of 15
AOZ1283
Package Dimensions, SO-8 EP1
Gauge plane
0.2500
D0
C
L
L1
E1
E
E2
E3
L1'
D1
D
Note 5
θ
7 (4x)
A2
A1
A
e
B
Dimensions in millimeters
Dimensions in inches
Symbols Min. Nom. Max.
Symbols Min. Nom. Max.
A
A1
A2
B
C
D
D0
D1
E
1.40
0.00
1.40
0.31
0.17
4.80
3.20
3.10
5.80
—
1.55
0.05
1.50
0.406
—
4.96
3.40
3.30
6.00
1.27
3.90
2.41
0.40 REF
0.95
—
1.70
0.10
1.60
0.51
0.25
5.00
3.60
3.50
6.20
—
A
A1
A2
B
C
D
D0
D1
E
0.055 0.061 0.067
0.000 0.002 0.004
0.055 0.059 0.063
0.012 0.016 0.020
RECOMMENDED LAND PATTERN
3.70
0.007
—
0.010
0.189 0.195 0.197
0.126 0.134 0.142
0.122 0.130 0.138
0.228 0.236 0.244
2.20
5.74
2.71
e
e
—
0.050
—
E1
E2
E3
L
y
θ
3.80
2.21
4.00
2.61
E1
E2
E3
L
y
θ
0.150 0.153 0.157
0.087 0.095 0.103
0.016 REF
2.87
0.40
—
0°
1.27
0.10
8°
0.016 0.037 0.050
—
0°
—
—
3°
0.004
8°
0.80
UNIT: mm
1.27
3°
0.635
|
L1–L1'
L1
|
—
0.04
1.04 REF
0.12
|
L1–L1'
L1
|
0.002 0.005
0.041 REF
Notes:
1. Package body sizes exclude mold flash and gate burrs.
2. Dimension L is measured in gauge plane.
3. Tolerance 0.10mm unless otherwise specified.
4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
5. Die pad exposure size is according to lead frame design.
6. Followed from JEDEC MS-012
Rev. 0.4 June 2012
www.aosmd.com
Page 13 of 15
AOZ1283
Tape and Reel Dimensions, SO-8 EP1
Carrier Tape
P1
P2
D1
T
E1
E2
E
B0
K0
D0
P0
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
SO-8
(12mm)
6.40
0.10
5.20
0.10
2.10
0.10
1.60
0.10
1.50
0.10
12.00 1.75
0.10 0.10
5.50
0.10
8.00
0.10
4.00
0.10
2.00
0.10
0.25
0.10
Reel
W1
S
G
V
N
K
M
R
H
W
UNIT: mm
Tape Size Reel Size
12mm ø330
M
N
W
W1
ø330.00 ø97.00 13.00 17.40
0.50 0.10 0.30 1.00 +0.50/-0.20
H
K
S
G
R
V
ø13.00
10.60
2.00
0.50
—
—
—
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Rev. 0.4 June 2012
www.aosmd.com
Page 14 of 15
AOZ1283
Part Marking
AOZ1283PI
(SO-8)
Z1283PI
FAYWLT
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
This data sheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Rev. 0.4 June 2012
www.aosmd.com
Page 15 of 15
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