AMMP-5618_13 [AVAGO]
6â20 GHz General Purpose Amplifier; 6A ???? 20 GHz的通用放大器
| 型号： | AMMP-5618_13 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 6â20 GHz General Purpose Amplifier |
| 文件： | 总7页 (文件大小：397K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AMMP-5618
6–20 GHz General Purpose Amplifier
Data Sheet
Description
Features
• 5x 5 mm surface mount package
Avago’s AMMP-5618 is a high power, medium gain
amplifier that operates from 6 GHz to 20 GHz. The
amplifier is designed to be an easy-to-use component
for any surface mount PCB application. In communication
systems, it can be used as a LO buffer, or as a transmit
driver amplifier. During typical operation with a single
5V supply, each gain stage is biased for Class-A operation
for optimal power output with minimal distortion. The
amplifier has integrated 50Ω I/O match, DC blocking,
self-bias and choke to eliminate complex tuning and
assembly processes typically required by hybrid (discrete-
FET) amplifiers. The package is fully SMT compatible with
backside grounding and I/O to simplify assembly.
•
Broad band performance 6–20 GHz
• High +19 dBm output power
• Medium 13 dB typical gain
• 50Ω input and output match
• Single 5V (107 mA) supply bias
Applications
• Microwave radio systems
• Satellite VSAT
• Commercial grade military
Note: These devices are ESD sensitive. The following pre-
cautions are strongly recommended. Ensure that an ESD
approved carrier is used when dice are transported from
one destination to another. Personal grounding is to be
worn at all times when handling these devices.
Package Diagram
Functional Block Diagram
NC
1
Vd
2
NC
3
Pin
1
2
Function
NC
1
2
3
Vd
3
4
5
NC
RF_out
NC
4
8
RF IN
8
4
RF OUT
6
7
NC
NC
7
6
5
8
RF_in
7
6
5
NC
NC
NC
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A) = 50V
ESD Human Body Model (Class 0) = 150V
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Electrical Specifications
1. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C, Vd=5V, Idq=107mA.
2. Pre-assembly into package performance verified 100% on-wafer per AMMC-5618 published specifications
3. This final package part performance is verified by a functional test correlated to actual performance at one or
more frequencies
4. Specifications are derived from measurements in a 50Ω test environment. Aspects of the amplifier performance
may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or low noise
(Γopt) matching.
Table 1. RF Electrical Characteristics (TA= 25°C, Vd= 5.0V, Idq=107 mA, Zo=50 Ω)
Parameter
Typ.
Sigma
Unit
Frequency
Small-signal Gain, Gain
12
13
0.40
dB
5-6 GHz
Noise Figure into 50 Ω, NF
4.4
19
0.2
0.9
1.2
dB
Output Power at 1dB Gain Compression, P1dB
dBm
dBm
Third Order Intercept Point;
∆f=100MHz; Pin=-20dBm, OIP3
25
30
5-6 GHz
Input Return Loss, RLin
Output Return Loss, Rlout
Reverse Isolation, Isolation
-12
-12
-40
0.7
0.6
1.2
dB
dB
dB
Table 2. Recommended Operating Range
1. Ambient operational temperature TA = 25°C unless otherwise noted.
2. Channel-to-backside Thermal Resistance (Tchannel (Tc) = 34°C) as measured using infrared microscopy. Thermal
Resistance at backside temperature (Tb)= 25°C calculated from measured data.
Specifications
Description
Min.
Typical
Max.
Unit
Comments
Drain Supply Current, Id
107
140
mA
(Vd = 5 V, Under any RF power
drive and temperature
Table 3. Thermal Properties
Parameter
Test Conditions
Value
Thermal Resistance, qch-b
Backside Temperature, TA =25°C
qch-b = 34 °C/W
Absolute Minimum and Maximum Ratings
Table 4. Minimum and Maximum Ratings
Specifications
Description
Min.
Max.
7
Unit
V
Comments
Positive Drain Voltage, Vd
Drain Current, Id
150
20
mA
dBm
°C
RF Input Power (Pin), RFin
Channel Temperature, Tch
Storage Temperature, Tstg
Max. Assembly Temp, Tmax
Notes:
CW
+150
+150
-65
°C
+300
°C
30 second maximum
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
2
Selected performance plots
These measurements are in 50Ω test environment at TA = 25°C, Vd = 5V, Id = 107 mA. Aspects of the amplifier per-
formance may be improved over a narrower bandwidth by application of additional conjugate, linearity or low noise
(Γopt) matching.
15
12
9
0
-10
-20
-30
-40
-50
6
3
0
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
Figure 1. Gain.
Figure 2. Isolation.
0
-5
0
-5
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
Figure 4. Output Return Loss.
Figure 3. Input Return Loss.
8
7
6
5
4
3
35
30
25
20
15
10
5
OP1dB
OIP3
0
6
8
10
12
14
16
18
20
6
8
10
12
14
16
18
20
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 5. Noise Figure.
Figure 6. Typical Power, OP-1dB and OIP3.
3
Over Temperature Performance Plots
These measurements are in 50Ω test environment at TA = 25°C, Vd = 5V, Id = 107 mA. Aspects of the amplifier per-
formance may be improved over a narrower bandwidth by application of additional conjugate, linearity or low noise
(Γopt) matching.
20
15
10
5
0
-10
-20
-30
-40
-50
-60
25°C
−40°C
85°C
25°C
−40°C
85°C
0
-5
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
Figure 7. Gain Over Temperature.
Figure 8. Isolation Over Temperature.
0
-5
0
-5
25°C
−40°C
85°C
25°C
−40°C
85°C
-10
-15
-20
-25
-30
-10
-15
-20
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
Figure 9. Input RL Over Temperature.
Figure 10. Output Return Loss Over Temperature.
8
7
6
5
4
3
108
106
104
102
100
98
25°C
−40°C
85°C
25°C
−40°C
85°C
96
94
6
8
10
12
FREQUENCY (GHz)
Figure 11. NF Over Temperature.
14
16
18
20
3
3.5
4
4.5
5
Vdd (V)
Figure 12. Bias Current Over Temperature.
4
Over Voltage plots
These measurements are in 50Ω test environment at TA = 25°C, Vd = 5V, Id = 107 mA. Aspects of the amplifier per-
formance may be improved over a narrower bandwidth by application of additional conjugate, linearity or low noise
(Γopt) matching.
0
-10
-20
-30
-40
-50
-60
16
12
8
3V
4V
5V
3V
4V
5V
4
0
4
6
8
10 12 14 16 18 20
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20 22
FREQUENCY (GHz)
Figure 14. Isolation Over Vdd.
Figure 13. Gain Over Vdd.
0
-5
0
-5
3V
4V
5V
3V
4V
5V
-10
-15
-20
-25
-30
-35
-10
-15
-20
4
6
8
10 12 14 16 18 20
FREQUENCY (GHz)
4
6
8
10 12 14 16 18 20
FREQUENCY (GHz)
Figure 15. Input RL Over Vdd.
Figure 16. Output Return Loss Over Vdd.
20
16
12
8
35
30
25
20
15
10
5
3V
4V
5V
3V
4V
5V
4
0
0
6
8
10
12
FREQUENCY (GHz)
Figure 17. Output Power Over Vdd.
14
16
18
20
6
8
10
12
FREQUENCY (GHz)
Figure 18. OIP3 Over Vdd.
14
16
18
20
5
Typical Scattering Parameters
Biasing and Operation
Please refer to <http://www.avagotech.com> for typical The AMMC-5618 is normally biased with a single positive
scattering parameters data.
drain supply connected to both VD pins through bypass
capacitors as shown in Figure 19. The recommended
supply voltage is 5V. It is important to have 0.1 µF bypass
capacitor, and the capacitor should be placed as close to
the component as possible.
The AMMC-5618 does not require a negative gate voltage
to bias any of the two stages. No ground wires are
needed because all ground connections are made with
plated through-holes to the backside of the package.
Refer to the Absolute Maximum Ratings table for allowed
DC and thermal conditions.
Application Circuit
Vd
(Typ 5V)
0.1 F
3
1
7
2
RFin
RFout
4
8
Figure 21. Demonstration Board
(available upon request).
6
5
BASE
GND
Figure 19. Typical Application.
VD2
VD1
Feedback
Network
Feedback
Network
Matching
RF Output
Matching
RF Input
Matching
VG1
VG2
Figure 20. Simplified MMIC Schematic.
6
Package Dimension, PCB Layout and Tape and Reel information
Please refer to Avago Technologies Application Note 5520, AMxP-xxxx production Assembly Process (Land Pattern A).
Part Number Ordering Information
Devices
Part Number
per Container
Container
antistatic bag
7”Reel
AMMP-5618-BLK
AMMP-5618-TR1
AMMP-5618-TR2
10
100
500
7”Reel
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes 5989-3545EN
AV02-0485EN - July 8, 2013
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