HFCT-5951ATLZ [AVAGO]
FIBER OPTIC TRANSCEIVER, 1270-1570nm, 622Mbps(Tx), 622Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR, ROHS COMPLIANT, PLASTIC, DIP-10;
| 型号： | HFCT-5951ATLZ |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | FIBER OPTIC TRANSCEIVER, 1270-1570nm, 622Mbps(Tx), 622Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR, ROHS COMPLIANT, PLASTIC, DIP-10 |
| 文件： | 总18页 (文件大小：335K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HFCT-5951TLZ/TGZ/ATLZ/ATGZ and
HFCT-5952TLZ/TGZ/ATLZ/ATGZ
Single Mode SFF Transceivers for SONET OC-12/SDH STM-4 (S4.1)
Part of the Avago METRAK family
Datasheet
Description
Features
The HFCT-595xTLZ/TGZ/ATLZ/ATGZ SFF
transceivers are high performance, cost effective
modules for serial optical data communication
applications specified at SONET/SDH 622 Mbit/s
for Intermediate Reach links.
•
•
RoHS Compliant
HFCT-595xTLZ/TGZ/ATLZ/ATGZ are compliant to the
intermediate reach SONET OC-12/SDH STM-4 (S4.1)
specifications
Multisourced 2 x 5 and 2 x 10 package styles with LC
receptacle
Single +3.3 V power supply
Temperature range:
0°C to +70 °C
-40 °C to +85 °C
Wave solder and aqueous wash process compatible
Manufactured in an ISO9002 certified facility
Performance
HFCT-595xTLZ/TGZ/ATLZ/ATGZ:
Links of 15 km with 9/125 µm SMF
Fully Class 1 CDRH/IEC 825 compliant
Pin Outs:
•
All modules are designed for single mode fiber and
operate at a nominal wavelength of 1300 nm. They
incorporate high performance, reliable, long
wavelength optical device and proven circuit
technology to give long life and consistent service.
•
•
HFCT-595xTLZ/TGZ:
HFCT-595xATLZ/ATGZ
•
•
•
The transmitter section consists of a Fabry Perot
Laser (FP). The transmitter has full IEC 825 and
CDRH Class 1 eye safety.
The receiver section uses a MOVPE grown planar
PIN photodetector for low dark current and
excellent responsivity.
•
•
HFCT-5951TLZ/TGZ/ATLZ/ATGZ
HFCT-5952TLZ/TGZ/ATLZ/ATGZ
2 x 5
2 x 10
A pseudo-ECL logic interface simplifies interface
to external circuitry.
Applications
These transceivers are supplied in 2 x 5 and 2 x
10 DIP style footprint with the LC fiber connector
interface and are fully compliant with SFF Multi
Source Agreement (MSA).
•
SONET/SDH equipment interconnect,
STS-12/SDH STM-4 rate
Intermediate reach (up to 15 km) ATM links
•
Functional Description
Receiver Section
Noise Immunity
The receiver includes internal circuit components
to filter power supply noise. However under some
conditions of EMI and power supply noise,
external power supply filtering may be necessary
(see application section).
Design
ThereceiversectioncontainsanInGaAs/InPphoto
detector and a preamplifier mounted in an optical
subassembly. This optical subassembly is coupled
to a postamp/decision circuit.
The Signal Detect Circuit
The signal detect circuit works by sensing the peak
level of the received signal and comparing this
level to a reference. The SD output is low voltage
TTL.
The postamplifier is ac coupled to the preamplifier
as illustrated in Figure 1. The coupling capacitors
are large enough to pass the SONET/SDH test
pattern at 622 MBd without significant distortion
or performance penalty. If a lower signal rate, or
a code which has significantly more low frequency
content is used, sensitivity, jitter and pulse
distortion could be degraded.
Figure 1 also shows a filter function which limits
the bandwidth of the preamp output signal. The
filter is designed to bandlimit the preamp output
noise and thus improve the receiver sensitivity.
Thesecomponentswillreducethesensitivityofthe
receiver as the signal bit rate is increased above
622 Mb/s.
The device incorporates a photodetector bias
circuit. This output must be connected to V and
CC
can be monitored by connecting through a series
resistor (see application section).
PHOTODETECTOR
BIAS
DATA OUT
FILTER
TRANS-
IMPEDANCE
PRE-
PECL
OUTPUT
BUFFER
AMPLIFIER
AMPLIFIER
DATA OUT
GND
TTL
OUTPUT
BUFFER
SIGNAL
DETECT
CIRCUIT
SD
Figure 1 - Receiver Block Diagram
2
Functional Description
Transmitter Section
Design
The transmitter section uses a Fabry Perot (FP)
laser as its optical source, see Figure 2. The
package has been designed to be compliant with
IEC 825 eye safety requirements under any single
fault condition. The optical output is controlled
by a custom IC that detects the laser output via
the monitor photodiode. This IC provides both dc
and ac current drive to the laser to ensure correct
modulation, eye diagram and extinction ratio over
temperature, supply voltage and operating life.
The transmitter section also includes monitor
circuitry for both the laser diode bias current and
laser diode optical power.
PHOTODIODE
(rear facet monitor)
Note 1
FP
LASER
DATA
DATA
LASER
MODULATOR
PECL
INPUT
LASER BIAS
DRIVER
BMON(+)
BMON(-)
Note 1
LASER BIAS
CONTROL
PMON(+)
PMON(-)
Note 1
Note 1: THESE FUNCTIONS ONLY AVAILABLE ON 2 x 10 PINOUT DESIGN
Figure 2 - Simplified Transmitter Schematic
3
Package
The optical subassemblies are each attached to
their respective transmit or receive electrical
subassemblies. These two units are than fitted
within the outer housing of the transceiver that is
molded of filled nonconductive plastic to provide
mechanical strength. The housing is then encased
with a metal EMI protective shield. Four ground
connections are provided for connecting the EMI
shield to signal ground.
TheoverallpackageconceptfortheAvagotransceiver
consists of four basic elements; two optical
subassemblies and two electrical subassemblies.
Theyarehousedasillustratedintheblockdiagram
in Figure 3.
The package outline drawing and pin out are
shown in Figures 4, 5 and 6. The details of this
package outline and pin out are compliant with the
multisource definition of the 2 x 5 and 2 x 10 DIP.
The PCB’s for the two electrical subassemblies
bothcarrythesignalpinsthatexitfromthebottom
of the transceiver. The solder posts are fastened
into the molding of the device and are designed to
provide the mechanical strength required to
withstand the loads imposed on the transceiver by
mating with the LC connectored fiber cables.
Although they are not connected electrically to the
transceiver, it is recommended to connect them to
chassis ground.
The electrical subassemblies consist of high
volume multilayer printed circuit boards on which
the IC and various surface-mounted passive
circuit elements are attached.
The receiver electrical subassembly includes an
internal shield for the electrical and optical
subassemblies to ensure high immunity to external
EMI fields.
RX SUPPLY
Note 3
PHOTO DETECTOR
BIAS Note 2
DATA OUT
PIN PHOTODIODE
PREAMPLIFIER
SUBASSEMBLY
QUANTIZER IC
DATA OUT
RX GROUND
SIGNAL
DETECT
LC
TX GROUND
RECEPTACLE
Note 1
LASER BIAS
DATA IN
DATA IN
Tx DISABLE
MONITORING
LASER
OPTICAL
SUBASSEMBLY
LASER DRIVER
AND CONTROL
CIRCUIT
B
B
MON(+) Note 1
MON(-) Note 1
LASER DIODE
OUTPUT POWER
MONITORING
Note 1
PMON(+) Note 1
MON(-) Note 1
P
TX SUPPLY
CASE
Note 1: THESE FUNCTIONS ONLY AVAILABLE ON 2 x 10 PINOUT DESIGN
Note 2: CONNECTED TO RXVCC IN 2 x 5 DESIGN
Note 3: NOSE CLIP PROVIDES CONNECTION TO CHASSIS GROUND FOR BOTH EMI AND THERMAL DISSIPATION.
Figure 3 - Block Diagram.
4
+ 0
- 0.2
+0
13.59
0.535
13.59
(0.535)
MAX
15.0 0.2
(0.591 0.008)
(
)
-0.008
TOP VIEW
48.5 0.2
(1.91 0.008)
6.25
(0.246)
4.06 0.1
(0.16 0.004)
10.8 0.2
(0.425 0.008)
9.8
(0.386)
MAX
3.81 0.15
(0.15 0.006)
Ø 1.07 0.1
(0.042 0.004)
9.6 0.2
(0.378 0.008)
1
0.1
0.25 0.1
(0.01 0.004)
20 x 0.5 0.2
(0.02 0.008)
(0.039 0.004)
10.16 0.1
(0.4 0.004)
1
0.1
19.5 0.3
(0.768 0.012)
(0.039 0.004)
BACK VIEW
FRONT VIEW
SIDE VIEW
1.78 0.1
(0.07 0.004)
48.5 0.2
(1.91 0.008)
9.8
(0.386)
MAX
G MODULE - NO EMI NOSE SHIELD
3.81 0.1
(0.15 0.004)
0.25 0.1
(0.01 0.004)
20 x 0.5 0.2
(0.02 0.008)
1.78 0.1
(0.07 0.004)
Ø 1.07 0.1
(0.042 0.004)
1
0.1
19.5 0.3
(0.768 0.012)
(0.039 0.004)
SIDE VIEW
20 x 0.25 0.1 (PIN THICKNESS)
(0.01 0.004)
NOTE: END OF PINS
CHAMFERED
BOTTOM VIEW
DIMENSIONS IN MILLIMETERS (INCHES)
DIMENSIONS SHOWN ARE NOMINAL. ALL DIMENSIONS MEET THE MAXIMUM PACKAGE OUTLINE DRAWING IN THE SFF MSA.
Figure 4 - HFCT-595xTLZ/TGZ/ATLZ/ATGZ Package Outline Drawing (2 x 10 Design shown)
5
Connection Diagram (HFCT-5952TLZ/TGZ/ATLZ/ATGZ)
Pin 11 Transmitter Power Supply
TX:
V
CC
RX
TX
Provide +3.3 V dc via the recommended transmitter
power supply filter circuit. Locate the power supply
Mounting Studs/
Solder Posts
filter circuit as close as possible to the V TX pin.
CC
Package
Grounding Tabs
Pins 12, 16 Transmitter Signal Ground V TX:
EE
Directly connect these pins to the transmitter signal
ground plane.
o
o
o
o
o
o
o
o
o
o
o
PHOTO DETECTOR BIAS
RECEIVER SIGNAL GROUND
RECEIVER SIGNAL GROUND
NOT CONNECTED
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
LASER DIODE OPTICAL POWER MONITOR - POSITIVE END
LASER DIODE OPTICAL POWER MONITOR - NEGATIVE END
LASER DIODE BIAS CURRENT MONITOR - POSITIVE END
LASER DIODE BIAS CURRENT MONITOR - NEGATIVE END
TRANSMITTER SIGNAL GROUND
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
TRANSMITTER DISABLE
TRANSMITTER SIGNAL GROUND
o
o
o
o
o
o
o
o
o
Top
View
Pin 13 Transmitter Disable T
:
DIS
NOT CONNECTED
Optional feature, connect this pin to +3.3 V TTL logic
high“1”todisablemodule. Toenablemoduleconnect
to TTL logic low “0”.
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
RECEIVER DATA OUTPUT BAR
RECEIVER DATA OUTPUT
10
TRANSMITTER POWER SUPPLY
Pin 14 Transmitter Data In TD+:
No internal terminations are provided. See
recommended circuit schematic.
Figure 5 - Pin Out Diagram (Top View)
Pin Descriptions:
Pin 15 Transmitter Data In Bar TD-:
Pin 1 Photo Detector Bias, VpdR:
No internal terminations are provided. See
recommended circuit schematic.
Pin 1 must be connected to VCC for the receiver to
work. This pin enables monitoring of photo detector
bias current. It must be connected directly to V RX,
CC
Pin 17 Laser Diode Bias Current Monitor - Negative End
or to V RX through a resistor (Max 200 R) for
CC
B –
MON
monitoring photo detector bias current.
Thelaserdiodebiascurrentisaccessiblebymeasuring
the voltage developed across pins 17 and 18. Dividing
Pins 2, 3, 6 Receiver Signal Ground V RX:
EE
the
voltage
by
Directly connect these pins to the receiver ground
plane.
10Ohms(internal)willyieldthevalueofthelaserbias
current.
Pins 4, 5 DO NOT CONNECT
Pin 18 Laser Diode Bias Current Monitor - Positive End
Pin 7 Receiver Power Supply V RX:
CC
B +
MON
Provide +3.3 V dc via the recommended receiver
power supply filter circuit. Locate the power supply
See pin 17 description.
Pin 19 Laser Diode Optical Power Monitor - Negative End
filter
circuit
as
P
MON
–
close as possible to the V RX pin. Note: the filter
CC
The back facet diode monitor current is accessible by
measuring the voltage developed across pins 19 and
20. The voltage across a 200 Ohm internal resistor
between pins 19 and 20 will be proportional to the
photo current.
circuit should not cause V to drop below minimum
specification.
CC
Pin 8 Signal Detect SD:
Normal optical input levels to the receiver result in
a logic “1” output.
Pin 20 Laser Diode Optical Power Monitor - Positive End
Lowopticalinputlevelstothereceiverresultinalogic
“0” output.
P +
MON
See pin 19 description.
This Signal Detect output can be used to drive a low
voltage TTL input on an upstream circuit, such as
Signal Detect input or Loss of Signal-bar.
Mounting Studs/Solder Posts
The two mounting studs are provided for transceiver
mechanical attachment to the circuit board. It is
recommended that the holes in the circuit board be
connected to chassis ground.
Pin 9 Receiver Data Out Bar RD-:
No internal terminations are provided. See
recommended circuit schematic.
Package Grounding Tabs
Connectfourpackagegroundingtabstosignalground.
Pin 10 Receiver Data Out RD+:
No internal terminations are provided. See
recommended circuit schematic.
6
Connection Diagram (HFCT-5951TLZ/TGZ/ATLZ/ATGZ)
RX
TX
Mounting Studs/
Solder Posts
Package
Grounding Tabs
Top
View
o
o
o
o
o
o
o
o
o
o
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
RECEIVER DATA OUT BAR
RECEIVER DATA OUT
1
2
3
4
5
10
9
8
7
6
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
TRANSMITTER DISABLE
TRANSMITTER SIGNAL GROUND
TRANSMITTER POWER SUPPLY
Figure 6 - Pin Out Diagram (Top View)
Pin Descriptions:
Pin 6 Transmitter Power Supply
TX:
Provide +3.3 V dc via the recommended transmitter
power supply filter circuit. Locate the power supply
V
CC
Pin 1 Receiver Signal Ground V RX:
Directlyconnectthispintothereceivergroundplane.
EE
filter circuit as close as possible to the V TX pin.
CC
Pin 2 Receiver Power Supply V RX:
CC
Provide +3.3 V dc via the recommended receiver
power supply filter circuit. Locate the power supply
Pin 7 Transmitter Signal Ground
V
EE
TX:
filter circuit as close as possible to the V RX pin.
CC
Directly connect this pin to the transmitter signal
ground plane.
Note: the filter circuit should not cause V to drop
CC
below minimum specification.
Pin 8 Transmitter Disable T
:
DIS
Pin 3 Signal Detect SD:
Normal optical input levels to the receiver result in
a logic “1” output.
Optional feature, connect this pin to +3.3 V TTL logic
high“1”todisablemodule. Toenablemoduleconnect
to TTL logic low “0”.
Lowopticalinputlevelstothereceiverresultinalogic
“0” output.
Pin 9 Transmitter Data In TD+:
No internal terminations are provided. See
recommended circuit schematic.
This Signal Detect output can be used to drive a low
voltage TTL input on an upstream circuit, such as
Signal Detect input or Loss of Signal-bar.
Pin 10 Transmitter Data In Bar TD-:
No internal terminations are provided. See
recommended circuit schematic.
Pin 4 Receiver Data Out Bar RD-:
No internal terminations are provided. See
recommended circuit schematic.
Mounting Studs/Solder Posts
The two mounting studs are provided for transceiver
mechanical attachment to the circuit board. It is
recommended that the holes in the circuit board be
connected to chassis ground.
Pin 5 Receiver Data Out RD+:
No internal terminations are provided. See
recommended circuit schematic.
Package Grounding Tabs
Connectfourpackagegroundingtabstosignalground.
7
Application Information
Electrical and Mechanical Interface
The Applications Engineering Group at Avago is Recommended Circuit
available to assist you with technical understanding Figures7and8showstherecommendedinterfacefor
anddesigntrade-offsassociatedwiththesetransceivers. deploying the Avago transceivers in a +3.3 V system.
You can contact them through your Avago sales
representative.
Data Line Interconnections
Avago’s HFCT-595xTLZ/TGZ/ATLZ/ATGZ fiber-optic
transceivers are designed to couple to +3.3 V PECL
signals. The transmitter driver circuit regulates the
output optical power. The regulated light output will
maintain a constant output optical power provided
the data pattern is reasonably balanced in duty cycle.
Ifthedatadutycyclehaslong, continuousstatetimes
(low or high data duty cycle), then the output optical
powerwillgraduallychangeitsaverageoutputoptical
power level to its preset value.
Thefollowinginformationisprovidedtoanswersome
of the most common questions about the use of the
parts.
Optical Power Budget and Link Penalties
Theworst-caseOpticalPowerBudget(OPB)indBfor
a fiber-optic link is determined by the difference
between the minimum transmitter output optical
power (dBm avg) and the lowest receiver sensitivity
(dBm avg). This OPB provides the necessary optical
signal range to establish a working fiber-optic link.
The OPB is allocated for the fiber-optic cable length
and the corresponding link penalties. For proper link
performance, all penalties that affect the link
performance must be accounted for within the link
optical power budget.
See Figure 7a
V
(+3.3 V)
CC
82 Ω
Z = 50 Ω
V
(+3.3 V)
CC
100 nF
100 nF
T
(LVTTL)
-
DIS
V
(+3.3 V)
CC
130 Ω
B
B
130 Ω
MON
82 Ω
TD-
Z = 50 Ω
+
MON
NOTE A
130 Ω
130 Ω
P
-
MON
TD+
P
+
MON
20 19 18 17 16 15 14 13 12 11
V
(+3.3 V)
CC
1 µH
10 µF
T
C2
C1
C3
X
V
(+3.3 V)
CC
R
X
1 µH
RD+
RD-
10 µF
1
2
3
4
5
6
7
8
9
10
Z = 50 Ω
V
RX (+3.3 V)
CC
100 Ω
NOTE B
100 nF
100 nF
200 Ω
Z = 50 Ω
NOTE C
10 nF
3 k
130 Ω
130 Ω
SD
LVTTL
Note: C1 = C2 = C3 = 10 nF or 100 nF
Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT
Note B: CIRCUIT ASSUMES HIGH IMPENDANCE INTERNAL BIAS @ V - 1.3 V.
CC
Note C: THE BIAS RESISTOR FOR VpdR SHOULD NOT EXCEED 200 OHM.
Figure 7 - Recommended Interface Circuit (HFCT-5952TLZ/TGZ/ATLZ/ATGZ)
8
The transmitter electrical termination schemes termination and biasing requirements are met.
shown in Figure 7 and 8 maybe replaced by an Figure 7b shows an alternative scheme for low
alternativelow-currentschemeaspertheevaluation currentdcbiasingwherea100ohmdifferential(50
board (see Figures 7a and 7b).
ohm single ended) termination of the data lines is
required.
The termination scheme in Figure 7a provides a
minimum component count to ensure LVPECL
V
(+3.3 V)
V
(+3.3 V)
CC
CC
RI
3K3
82 Ω
100 nF
100 nF
100 nF
100 nF
PIN 15
PIN 14
TD-
TD-
V
(+3.3 V)
R2
CC
V
(+3.3 V)
CC
100
R5
5KI
130 Ω
82 Ω
R3
3K3
TD+
TD+
130 Ω
R4
5K1
Figure 7a.LVPECL termination and biasing scheme
Figure 7b. Low current dc biasing scheme
See Figure 7a
VCC (+3.3 V)
100 nF
82 Ω
Z = 50 Ω
Z = 50 Ω
VCC (+3.3 V)
100 nF
TDIS (LVTTL)
130 Ω
130 Ω
82 Ω
130 Ω
6
TD-
100 nF
NOTE A
130 Ω
TD+
10
9
8
7
VCC (+3.3 V)
VCC (+3.3 V)
1 µH
TX
10 µF
1 µH
C2
C1
C3
100 nF
VCC (+3.3 V)
82 Ω
82 Ω
RX
RD+
C4 *
10 µF
1
2
3
4
5
Z = 50 Ω
130 Ω
NOTE B
100 nF
100 nF
RD-
Z = 50 Ω
130
Ω
130 Ω
130 Ω
SD
LVTTL
Note: C1 = C2 = C3 = 10 nF or 100 nF
Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT
Note B: WHEN INTERNAL BIAS IS PROVIDED REPLACE SPLIT RESISTORS WITH 100WTERMINATION
* C4 IS AN OPTIONAL BYPASS CAPACITOR FOR ADDITIONAL LOW FREQUENCY NOISE FILTERING.
Figure 8 - Recommended Interface Circuit (HFCT-5951TLZ/TGZ/ATLZ/ATGZ)
9
TheHFCT-595xTLZ/TGZ/ATLZ/ATGZhaveatransmit The HFCT-5952TLZ/TGZ/ATLZ/ATGZ offers the
disable function which is a single-ended +3.3 V TTL designer the option of monitoring the PIN photo
input which is dc-coupled to pin 13 on the HFCT- detector bias current. Figures 7 and 8 show a resistor
5952TLZ/TGZ/ATLZ/ATGZ and pin 8 on HFCT- network,whichcouldbeusedtodothis.Notethatthe
5951TLZ/TGZ/ATLZ/ATGZ. In addition the HFCT- photo detector bias current pin must be connected to
5952TLZ/TGZ/ATLZ/ATGZ offers the designer the
V . Avago also recommends that a decoupling
CC
option of monitoring the laser diode bias current and capacitor is used on this pin.
the laser diode optical power. The voltage measured
Power Supply Filtering and Ground Planes
Itisimportanttoexercisecareincircuitboardlayout
between pins 17 and 18 is proportional to the bias
currentthroughaninternal10Ωresistor.Similarlythe
optical power rear facet monitor circuit provides a
photo current which is proportional to the voltage
measured between pins 19 and 20 on the 2 x 10
version, this voltage is measured across an internal
200 Ω resistor.
to achieve optimum performance from these
transceivers. Figures 7 and 8 show the power supply
circuit which complies with the small form factor
multisource agreement. It is further recommended
that a continuous ground plane be provided in the
circuitboarddirectlyunderthetransceivertoprovide
a low inductance ground for signal return current.
This recommendation is in keeping with good high
frequency board layout practices.
As for the receiver section, it is internally ac-coupled
betweenthepreamplifierandthepostamplifierstages.
The actual Data and Data-bar outputs of the
postamplifier are dc-coupled to their respective
output pins (pins 9 and 10 on the HFCT-5951TLZ/
TGZ/ATLZ/ATGZ and pins 14 and 15 on the HFCT-
5952TLZ/TGZ/ATLZ/ATGZ). The two data outputs of
the receiver should be terminated with identical load
circuits to avoid unnecessarily large ac currents in
Package footprint and front panel considerations
TheAvagotransceivercomplieswiththecircuitboard
“CommonTransceiverFootprint”holepatterndefined
in the current multisource agreement which defined
the 2 x 5 and 2 x 10 package styles. This drawing is
reproduced in Figure 9 with the addition of ANSI
Y14.5Mcompliantdimensioningtobeusedasaguide
in the mechanical layout of your circuit board. Figure
10 shows the front panel dimensions associated with
such a layout.
V . If the outputs are loaded identically the ac
CC
current is largely nulled.
SignalDetectisasingle-ended,+3.3VTTLcompatible
outputsignalthatisdc-coupledtopin3ontheHFCT-
5951TLZ/TGZ/ATLZ/ATGZ and pin 8 on the HFCT-
5952TLZ/TGZ/ATLZ/ATGZ modules. Signal Detect
should not be ac-coupled externally to the follow-on
circuits because of its infrequent state changes.
8.89
(0.35)
3.56
(0.14)
DIMENSIONS IN MILLIMETERS (INCHES)
2 x Ø 2.29 MAX. 2 x Ø 1.4 0.1
2 x Ø 1.4 0.1
(0.055 0.004)
7.11
(0.28)
(0.09)
(0.055 0.004)
NOTES:
1. THISFIGUREDESCRIBESTHERECOMMENDED
CIRCUIT BOARD LAYOUT FOR THE SFF
TRANSCEIVER.
4 x Ø 1.4 0.1
(0.055 0.004)
2. THEHATCHEDAREASAREKEEP-OUTAREAS
RESERVEDFORHOUSINGSTANDOFFS.NO
METALTRACESORGROUNDCONNECTIONIN
KEEP-OUTAREAS.
10.16
(0.4)
13.34
(0.525)
3. 2x10TRANSCEIVERMODULEREQUIRES26
PCB HOLES (20 I/O PINS, 2 SOLDER POSTS
AND4PACKAGEGROUNDINGTABS).
PACKAGEGROUNDINGTABSSHOULDBE
CONNECTEDTOSIGNALGROUND.
4. 2x5TRANSCEIVERMODULEREQUIRES16PCB
HOLES (10 I/O PINS, 2 SOLDER POSTS AND 4
PACKAGEGROUNDINGTABS).PACKAGE
GROUNDINGTABSSHOULDBECONNECTED
TOSIGNALGROUND.
7.59
(0.299)
9.59
(0.378)
2
(0.079)
9 x 1.78
(0.07)
2
3
3
2 x Ø 2.29
(0.079)
(0.118)
(0.118)
(0.09)
5. THEMOUNTINGSTUDSSHOULDBESOLDERED
TOCHASSISGROUNDFORMECHANICAL
INTEGRITYANDTOENSUREFOOTPRINT
COMPATIBILITYWITHOTHERSFF
4.57
(0.18)
20 x Ø 0.81 0.1
(0.032 0.004)
6
16
3.08
(0.236)
(0.63)
(0.121)
TRANSCEIVERS.
6. HOLESFORHOUSINGLEADSMUSTBETIEDTO
SIGNALGROUND.
Figure 9 - Recommended Board Layout Hole Pattern
10
Eye Safety Circuit
Electromagnetic Interference (EMI)
Foranopticaltransmitterdevicetobeeye-safeinthe One of a circuit board designer’s foremost concerns
event of a single fault failure, the transmitter must is the control of electromagnetic emissions from
either maintain eye-safe operation or be disabled.
electronicequipment.Successincontrollinggenerated
ElectromagneticInterference(EMI)enablesthedesigner
to pass a governmental agency’s EMI regulatory
standard and more importantly, it reduces the
possibility of interference to neighboring equipment.
Avago has designed the HFCT-595xTLZ/TGZ/ATLZ/
ATGZtoprovideexcellentEMIperformance.TheEMI
performance of a chassis is dependent on physical
design and features which help improve EMI
suppression. Avago encourages using standard RF
suppressionpracticesandavoidingpoorlyEMI-sealed
enclosures.
The HFCT-595xTLZ/TGZ/ATLZ/ATGZ is intrinsically
eye safe and does not require shut down circuitry.
Signal Detect
The Signal Detect circuit provides a de-asserted
outputsignalwhentheopticallinkisbroken(orwhen
the remote transmitter is OFF). The Signal Detect
threshold is set to transition from a high to low state
between the minimum receiver input optional power
and -45 dBm avg. input optical power indicating a
definiteopticalfault(e.g.unpluggedconnectorforthe
receiverortransmitter,brokenfiber,orfailedfar-end
transmitterordatasource).TheSignalDetectdoesnot
detect receiver data error or error-rate. Data errors
can be determined by signal processing offered by
upstream PHY ICs.
Avago’s HFCT-5951ATLZ/TLZ/ HFCT-5952ATLZ/TLZ
OC-12/STM-4 LC transceivers have nose shields
which provide a convenient chassis connection to the
nose of the transceiver. This nose shield improves
system EMI performance by closing off the LC
aperture. Localized shielding is also improved by
tying the four metal housing package grounding tabs
to signal ground on the PCB. Though not obvious by
inspection, the nose shield and metal housing are
electrically separated for customers who do not wish
to directly tie chassis and signal grounds together.
Figure 10 shows the recommended positioning of the
transceivers with respect to the PCB and faceplate.
15.24
(0.6)
10.16 0.1
(0.4 0.004)
TOP OF PCB
B
B
DETAIL A
1
(0.039)
15.24
(0.6)
A
SOLDER POSTS
14.22 0.1
(0.56 0.004)
15.75 MAX. 15.0 MIN.
(0.62 MAX. 0.59 MIN.)
SECTION B - B
DIMENSIONS IN MILLIMETERS (INCHES)
1. FIGURE DESCRIBES THE RECOMMENDED FRONT PANEL OPENING FOR A LC OR SG SFF TRANSCEIVER.
2. SFF TRANSCEIVER PLACED AT 15.24 mm (0.6) MIN. SPACING.
Figure 10 - Recommended Panel Mounting
11
Package and Handling Instructions
Flammability
Recommended Cleaning/ Degreasing Chemicals
Alcohols: methyl, isopropyl, isobutyl.
The HFCT-595xTLZ/TGZ/ATLZ/ATGZ transceivers Aliphatics: hexane, heptane Other: naphtha.
housingconsistofhighstrength,heatresistantandUL
94 V-0 flame retardant plastic and metal packaging.
Do not use partially halogenated hydrocarbons such
as 1,1.1 trichloroethane, ketones such as MEK,
Recommended Solder and Wash Process
The HFCT-595xTLZ/TGZ/ATLZ/ATGZ are compatible phenol,
acetone,chloroform,ethylacetate,methylenedichloride,
methylene chloride, or
with industry-standard wave processes.
N-methylpyrolldone.Also,Avagodoesnotrecommend
theuseofcleanersthatusehalogenatedhydrocarbons
because of their potential environmental harm.
Process plug
The transceivers are supplied with a process plug for
protectionoftheopticalportwithintheLCconnector LC SFF Cleaning Recommendations
receptacle. This process plug prevents contamination In the event of contamination of the optical ports, the
during wave solder and aqueous rinse as well as recommended cleaning process is the use of forced
during handling, shipping and storage. It is made of nitrogen. If contamination is thought to have
a high-temperature, molded sealing material.
remained,theopticalportscanbecleanedusingaNTT
international Cletop stick type (diam. 1.25 mm) and
HFE7100 cleaning fluid.
Recommended Solder fluxes
Solder fluxes used with the HFCT-595xTLZ/TGZ/
ATLZ/ATGZ should be water-soluble, organic fluxes.
Recommended solder fluxes include Lonco 3355-11
fromLondonChemicalWest,Inc.ofBurbank,CA,and
100 Flux from Alpha-Metals of Jersey City, NJ.
12
Regulatory Compliance
Electromagnetic Interference (EMI)
TheRegulatoryCompliancefortransceiverperformance Most equipment designs utilizing these high-speed
isshowninTable1.Theoverallequipmentdesignwill transceiversfromAvago willberequiredtomeetFCC
determine the certification level. The transceiver regulations in the United States, CENELEC EN55022
performance is offered as a figure of merit to assist (CISPR22)inEuropeandVCCIinJapan.RefertoEMI
the designer in considering their use in equipment section (page 9) for more details.
designs.
Immunity
Electrostatic Discharge (ESD)
TherearetwodesigncasesinwhichimmunitytoESD electromagnetic fields following the IEC 61000-4-3
damage is important. test method.
Transceivers will be subject to radio-frequency
The first case is during handling of the transceiver Eye Safety
prior to mounting it on the circuit board. It is These laser-based transceivers are classified as AEL
importanttousenormalESDhandlingprecautionsfor ClassI(U.S.21CFR(J)andAELClass1perEN60825-
ESD sensitive devices. These precautions include 1(+A11).Theyareeyesafewhenusedwithinthedata
using grounded wrist straps, work benches, and floor sheet limits per CDRH. They are also eye safe under
mats in ESD controlled areas.
normaloperatingconditionsandunderallreasonably
foreseeable single fault conditions per EN60825-1.
Avagohastestedthetransceiverdesignforcompliance
with the requirements listed below under normal
operatingconditionsandundersinglefaultconditions
where applicable. TUV Rheinland has granted
certification to these transceivers for laser eye safety
and use in EN 60950 and EN 60825-2 applications.
Theirperformanceenablesthetransceiverstobeused
withoutconcernforeyesafetyupto3.6Vtransmitter
Thesecondcasetoconsiderisstaticdischargestothe
exterior of the equipment chassis containing the
transceiverparts.TotheextentthattheLCconnector
receptacle is exposed to the outside of the equipment
chassis it may be subject to whatever system-level
ESD test criteria that the equipment is intended to
meet.
V
CC
.
Table 1: Regulatory Compliance - Targeted Specification
Feature
Electrostatic Discharge
(ESD) to the
Test Method
MIL-STD-883
Method 3015
Performance
Class 2 (>2 kV).
Electrical Pins
Electrostatic Discharge
(ESD) to the LC
Receptacle
Variation of IEC 61000-4-2
Tested to 8 kV contact discharge.
Electromagnetic
Interference (EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
Margins are dependent on customer board and chassis
designs.
VCCI Class I
Immunity
Variation of IEC 61000-4-3
Typically show no measurable effect from a
10 V/m field swept from 27 to 1000 MHz applied to the
transceiver without a chassis enclosure.
Accession Number: ) 9521220
Laser Eye Safety
and Equipment Type
Testing
FDA CDRH 21-CFR 1040
Class 1
IEC 60825-1
Amendment 2 2001-01
License Number: ) 933/510216
Component
Recognition
Underwriters Laboratories and
Canadian Standards Association
Joint Component Recognition
for Information Technology
Equipment Including Electrical
Business Equipment.
UL File. E173874
13
CAUTION:
There are no user serviceable parts nor any
maintenance required for the HFCT-595xTLZ/
TGZ/ATLZ/ATGZ. All adjustments are made at the
factorybeforeshipmenttoourcustomers.Tampering
with or modifying the performance of the HFCT-
595xTLZ/TGZ/ATLZ/ATGZ will result in voided
product warranty. It may also result in improper
operation of the HFCT-595xTLZ/TGZ/ATLZ/ATGZ
circuitry, and possible overstress of the laser
source. Device degradation or product failure may
result.
ConnectionoftheHFCT-595xTLZ/TGZ/ATLZ/ATGZ
to a non-approved optical source, operating above
the recommended absolute maximum conditions
or operating the HFCT-595xTLZ/TGZ/ATLZ/ATGZ
in a manner inconsistent with their design and
functionmayresultinhazardousradiationexposure
and may be considered an act of modifying or
manufacturing a laser product. The person(s)
performing such an act is required by law to
recertifyandreidentifythelaserproductunderthe
provisions of U.S. 21 CFR (Subchapter J).
14
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in
isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values
of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Symbol
Min.
-40
Typ.
Max.
+85
3.6
Unit
°C
V
Reference
Storage Temperature
Supply Voltage
TS
VCC
VI
-0.5
-0.5
1
Data Input Voltage
Data Output Current
Relative Humidity
VCC
50
V
ID
mA
%
RH
85
Recommended Multirate Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Ambient Operating Temperature
HFCT-595xTLZ/TGZ
HFCT-595xATLZ/ATGZ
Supply Voltage
TA
TA
VCC
0
-40
3.14
+70
+85
3.47
°C
°C
V
2
2
Power Supply Rejection
PSR
VD
100
50
mVPk-Pk
V
3
Transmitter Differential Input Voltage
Data Output Load
0.3
1.6
1.0
0.6
W
RDL
TTL Signal Detect Output Current - Low
TTL Signal Detect Output Current - High
Transmit Disable Input Voltage - Low
Transmit Disable Input Voltage - High
Transmit Disable Assert Time
IOL
mA
µA
V
IOH
-400
2.2
TDIS
TDIS
V
TASSERT
TDEASSERT
10
µs
4
5
Transmit Disable Deassert Time
1.0
ms
Process Compatibility
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Wave Soldering and Aqueous Wash
TSOLD/tSOLD
+260/10 °C/sec.
6
Notes:
1. The transceiver is class 1 eye safe up to V = 3.6 V.
2. Ambient operating temperature utilizes air flow of 2 ms over the device.
CC
-1
3. Tested with a sinusoidal signal in the frequency range from 10 Hz to 1 MHz on the V supply with the recommended power supply filter in place.
CC
Typically less than a 1 dB change in sensitivity is experienced.
4. Time delay from Transmit Disable Assertion to laser shutdown.
5. Time delay from Transmit Disable Deassertion to laser start-up.
6. Aqueous wash pressure <110 psi.
15
Transmitter Electrical Characteristics
HFCT-595xTLZ/TGZ: T = 0°C to +70 °C, V = 3.14 V to 3.47 V
A
CC
HFCT-595xATLZ/ATGZ: T = -40 °C to +85 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
ICCT
Min.
Typ.
30
Max.
120
Unit
mA
W
Reference
Supply Current
Power Dissipation
1
PDIST
0.10
800
0.42
930
Data Input Voltage Swing (single-ended)
VIH - VIL
250
mV
Transmitter Differential
Data Input Current - Low
IIL
-350
µA
Transmitter Differential
Data Input Current - High
Laser Diode Bias Monitor Voltage
IIH
350
700
200
µA
mV
mV
2, 3
2, 3
Power Monitor Voltage
10
Receiver Electrical Characteristics
HFCT-595xTLZ/TGZ: T = 0°C to +70 °C, V = 3.14 V to 3.47 V
A
CC
HFCT-595xATLZ/ATGZ: T = -40 °C to +85 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
Min.
Typ.
70
Max.
110
0.38
930
0.5
Unit
mA
W
Reference
Supply Current
Power Dissipation
ICCR
1
4
5
6
6
7
7
PDISR
VOH - VOL
tr
0.23
800
Data Output Voltage Swing (single-ended)
Data Output Rise Time
575
mV
ns
ns
V
Data Output Fall Time
tf
0.5
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Assert Time (OFF to ON)
Signal Detect Deassert Time (ON to OFF)
VOL
0.8
VOH
2.0
2.3
V
ASMAX
ANSMAX
100
100
µs
µs
Notes:
1. Excludes data output termination currents.
2. The laser bias monitor current and laser diode optical power are calculated as ratios of the corresponding voltages to their current sensing resistors,
10 W and 200 W (see Figure 7). On the 2 x 10 version only.
3. On the 2 x 10 version only.
4. Power dissipation value is the power dissipated in the receiver itself. It is calculated as the sum of the products of V and I minus the sum of the
CC
CC
products of the output voltages and currents.
5. These outputs are compatible with 10 k, 10 kH, and 100 k ECL and PECL inputs.
6. These are 20-80% values.
7. SD is LVTTL compatible.
16
Transmitter Optical Characteristics
HFCT-595xTLZ/TGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
HFCT-595xATLZ/ATGZ: T = -40 °C to +85 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
Min.
-15
Typ.
Max.
-8
Unit
dBm
nm
Reference
Output Optical Power 9 µm SMF
Center Wavelength
Spectral Width - rms
Optical Rise Time
POUT
lC
1
1274
1356
2.5
s
nm rms
ps
2
3
3
tr
250
250
1000
1000
Optical Fall Time
tf
ps
Extinction Ratio
ER
8.2
dB
Output Optical Eye
Back Reflection Sensitivity
Jitter Generation
Compliant with eye mask Bellcore GR-CORE-000253 and ITU-T G.957
-8.5
70
7
dB
4
5
5
pk to pk
RMS
25
2
mUI
mUI
Receiver Optical Characteristics
HFCT-595xTLZ/TGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
HFCT-595xATLZ/ATGZ: T = -40 °C to +85 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Receiver Sensitivity
Receiver Overload
P
P
l
IN MIN
-32
-28
dBm avg. 6, 7
dBm avg. 6
nm
IN MAX
-8
Input Operating Wavelength
Signal Detect - Asserted
Signal Detect - Deasserted
Signal Detect - Hysteresis
Optical Return Loss, ORL
1270
1570
-28
PA
PD
PH
-34
dBm avg.
dBm avg.
dB
-45
0.5
-34.3
1.7
4
-35
-14
dB
Notes:
1. The output power is coupled into a 1 m single-mode fiber. Minimum output optical level is at end of life.
2. The relationship between FWHM and RMS values for spectral width can be derived from the assumption of a Gaussian shaped spectrum which
results in RMS = FWHM/2.35.
3. These are unfiltered 20-80% values. The typical value is for OC-12 operation only.
4. This meets the “desired” requirement in SONET specification (GR253). The figure given is the allowable mismatch for 1 dB degradation in receiver
sensitivity.
23
5. For the jitter measurements, the device was driven with SONET OC-12C data pattern filled with a 2 -1 PRBS payload.
23
6. Minimum sensitivity and saturation levels for a 2 -1 PRBS with 72 ones and 72 zeros inserted. Over the range the receiver is guaranteed to provide
-10
output data with a Bit Error Rate better than or equal to 1 x 10
7. Beginning of life sensitivity at +25 °C is -29 dBm.
.
17
Design Support Materials
Avago has created a number of reference designs
withmajorPHYICvendorsinordertodemonstrate
full functionality and interoperability. Such design
information and results can be made available to
the designer as a technical aid. Please contact your
Avago representative for further information if
required.
Ordering Information
Temperature range 0 °C to +70 °C,
HFCT-5951TLZ
HFCT-5952TLZ
HFCT-5951TGZ
HFCT-5952TGZ
2
x
5
footprint - with EMI nose shield
2 x 10 footprint - with EMI nose shield
2 x 5 footprint - without EMI nose shield
2 x 10 footprint - without EMI nose shield
Temperature range -40 °C to +85 °C,
HFCT-5951ATLZ
HFCT-5952ATLZ
HFCT-5951ATGZ
HFCT-5952ATGZ
2
x
5
footprint - with EMI nose shield
2 x 10 footprint - with EMI nose shield
2 x 5 footprint - without EMI nose shield
2 x 10 footprint - without EMI nose shield
Class 1 Laser Product: This product conforms to the
applicable requirements of 21 CFR 1040 at the date of
manufacture
Date of Manufacture:
Avago Technologies Inc., No 1 Yishun Ave 7, Singapore
Handling Precautions
1. The HFCT-595xTLZ/TGZ/ATLZ/ATGZ can be damaged by current surges or overvoltage.
Power supply transient precautions should be taken.
2. Normal handling precautions for electrostatic sensitive devices
should be taken.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved.
5989-4771EN - January 25, 2006
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