MX877RTR [CLARE]
8-Channel, 60V Driver with Push-Pull Output, 3 Wire Interface; 8通道， 60V驱动器，推挽式输出， 3线接口
| 型号： | MX877RTR |
| 厂家： | 
CLARE |
| 描述： | 8-Channel, 60V Driver with Push-Pull Output, 3 Wire Interface |
| 文件： | 总11页 (文件大小：648K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX877
8-Channel, 60V Driver with
Push-Pull Output, 3 Wire Interface
Features
Description
• Eight (8) Outputs Rated at 60V, 80ꢀm
• Push-Pull Driver Configuration
• 6V to 60V Driver Supply Range
• 2.7V to 5.5V Logic Supply Range
• 3-Wire Serial Interface plus Chip Select
• Captures Serial & Parallel Input Data
• Outputs Can Be Paralleled
The MX877 is an 8-channel, high voltage switch with
8-bit parallel or serial input control. The MX877
connects directly to a ꢀicroprocessor through a
standard 3-wire serial interface. The push-pull output
configuration can drive up to 60 volts at 80ꢀm.
Outputs can be paralleled for increased drive current
up to a device total of 400ꢀm, sink or source.
• 28-Lead QFN Package
The MX877 is designed to operate over a teꢀperature
range of -40°C to +85°C, and is available in a 28-lead
QFN Package.
Applications
• White Goods
• mTE
• Industrial Equipꢀent
Ordering Information
RoHS
2002/95/EC
Pb
e3
Part
Description
MX877R
QFN-28 (73/Tube)
MX877RTR
QFN-28 Tape & Reel (2500/Reel)
Functional Block Diagram
VCC
VPWR
CS*
SDO
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN0
Latch
Register
I/O
Register
Driver
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
Level
Translator
Parallel
In & Out
SCK
SDI
OE
GND
July 29, 2011
www.clare.com
1
MX877
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 Dynamic Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.6 Serial Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.7 Parallel Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Parallel In / Parallel Out Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 Serial Cascade Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Control System Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
www.clare.com
July 29, 2011
MX877
1.2 Pin Description
1 Specifications
1.1 Package Pinout
Pin#
Name
Description
1
OUT7
N/C
Parallel Output
No Connection
Ground
2
3
GND
V
4
7
6
5
4
3
2
1
15
16
17
18
19
20
21
High Voltage Supply (6V to 60V)
No Connection
Logic Supply (2.7V to 5.5V)
Serial Data Output
Parallel Input
PWR
5
N/C
V
6
CC
7
SDO
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN0
SCK
8
9
Parallel Input
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Parallel Input
Parallel Input
Parallel Input
BOTTOM V IEW
Parallel Input
Parallel Input
Parallel Input
Serial Clock
V
High Voltage Supply (6V to 60V)
Serial Data Input
Chip Select (Active Low)
Output Enable
PWR
SDI
CS*
OE
GND
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
Ground
Parallel Output
Parallel Output
Parallel Output
Parallel Output
Parallel Output
Parallel Output
Parallel Output
July 29, 2011
www.clare.com
3
MX877
1.3 Absolute Maximum Ratings
mbsolute ꢀaxiꢀuꢀ electrical ratings are at 25°C
Parameter
Symbol Min
Max
Units
VPWR Supply Voltage
VPWR
VCC
-
-
-
60
6
V
V
V
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the
operational sections of this data sheet is not implied.
Exposure of the device to the absolute maximum ratings for
an extended period may degrade the device and affect its
reliability.
Logic Supply Voltage
Input Pin Voltage
VIN
6
Continuous Output Current
OUT0 - OUT7
IOUTn
TJ
-
-
100
150
mA
°C
Operating Junction Temperature
Thermal Resistance
(Junction to Ambient)
RJA
110 Typical
°C/W
TA
Operating Temperature
Storage Temperature
-40
-55
85
°C
°C
TSTG
150
Voltages with respect to GND=0V.
ESD Warning: ESD (electrostatic discharge) sensitive device. Although the MX877 features proprietary ESD protection
circuitry, permanent damage may be sustained if subjected to high energy electrostatic discharges. Proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
1.4 DC Electrical Characteristics
V
=5V, V
=42V, T =25°C, unless otherwise specified.
CC
PWR m
Parameter
Conditions
Symbol Minimum
Typical Maximum Units
Logic Supply Voltage
-
V
VCC
ICC
2.7
-
50
-
5.5
-
fSCK=5MHz
Logic Supply Current
-
-
A
A
V
f
SCK=0
Quiescent Logic Supply Current
ICC
1
V
PWR Voltage
PWR Current
-
VPWR
IPWR
6
-
60
V
Total of all Outputs
Total of all Outputs
VPWR=42V, No Load
-
-
-
-
400
400
mA
mA
GND Current
-
Quiescent VPWR Current
IPWR
-
0.75
-
-
-
mA
V
High Level Input Voltage
IN0-IN7, SCK, SDI, OE, CS*
VIH
VIL
VCC-0.5
Low Level Input Voltage
Input Leakage Current
SDO Tri-State Leakage Current
OUT0-OUT7 Current
-
-
-
-
-
-
-
0.5
1
V
-
A
A
CS*=Logic High
1
Any One Output, Sink or Source
VPWR=42V
IOUTn
ROUTn
IOUTn
-
-
-
-
9
-
80
-
mA
OUT0-OUT7 ON Resistance
OUT0-7 Tri-State Leakage Current
OE=Logic Low
1
A
Notes: To avoid unwanted output during V
application and systeꢀ initialization, keep OE at a logic low until
PWR
CS* has coꢀpleted one cycle.
Therꢀal Resistance is ꢀeasured in still air with the device soldered to a 6 square inch board without a
ground plane. mpplications ꢀay require derating of the specified ꢀaxiꢀuꢀ currents to avoid exceeding the
ꢀaxiꢀuꢀ operation junction teꢀperature.
4
www.clare.com
July 29, 2011
MX877
1.5 Dynamic Electrical Characteristics
=5V, V =42V, T =25°C, unless otherwise specified.
V
CC
PWR
m
Parameter
Conditions
Symbol
Minimum
Typical Maximum Units
-
-
100
40
40
50
150
150
15
30
20
25
-
-
-
DC
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCK Period
-
-
-
SCK High Time
-
-
-
SCK Low Time
-
tCSwh
tCSs
tCSwl
tINs
tINh
tSDIs
tSDIh
tSDO
tSDOz
tOUTr
tOUTf
-
-
-
CS* High Time
Setup Time
-
-
CS* Falling to SCK Rising
CS* Low Time
SCK Low (Parallel Input Mode)
-
-
-
-
-
INx to CS Falling (SETUP TIME)
INx to CS Falling (HOLD TIME)
SDI to SCK Rising (SETUP TIME)
SDI to SCK Rising (HOLD TIME)
SCK Falling to to SDO Data Valid
CS* Rising to SDO High Z
CS* Rising to OUTx Rising
CS* Rising to OUTx Falling
OUTx Rise Time
-
-
-
-
-
-
-
-
-
-
-
10
12
750
570
110
75
580
390
130
90
-
-
-
To 50%, C(OUTx)=1000pF
To 50%, C(OUTx)=1000pF
From 10% to 90%, C(OUTx)=1000pF
From 10% to 90%, C(OUTx)=1000pF
To 90%
-
-
-
-
-
-
-
-
-
OUTx Fall Time
-
-
-
OE Rising to OUTx Rising
OE Rising to OUTx Falling
OE Falling to OUTx High Z
To 90%
-
-
-
To 10%, OUTx High
To 10%, OUTx Low
-
-
-
-
-
-
July 29, 2011
www.clare.com
5
MX877
1.6 Serial Timing
INx
tINs
CS*
tINh
tCSs
tCSwh
SCK
SDI
tSDIh
tSDIs
tSDOz
tSDO
SDO
tOUTr
tOUTf
OUTx
1.7 Parallel Timing
INx
tINs
tINh
CS*
tCSwl
tOUTr
OUTx
tOUTf
6
www.clare.com
July 29, 2011
MX877
Figure 1. Serial Data Transfer Example
2 Functional Description
0
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN0
The MX877 is an 8 channel high voltage driver with
8-bit input control. The MX877 interfaces to a
ꢀicroprocessor through a standard 3 wire serial
interface and an active-low chip select, or can be used
in a parallel-in, parallel-out configuration.
0
1
0
1
1
1
0
Parallel data is transferred to the I/O register of the
MX877 through the parallel input pins, IN0 through IN7
on the falling edge of the chip select pin, CS*. When
CS* is in a logic low state, serial data can be
transferred to the I/O register through the serial input
pin, SDI, and froꢀ the I/O register through the serial
output pin, SDO. Parallel or serial input data is
transferred froꢀ the I/O register to the latch and high
voltage output drivers, OUT0 through OUT7, on the
positive edge of CS*. This data reꢀains latched until
the next positive edge of CS*.
0
0
1
t1
0
0
0
1
0
1
1
1
1
1
0
SDI
CS
*
SCK
SDO
0
0
SDI at
tiꢀe t1
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
1
0
The 8-bit I/O shift register is clocked by the serial clock
pin, SCK. Serial data presented at the SDI pin is
transferred to the shift register on the positive edge of
SCK. Data shifts out of the register through the SDO
pin on the negative edge of SCK. SDI and SCK are
ignored, and SDO transitions to a high iꢀpedance
condition when CS* is at a logic high state.
0
0
0
1
1
0
Serial data is received by the MX877 through the SDI
pin. This data is accepted on the rising edge of SCK. m
specific output is prograꢀꢀed to a logic high state if
SDI is at a logic high state during the rising edge of
SCK. Conversely, a specific output is prograꢀꢀed to a
logic low state if SDI is at a logic low state during the
rising edge of SCK. Outputs transition to their
Devices ꢀay be serially cascaded by connecting SDO
to SDI of the next device. Pins SCK and CS* are
coꢀꢀon to all devices in serial cascade. For
n-cascaded devices the CS* should reꢀain low for 8n
cycles of SCK.
prograꢀꢀed states on the positive edge of CS* if the
output enable pin, OE is in a logic high state.
mn output enable pin, OE enables the driver outputs
OUT0 through OUT7 when logic high. m logic low level
on OE forces the OUT0 through OUT7 outputs to a
high iꢀpedance state.
The MSB input data (IN7) is presented at the serial
output pin, SDO on the falling edge of CS*. Input data
froꢀ IN6 through IN0 is sequentially presented at
SDO on negative SCK transitions if CS* reꢀains in a
logic low state. If CS* is at a logic low state beyond 8
cycles of SCK, SDI data that has propagated through
the I/O register will then be presented at SDO. The
SDO pin transitions to a high iꢀpedance state when
CS* is in a logic level high state, thus allowing ꢀultiple
serial peripherals to share the ꢀicroprocessor data
pin.
The MX877 can also operate as a parallel-in,
parallel-out level shifter and driver. SCK ꢀust reꢀain
at a logic low state when operating in this ꢀode.
Parallel input data presented to IN0 through IN7 is
captured on the falling edge of CS*. This data is
transferred to OUT0 through OUT7 on the rising edge
of CS*, and reꢀains latched until the next rising edge
of CS*.
July 29, 2011
www.clare.com
7
MX877
3 Application Examples
3.1 Parallel In / Parallel Out Application
IN
OUT
8
8
CS*
OE
SDI
SCK
3.2 Serial Cascade Application
MmSTER IN
SDO
OUT
IN
8
8
SCK
CS*
OE
SDI
SDO
OUT
IN
8
8
SCK
CS*
OE
SDI
MmSTER OUT
8
www.clare.com
July 29, 2011
MX877
3.3 Control System Application
Systeꢀ
sensors
MX877
capture
drive
IN
8
8
SDI
SDO
SCK
CS*
OE
µC
actuators
OUT
Type 1 tiꢀing:
capture N
drive N
analyze N, calculate N+1
capture N+1
drive N+1
CS*
SDI
µC
output N
µC
output N+1
SCK
SDO
input N
µC
input N+1
µC
Type 2 tiꢀing:
capture N
analyze N, calculate N+1
drive N+1
capture N+1
CS*
SDI
don't care
µC
output N+1
SCK
SDO
input N
µC
July 29, 2011
www.clare.com
9
MX877
4 Manufacturing Information
4.1 Moisture Sensitivity
mll plastic encapsulated seꢀiconductor packages are susceptible to ꢀoisture ingression. Clare classified
all of its plastic encapsulated devices for ꢀoisture sensitivity according to the latest version of the joint
industry standard, IPC/JEDEC J-STD-020, in force at the tiꢀe of product evaluation. We test all of our
products to the ꢀaxiꢀuꢀ conditions set forth in the standard, and guarantee proper operation of our
devices when handled according to the liꢀitations and inforꢀation in that standard as well as to any liꢀitations set
forth in the inforꢀation or standards referenced below.
Failure to adhere to the warnings or liꢀitations as established by the listed specifications could result in reduced
product perforꢀance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to
the requireꢀents of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Rating
MX877R
MSL 3
4.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard
JESD-625.
4.3 Reflow Profile
This product has a ꢀaxiꢀuꢀ body teꢀperature and tiꢀe rating as shown below. mll other guidelines of
J-STD-020 ꢀust be observed.
Device
Maximum Temperature x Time
MX877R
260°C for 30 seconds
RoHS
2002/95/EC
Pb
e3
10
www.clare.com
July 29, 2011
MX877
4.4 Mechanical Dimensions
4.4.1 QFN-28 Package & Recommended PCB Land Pattern
4.70
(0.185)
3.25
0.45 / 0.65
(0.018 / 0.026)
(0.128)
3.00 / 3.25
(0.118 / 0.128)
Pin 1 REF
2
1
0.18 / 0.30
(0.007 / 0.012)
5.00 BSC
(0.197 BSC)
28
1.00
(0.039)
0.30
(0.012)
0.500 BSC
(0.0197 BSC)
0.80 / 1.00
(0.031 / 0.039)
0.200 REF
(0.008 REF)
NOTES: (Unless otherwise specified)
1. Coplanarity applies to the exposed
heat sink slug as well as the terꢀinals.
2. Diꢀensions and tolerancing conforꢀ
to mSME Y14.5M-1994.
3. Molded package shall conforꢀ to
JEDEC Standard configuration
MO-220 Variation VHHD-1.
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
0.00 / 0.05
(0.000 / 0.002)
4.4.2 Tape & Reel Dimensions
4.00 0.10
(0.157 0.004)
B
1.75 0.10
(0.069 0.004)
2.00 0.05
(0.079 0.002)
ø1.55 0.05
(ø0.061 0.002)
330.2 DIm.
(13.00 DIm.)
R0.50 TYP
(R0.020 TYP)
Top Cover
12.00 0.10
(0.472 0.004)
Tape Thickness
0.066 MmX.
(0.0026 MmX.)
BO=5.30 0.10
(0.209 0.004)
5.50 0.05
(0.217 0.002)
A
A
KO=1.10 0.10
(0.043 0.004)
B
ø1.50 MIN
(ø0.059 MIN)
8.00 0.10
(0.315 0.004)
Section B-B
AO=5.30 0.10
(0.209 0.004)
Eꢀbossed Carrier
Dimensions
mm
(inches)
NOTES:
1. A0 & B0 measured at 0.3mm above base of pocket.
2. 10 pitches cumulative tol. 0.2mm
Section A-A
Eꢀbossꢀent
For additional information please visit our website at: www.clare.com
Clare, Inc. ꢀakes no representations or warranties with respect to the accuracy or coꢀpleteness of the contents of this publication and reserves the right to ꢀake changes to specifications and
product descriptions at any tiꢀe without notice. Neither circuit patent licenses nor indeꢀnity are expressed or iꢀplied. Except as set forth in Clare’s Standard Terꢀs and Conditions of Sale,
Clare, Inc. assuꢀes no liability whatsoever, and disclaiꢀs any express or iꢀplied warranty, relating to its products including, but not liꢀited to, the iꢀplied warranty of ꢀerchantability, fitness for
a particular purpose, or infringeꢀent of any intellectual property right.
The products described in this docuꢀent are not designed, intended, authorized or warranted for use as coꢀponents in systeꢀs intended for surgical iꢀplant into the body, or in other
applications intended to support or sustain life, or where ꢀalfunction of Clare’s product ꢀay result in direct physical harꢀ, injury, or death to a person or severe property or environꢀental
daꢀage. Clare, Inc. reserves the right to discontinue or ꢀake changes to its products at any tiꢀe without notice.
Specification: DS-MX877-20110729
©Copyright 2011, Clare, Inc.
mll rights reserved. Printed in USm.
7/29/2011
July 29, 2011
www.clare.com
11
相关型号：
©2020 ICPDF网 联系我们和版权申明