CY25701JXC-ZZZ [CYPRESS]

Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No-Spread Spectrum (XO) Option; 可编程高频晶体振荡器,带有扩频( SSXO )和无扩频( XO )选项
CY25701JXC-ZZZ
型号: CY25701JXC-ZZZ
厂家: CYPRESS    CYPRESS
描述:

Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No-Spread Spectrum (XO) Option
可编程高频晶体振荡器,带有扩频( SSXO )和无扩频( XO )选项

振荡器 晶体振荡器 石英晶振
文件: 总7页 (文件大小:215K)
中文:  中文翻译
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CY25701JXC/FJXC  
Programmable High-Frequency Crystal Oscillator with Spread  
Spectrum (SSXO) and No-Spread Spectrum (XO) Option  
Features  
Benefits  
• Crystal Oscillator with Spread Spectrum Clock (SSXO)  
• No-Spread Spectrum (XO) Option  
• Provides wide range of spread percentages for  
maximum electromagnetic interference (EMI)  
reduction, to meet regulatory agency electromagnetic  
compliance (EMC) requirements. Reduces devel-  
opment and manufacturing costs and time-to-market.  
• Wide operating output clock frequency range of  
10–166 MHz  
• Programmable spread spectrum with nominal 31.5-kHz  
modulation frequency  
• This versatile programming feature enables the users  
to switch between SSXO (with Spread) and XO (without  
Spread) functions with ease.  
• Center spread: ±0.25% to ±2.0%  
• Down spread: –0.5% to –4.0%  
• No spread: ± 0.0%  
• Internal PLL to generate up to 166-MHz output.  
• Suitable for most PC, consumer, and networking  
applications  
• Integrated phase-locked loop (PLL)  
• 85 ps typical cycle-to-cycle Jitter with SSCLK = 133MHz  
• 3.3V operation  
• Application compatibility in standard and low-power  
systems  
• In-house programming of samples and prototype  
quantities is available using the CY3672 programming  
kit and CY3613 (JEC package) socket adapters.  
Production quantities are available through Cypress’  
value-added distribution partners or by using  
third-party programmers from BP Microsystems, HiLo  
Systems, and others.  
• Output Enable function  
• Package available in 4-pin Plastic JE  
• Pb-free package  
Pin Configuration  
Logic Block Diagram  
CY25701JXC/FJXC  
4-pin Plastic JE  
RFB  
PLL  
with  
MODULATION  
CONTROL  
1
2
OE  
VDD  
4
3
CXIN  
OUTPUT  
DIVIDERS  
and  
SSCLK  
PROGRAMMABLE  
CONFIGURATION  
VSS  
3
SSCLK  
MUX  
CXOUT  
1
OE  
4
2
VDD  
VSS  
Cypress Semiconductor Corporation  
Document #: 38-07684 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 27, 2006  
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CY25701JXC/FJXC  
Pin Definition  
Pin  
Name  
Description  
1
2
3
4
OE  
Output Enable pin: Active HIGH. If OE = 1, SSCLK is enabled.  
Power supply ground.  
VSS  
SSCLK  
VDD  
Spread spectrum clock output (with or without spread).  
3.3V power supply.  
Functional Description  
Programming Description  
The CY25701JXC/FJXC is a Spread Spectrum Crystal Oscil-  
lator (SSXO) IC used for the purpose of reducing EMI found in  
today’s high-speed digital electronic systems.  
Field/Factory-Programmable CY25701JXC/FJXC  
Field/Factory programming is available for samples and  
manufacturing by Cypress and its distributors. All requests  
must be submitted to the local Cypress Field Application  
Engineer (FAE) or sales representative. Once the request has  
been processed, you will receive a new part number, samples,  
and data sheet with the programmed values. This part number  
will be used for additional sample requests and production  
orders.  
The device uses a Cypress proprietary PLL and Spread  
Spectrum Clock (SSC) technology to synthesize and modulate  
the frequency of the embedded input crystal. By frequency  
modulating the clock, the measured EMI at the fundamental  
and harmonic frequencies are greatly reduced. This reduction  
in radiated energy can significantly reduce the cost of  
complying with regulatory agency (EMC) requirements and  
improve time-to-market without degrading system perfor-  
mance.  
Additional information on the CY25701JXC/FJXC can be  
obtained from the Cypress web site at www.cypress.com.  
Output Frequency, SSCLK Output (SSCLK, pin 3)  
The CY25701JXC/FJXC uses a programmable configuration  
memory array to synthesize output frequency and spread%.  
The modulated frequency at the SSCLK output is produced by  
synthesizing from the embedded crystal oscillator frequency  
input. The range of synthesized clock is from 10–166 MHz.  
The spread% is programmed to either center spread or down  
spread with various spread percentages. The range for center  
spread is from ±0.25% to ±2.00%. The range for down spread  
is from –0.5% to –4.0%. Contact the factory for smaller or  
larger spread% amounts if required. Refer to Table 2 for  
spread selection and no-spread values.  
Spread Percentage (SSCLK, pin 3)  
The SSCLK spread can be programmed to various spread  
percentage values from ±0.25% to ±2.0% for Center Spread  
and from –0.5% to –4.0% for Down Spread. Refer to Table 2  
for available spread options. Enter ±0.0% (No spread) for XO  
(Crystal Oscillator) without spread option.  
The frequency modulated SSCLK output can be programmed  
from 10–166 MHz.  
The CY25701JXC/FJXC is available in a 4-pin plastic package  
with operating temperature range of –20 to 70°C.  
Frequency Modulation (SSCLK, pin 3)  
The frequency modulation is programmed at 31.5 kHz for all  
SSCLK frequencies from 10 to 166 MHz. Contact the factory  
if a higher-modulation frequency is required.  
Table 1. Programming Data Requirement  
Pin Function  
Pin Name  
Pin#  
Output Frequency  
Spread Percent Code[1]  
Frequency Modulation  
SSCLK  
SSCLK  
SSCLK  
3
3
3
%
Units  
MHz  
kHz  
31.5  
Program Value  
ENTER DATA  
ENTER DATA  
Table 2. Spread Percent Selection  
Center Spread  
Code  
Percentage  
Code  
A
B
C
±0.75%  
J
D
E
F
Z
±0.25%  
G
±0.5%  
H
±1.0%  
K
±1.5%  
L
±2.0%  
M
±0.0%  
Z
Down Spread  
Percentage  
–0.5%  
–1.0%  
–1.5%  
–2.0%  
–3.0%  
–4.0%  
±0.0%  
Note:  
1. ±0.0% or Code “Z” for XO (No-Spread) option.  
Document #: 38-07684 Rev. *E  
Page 2 of 7  
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CY25701JXC/FJXC  
Storage Temperature (Non-condensing) .... –55°C to +100°C  
Junction Temperature................................ –40°C to +125°C  
Data Retention @ Tj = 125°C................................> 10 years  
Package Power Dissipation...................................... 350 mW  
Absolute Maximum Rating  
Supply Voltage (VDD).................................... –0.5V to +7.0V  
DC Input Voltage....................................–0.5V to VDD + 0.5V  
Operating Conditions  
Parameter  
VDD  
Description  
Min.  
3.00  
–20  
Typ.  
3.30  
Max. Unit  
Supply Voltage  
3.60  
70  
V
°C  
TA  
Ambient Temperature  
Max. Load Capacitance @ pin 3  
CLOAD  
FSSCLK  
FMOD  
TPU  
15  
pF  
SSCLK output frequency, CLOAD = 15 pF  
Spread Spectrum Modulation Frequency  
10  
166  
33.0  
500  
MHz  
kHz  
ms  
30.0  
31.5  
Power-up time for VDD to reach minimum specified voltage (power ramp must 0.05  
be monotonic)  
DC Electrical Characteristics  
Parameter  
Description  
Condition  
VOH = VDD – 0.5, VDD = 3.3V (source)  
VOL = 0.5, VDD= 3.3V (sink)  
CMOS levels, 70% of VDD  
CMOS levels, 30% of VDD  
Vin = VDD  
Min.  
10  
Typ.  
Max. Unit  
IOH  
IOL  
VIH  
VIL  
IIH  
Output High Current (pin 3)  
Output Low Current (pin 3)  
Input High Voltage (pin 1)  
Input Low Voltage (pin 1)  
Input High Current (pin 1)  
Input Low Current (pin 1)  
12  
12  
mA  
mA  
V
10  
0.7VDD  
VSS  
VDD  
0.3VDD  
10  
V
µA  
µA  
µA  
pF  
mA  
IIL  
Vin = VSS  
10  
IOZ  
Output Leakage Current (pin 3) Three-state output, OE = 0  
–10  
10  
[2]  
CIN  
Input Capacitance (pin 1)  
Supply Current  
Pin 1, or OE  
5
7
IVDD  
VDD = 3.3V, SSCLK = 10 to 166 MHz, CLOAD  
= 0, OE = VDD  
50  
f  
Aging  
TA = 25°C, First year  
–5  
5
ppm  
AC Electrical Characteristics[2]  
Parameter  
Description  
Output Duty Cycle  
Condition  
Min.  
45  
Typ.  
50  
Max.  
55  
Unit  
%
DC  
tR  
SSCLK, Measured at VDD/2  
Output Rise Time  
Output Fall Time  
20%–80% of VDD, CL = 15 pF  
2.7  
ns  
tF  
20%–80% of VDD, CL = 15 pF  
2.7  
ns  
[3]  
TCCJ1  
Cycle-to-Cycle Jitter SSCLK  
(Pin 3)  
SSCLK 133 MHz, Measured at VDD/2  
25 MHz SSCLK <133 MHz, Measured at  
VDD/2  
85  
215  
200  
400  
ps  
ps  
SSCLK < 25 MHz, Measured at VDD/2  
1% of  
1/SSCK  
s
TOE1  
TOE2  
Output Disable Time (pin1 = OE) Time from falling edge on OE to stopped  
outputs (Asynchronous)  
150  
150  
350  
350  
10  
ns  
ns  
ms  
Output Enable Time (pin1 = OE) Time from rising edge on OE to outputs at a  
valid frequency (Asynchronous)  
TLOCK  
PLL Lock Time  
Time for SSCLK to reach valid frequency  
Notes:  
2. Guaranteed by characterization, not 100% tested.  
3. Jitter is configuration dependent. Actual jitter is dependent on output frequencies, spread percentage, temperature, and output load. For more information, refer  
to the application note, “Jitter in PLL Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html, or contact your  
local Cypress Field Application Engineer.  
Document #: 38-07684 Rev. *E  
Page 3 of 7  
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CY25701JXC/FJXC  
Application Circuit  
0.1 µF  
Power  
3
4
SSCLK  
VDD  
CY25701  
VSS  
2
OE  
1
VDD  
Figure 1. Application Circuit Diagram  
Switching Waveforms  
Duty Cycle Timing (DC = t1A/t1B  
)
t
1B  
t
1A  
SSCLK  
Figure 2. Duty Cycle Waveform  
Output Rise/Fall Time  
VDD  
0V  
SSCLK  
Tr  
Tf  
Output Rise time (Tr) = (0.6 x V )/SR1 (or SR3)  
DD  
Output Fall time (Tf) = (0.6 x V )/SR2 (or SR4)  
DD  
Refer to AC Electrical Characteristics table for SR (Slew Rate) values.  
Figure 3. Output Rise/Fall Time Waveform  
Output Enable/Disable Timing  
VDD  
VIH  
OUTPUT  
ENABLE  
TOE2  
VIL  
0V  
High Impedance  
SSCLK  
(Asynchronous  
)
TOE1  
Figure 4. Output Enable/Disable Timing Waveforms  
Document #: 38-07684 Rev. *E  
Page 4 of 7  
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CY25701JXC/FJXC  
Informational Graphs [4]  
172.5  
169.5  
169  
168.5  
Spread Spectrum Profile: Fnom=166MHz,  
Fmod=30kHz, Spread%= +/-1%  
171.5  
Spread Spectrum Profile: Fnom=166MHz,  
Fmod=30kHz, Spread%= -4%  
170.5  
169.5  
168  
167.5  
167  
168.5  
167.5  
166.5  
166.5  
Fnominal  
166  
165.5  
165  
164.5  
164  
163.5  
163  
Fnominal  
165.5  
164.5  
163.5  
162.5  
161.5  
160.5  
159.5  
162.5  
0
20  
40  
60  
80  
100 120 140  
Time (us)  
160 180 200  
0
20  
40  
60  
80  
100  
120  
140 160 180  
200  
Time (us)  
68.5  
68  
Spread Spectrum Profile: Fnom=66MHz,  
Fmod=30kHz, Spread%= -4%  
67.5  
Spread Spectrum Profile: Fnom=66MHz,  
Fmod=30kHz, Spread%= +/-1%  
67  
66.5  
66  
67.5  
67  
66.5  
66  
Fnominal  
Fnominal  
65.5  
65  
65.5  
64.5  
64  
65  
63.5  
64.5  
0
20  
40  
60  
80  
100  
Time (us)  
120  
140 160  
180  
200  
0
20  
40  
60 80  
100 120 140 160 180 200  
Time (us)  
Ordering Information  
Part Number[5,6]  
Lead-free (Pb-free)  
CY25701JXC–ZZZ  
CY25701JXC–ZZZT  
CY25701FJXC  
Package description  
Product Flow  
4-Lead Plastic JE SMD  
Commercial, –20° to 70°C  
Commercial, –20° to 70°C  
Commercial, –20° to 70°C  
Commercial, –20° to 70°C  
4-Lead Plastic JE SMD - Tape and Reel  
4-Lead Plastic JE SMD  
CY25701FJXCT  
4-Lead Plastic JE SMD - Tape and Reel  
Notes:  
4. The “Informational Graphs” are meant to convey the typical performance levels. No performance specifications is implied or guaranteed. Refer to the tables on  
pages 4 and 5 for device specifications.  
5. “ZZZ” denotes the assigned product dash number. This number will be assigned by factory after the output frequency and spread percent programming data is  
received from the customer.  
6. “FJXC” suffix is used for products programmed in field by Cypress distributors.  
Document #: 38-07684 Rev. *E  
Page 5 of 7  
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CY25701JXC/FJXC  
Package Drawings and Dimensions  
4-Lead (10.2x5.6mm) JEC JE04A  
10.2 0.ꢀ  
(10.5 MAX)  
4
1.0 0.2  
(1.0)  
ꢀ.6  
5.0  
5.6 0.2  
(5.8 MAX)  
1.0 0.2  
(1.0)  
1
1.ꢀ  
2.1  
+0.2  
-0.1  
2.5  
2.4  
(2.7 MAX)  
4.6  
0.1  
0.15 0.1  
0.51  
(0.05 MIN)  
5.08 0.1  
DIMENSIONS IN MILLIMETERS  
REFERENCE JEDEC: N/A  
PKG. WEIGHT: 0.24 gms  
5.08  
RECOMMENDED SOLDERING PATTERN  
51-85204-*A  
All product and company names mentioned in this document are the trademarks of their respective holders.  
Document #: 38-07684 Rev. *E  
Page 6 of 7  
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be  
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its  
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
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CY25701JXC/FJXC  
Document History Page  
Document Title: CY25701JXC/FJXC Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO)  
and No-Spread Spectrum (XO) Option  
Document Number: 38-07684  
Orig. of  
REV.  
**  
ECN NO. Issue Date Change  
Description of Change  
224108  
258974  
See ECN  
See ECN  
RGL  
RGL  
New data sheet  
*A  
Corrected the product suffix (lead-free) in the ordering information table  
Added note 4  
*B  
*C  
*D  
279379  
392505  
414085  
See ECN  
See ECN  
See ECN  
RGL  
RGL  
RGL  
Added ordering part numbers  
Added 4pin LCC SMD package  
Added Spread OFF (XO) programming function  
Edited CY3724 socket adapter  
*E  
436961  
See ECN  
RGL  
Changed the Marketing part number from CY25701 to CY25701JXC/FJXC  
Removed all Ceramic Package references  
Document #: 38-07684 Rev. *E  
Page 7 of 7  
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