MB3771PF-G-BND-JN-ERE1 [CYPRESS]

1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, 5.30 X 6.35 MM, 2.25 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, SOP-8;
MB3771PF-G-BND-JN-ERE1
型号: MB3771PF-G-BND-JN-ERE1
厂家: CYPRESS    CYPRESS
描述:

1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8, 5.30 X 6.35 MM, 2.25 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, SOP-8

光电二极管
文件: 总22页 (文件大小:315K)
中文:  中文翻译
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MB3771  
Power Supply Monitor  
Description  
The Cypress MB3771 is designed to monitor the voltage level of one or two power supplies (+5 V and an arbitrary voltage) in a  
microprocessor circuit, memory board in large-size computer, for example.  
If the circuit’s power supply deviates more than a specified amount, then the MB3771 generates a reset signal to the microprocessor.  
Thus, the computer data is protected from accidental erasure.  
Using the MB3771 requires few external components. To monitor only a +5 V supply, the MB3771 requires the connection of one  
external capacitor. The level of an arbitrary detection voltage is determined by two external resistors. The MB3771 is available in an  
8-pin Dual In-Line, Single In-Line Package or space saving Flat Package.  
Features  
Precision voltage detection (VSA = 4.2 V ± 2.5 %)  
User selectable threshold level with hysteresis (VSB = 1.23 V ± 1.5 %)  
Monitors the voltage of one or two power supplies (5 V and an arbitrary voltage, >1.23 V)  
Usable as over voltage detector  
Low voltage output for reset signal (VCC = 0.8 V Typ)  
Minimal number of external components (one capacitor Min)  
Low power dissipation (ICC = 0.35 mA Typ, VCC = 5 V)  
Detection threshold voltage has hysteresis function  
Reference voltage is connectable.  
One type of package (SOP-8pin : 1 type)  
Application  
Industrial Equipment  
Arcade Amusement etc.  
Cypress Semiconductor Corporation  
Document Number: 002-08511 Rev. *D  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 28, 2017  
 
 
 
MB3771  
Contents  
Description ............................................................................. 1  
Features .................................................................................. 1  
Application ............................................................................. 1  
Contents ................................................................................. 2  
1. Pin Assignment ................................................................. 3  
2. Block Diagram ................................................................... 3  
3. Functional Descriptions .................................................... 4  
4. Function Explanation ........................................................ 4  
5. Absolute Maximum Ratings ............................................. 5  
6. Recommended Operating Conditions ............................. 5  
7. Electrical Characteristics .................................................. 6  
7.1 DC Characteristics ..................................................... 6  
7.2 AC Characteristics ...................................................... 7  
8. Application Circuit ............................................................. 8  
8.1 5V Power Supply Monitor ........................................... 8  
8.2 5V Power Supply Voltage Monitor  
(VCC = 5 V) .................................................................... 11  
8.7 5 V Power Supply Monitor with Non-inverted  
RESET ............................................................................ 11  
8.8 Supply Voltage Monitoring with Delayed Trigger ..... 11  
8.9 Dual (Positive/Negative) Power Supply Voltage  
Monitoring (VCC = 5 V, VEE = Negative Power Supply). 12  
8.10 Reference Voltage Generation and Voltage Sagging  
Detection ........................................................................ 12  
8.11 Low Voltage and Over Voltage Detection  
(VCC = 5 V) .................................................................... 14  
8.12 Detection of Abnormal State of Power Supply System  
(VCC = 5 V) .................................................................... 14  
8.13 Back-up Power Supply System (VCC = 5 V) ......... 15  
9. Typical Characteristics ................................................... 17  
10. Notes on Use .................................................................. 19  
11. Ordering Information ..................................................... 19  
12. RoHS Compliance Information ..................................... 19  
13. Package Dimensions ..................................................... 20  
Document History ................................................................ 21  
Sales, Solutions, and Legal Information ........................... 22  
(Externally Fine-Tuned Type) ........................................... 8  
8.3 Arbitrary Voltage Supply Monitor ................................ 9  
8.4 5 V and 12 V Power Supply Monitor (2 types of power  
supply monitor VCC1 = 5 V, VCC2 =12 V) ..................... 10  
8.5 5 V and 12 V Power Supply Monitor (RESET signal is  
generated by 5 V, VCC1 = 5 V, VCC2 = 12 V) ............... 10  
8.6 5 V Power Supply Monitor with forced RESET input  
Document Number: 002-08511 Rev. *D  
Page 2 of 22  
 
MB3771  
1. Pin Assignment  
(TOP VIEW)  
CT  
VSC  
1
2
3
4
8
7
6
5
RESET  
VSA  
OUTC  
GND  
VSB RESIN  
VCC  
(SOE008)  
2. Block Diagram  
VCC  
5
1.24 V  
1.24 V  
REFERENCE VOLTAGE  
100 kΩ  
40 kΩ  
+
+
12 μA  
10 μA  
V
SA  
7
6
2
V
SC  
Comp. A  
+
+
Comp. C  
+
R
S
Q
V
SB / RESIN  
Comp. B  
4
GND  
1
8
3
OUT  
C
CT  
RESET  
Document Number: 002-08511 Rev. *D  
Page 3 of 22  
 
MB3771  
3. Functional Descriptions  
Comparators Comp.A and Comp.B apply a hysteresis to the detected voltage, so that when the voltage at either the VSA or VSB pin  
falls below 1.23 V the RESET output signal goes to “low” level.  
Comp. B may be used to detect any given voltage(8.Application Circuit 8.3 : Arbitrary Voltage Supply Monitor), and can also be used  
as a forced reset pin (with reset hold time) with TTL input (8.Application Circuit 8.6 : 5V Power Supply Monitor with forced RESET input  
(VCC = 5 V) ).  
Note that if Comp.B is not used, the VSB pin should be connected to the VCC pin (8.Application Circuit 8.1 : 5V Power Supply Monitor).  
Instantaneous breaks or drops in the power supply can be detected as abnormal conditions by the MB3771 within a 2 µs interval.  
However because momentary breaks or drops of this duration do not cause problems in actual systems in some cases, a delayed  
trigger function can be created by connecting capacitors to the VSA or VSB pin (8.Application Circuit 8.8 : Supply Voltage Monitoring  
with Delayed Trigger).  
Because the RESET output has built-in pull-up resistance, there is no need to connect to external pull-up resistance when connected  
to a high impedance load such as a CMOS logic IC.  
Comparator Comp. C is an open-collector output comparator without hysteresis, in which the polarity of input/output characteristics  
is reversed. Thus Comp. C is useful for over-voltage detection (8.Application Circuit 8.11 : Low Voltage and Over Voltage Detection  
(VCC = 5 V) ) and positive logic RESET signal output (8.Application Circuit 8.7 : 5 V Power Supply Monitor with Non-inverted RESET),  
as well as for creating a reference voltage (8.Application Circuit 8.10 : Reference Voltage Generation and Voltage Sagging Detection).  
Note that if Comp. C is not used, the VSC pin should be connected to the GND pin (Application Circuit 1 : 5V Power Supply Monitor).  
4. Function Explanation  
V
HYS  
V
S
V
CC  
0.8 V  
t
t
V
CC  
1
2
3
4
8
7
6
5
RESET  
C
T
T
PO  
TPO  
RESET  
(1)  
(2) (3)  
(4) (5) (6)  
(7)  
(8)  
1. When VCC rises to about 0.8V, RESET goes low.  
2. When VCC reaches VS +VHYS, CT then begins charging. RESET remains low during this time  
3. RESET goes high when CT begins charging.  
TPO CT × 10 5 (Refer to “CT pin capacitance vs. reset hold time” in “9.Typical Characteristics”.)  
4. When VCC level drops lower then VS, then RESET goes low and CT starts discharging.  
5. When VCC level reaches VS + VHYS, then CT starts charging.  
In the case of voltage sagging, if the period from the time VCC goes lower than or equal to VS to the time VCC reaches VS +VHYS  
again, is longer than tPI, (as specified in the 7.2.AC Characteristics), CT is discharged and charged successively.  
6. After TPO passes, and VCC level exceeds VS + VHYS, then RESET goes high.  
7. Same as Point 4.  
8. RESET remains low until VCC drops below 0.8V.  
Document Number: 002-08511 Rev. *D  
Page 4 of 22  
MB3771  
5. Absolute Maximum Ratings  
Rating  
Parameter  
Symbol  
Unit  
Min  
0.3  
0.3  
0.3  
0.3  
Max  
Power supply voltage  
Input voltage  
VCC  
VSA  
VSB  
VSC  
PD  
+20  
VCC + 0.3 ( < +20)  
+20  
V
V
V
+20  
V
Power dissipation  
200 (Ta 85°C)  
+125  
mW  
°C  
Storage temperature  
Tstg  
55  
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in  
excess of absolute maximum ratings. Do not exceed these ratings.  
6. Recommended Operating Conditions  
Value  
Parameter  
Symbol  
Unit  
Min  
Max  
Power supply voltage  
Output current  
VCC  
IRESET  
IOUTC  
Ta  
3.5  
18  
V
0
0
20  
6
mA  
mA  
°C  
Operating ambient temperature  
40  
+85  
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device.  
All of the device’s electrical characteristics are warranted when the device is operated within these ranges.  
Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges  
may adversely affect reliability and could result in device failure.  
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users  
considering application outside the listed conditions are advised to contact their Cypress representatives beforehand.  
Document Number: 002-08511 Rev. *D  
Page 5 of 22  
MB3771  
7. Electrical Characteristics  
7.1 DC Characteristics  
(VCC = 5 V, Ta = + 25°C)  
Value  
Parameter  
Symbol  
Conditions  
Unit  
Min  
Typ  
350  
400  
4.20  
4.20  
4.30  
4.30  
100  
1.230  
1.230  
3
Max  
500  
600  
4.30  
4.35  
4.40  
4.45  
150  
1.248  
1.260  
10  
Power supply current  
Detection voltage  
ICC1  
ICC2  
VSB = 5 V, VSC = 0 V  
VSB = 0 V, VSC = 0 V  
VCC  
µA  
µA  
V
VSAL  
(DOWN)  
4.10  
4.05  
4.20  
4.15  
50  
1.212  
1.200  
Ta = 40°C to +85°C  
VCC  
V
VSAH (UP)  
V
Ta = 40°C to +85°C  
V
Hysteresis width  
Detection voltage  
VHYSA  
VSB  
mV  
V
VSB  
Ta = 40°C to +85°C  
VCC = 3.5 V to 18 V  
V
Deviation of detection voltage  
Hysteresis width  
ΔVSB  
VHYSB  
IIHB  
mV  
mV  
nA  
nA  
V
14  
28  
42  
Input current  
VSB = 5 V  
0
250  
250  
IILB  
VSB = 0 V  
20  
Output voltage  
VOHR  
VOLR  
IRESET = 5 μA, VSB = 5 V  
IRESET = 3mA, VSB = 0 V  
IRESET = 10mA, VSB = 0 V  
VOLR = 1.0 V, VSB = 0 V  
VSB = 5 V, VCT = 0.5 V  
VSC = 5 V  
4.5  
4.9  
0.28  
0.38  
40  
0.4  
V
0.5  
V
Output sink current  
CT charge current  
Input current  
IRESET  
ICT  
20  
9
mA  
µA  
nA  
nA  
V
12  
16  
IIHC  
0
500  
500  
1.265  
1.285  
10  
IILC  
VSC = 0 V  
50  
Detection voltage  
VSC  
1.225  
1.205  
1.245  
1.245  
3
Ta = 40°C to +85°C  
VCC = 3.5 V to 18 V  
VOHC = 18 V  
V
Deviation of detection voltage  
Output leakage current  
Output voltage  
ΔVSC  
IOHC  
mV  
µA  
V
0
1
VOLC  
IOUTC  
VCCL  
IOUTC = 4 mA, VSC = 5 V  
VOLC = 1.0 V, VSC = 5 V  
VOLR = 0.4 V, IRESET = 200 µA  
0.15  
15  
0.4  
Output sink current  
6
mA  
V
Reset operation minimum  
supply voltage  
0.8  
1.2  
Document Number: 002-08511 Rev. *D  
Page 6 of 22  
MB3771  
7.2 AC Characteristics  
Parameter  
(VCC = 5 V, Ta = + 25°C, CT = 0.01 µF)  
Value  
Unit  
Symbol  
Conditions  
Min  
5.0  
0.5  
Typ  
Max  
VSA, VSB input pulse width  
Reset hold time  
tPI  
tPO  
tr  
µs  
ms  
µs  
µs  
µs  
µs  
µs  
1.0  
1.0  
0.1  
2
1.5  
1.5  
0.5  
10  
RESET rise time  
RL = 2.2 k,  
CL = 100 pF  
RESET fall time  
tf  
1
Propagation delay time  
tPD*  
2
tPHL  
*
*
RL = 2.2 k,  
CL = 100 pF  
0.5  
1.0  
2
tPLH  
*1: In case of VSB termination.  
*2: In case of VSC termination.  
Document Number: 002-08511 Rev. *D  
Page 7 of 22  
MB3771  
8. Application Circuit  
8.1 5V Power Supply Monitor  
Monitored by VSA. Detection threshold voltage is VSAL and VSAH  
VCC  
MB3771  
1
2
3
4
8
7
6
5
RESET  
Logic  
circuit  
CT  
8.2 5V Power Supply Voltage Monitor (Externally Fine-Tuned Type)  
The VSA detection voltage can be adjusted externally.  
Resistance R1 and R2 are set sufficiently lower than the IC internal partial voltage resistance, so that the detection voltage can be set  
using the ratio between resistance R1 and R2. (Refer to the table below).  
R1, R2 calculation formula (when R1 << 100 k, R2 <<40 k)  
VSAL (R1 + R2 ) × VSB /R2 [V], VSAH (R1 + R2 ) × (VSB + VHYSB) / R2 [V]  
R1 (k)  
10  
R2 (k)  
3.9  
Detection voltage : VSAL (V)  
Detection voltage : VSAH (V)  
4.37  
4.11  
4.47  
4.20  
9.1  
3.9  
VCC  
MB3771  
1
2
8
7
RESET  
R
1
2
Logic  
Circuit  
C
T
3
4
6
5
R
Document Number: 002-08511 Rev. *D  
Page 8 of 22  
MB3771  
8.3 Arbitrary Voltage Supply Monitor  
8.3.1 Case: VCC 18 V  
Detection Voltage can be set by R1 and R2.  
Detection Voltage = (R1 + R2) VSB/R2  
Connect Pin 7 to VCC when VCC less than 4.45 V.  
Pin 7 can be opened when VCC greater than 4.45 V  
Power Dissipation can be reduced.  
Note: Hysteresis of 28 mV at VSB at termination is available.  
Hysteresis width dose not depend on (R1 + R2).........  
V
CC  
MB3771  
1
8
7
RESET  
2
R
R
1
2
C
T
3
4
6
5
8.3.2 Monitoring VCC > 18 V  
Detection Voltage can be set by R1 and R2  
Detection Voltage = (R1 + R2) × VSB/R2  
The RESET signal output is 0V (low level) and 5 V (high level). VCC voltage cannot be output.  
Do not pull up RESET to VCC  
.
Changing the resistance ratio between R4 and R5 changes the constant voltage output, thereby changing the voltage of the  
high level RESET output. Note that the constant voltage output should not exceed 18 V.  
The 5 V output can be used as a power supply for control circuits with low current consumption.  
In setting the R3 resistance level, caution should be given to the power consumption in the resistor. The table below lists  
sample resistance values for reference (using 1/4 Ω resistance).  
Detection  
RESET Output min. power  
supply voltage (V)  
Output Current  
(mA)  
VCC (V)  
140  
R1 (M)  
1.6  
R2 (k)  
R3 (k)  
110  
voltage (V)  
100  
6.7  
20  
20  
20  
< 0.2  
< 0.5  
< 1.6  
100  
40  
81  
33  
3.8  
1.4  
1.3  
56  
11  
0.51  
Values are actual measured values (using IOUTC = 100 μA, VOLC = 0.4 V). Lowering the resistance value of R3 reduces the  
minimum supply voltage of the RESET output, but requires resistance with higher allowable loss.  
V
CC  
R3  
5 V output(Stablized)  
1
2
R
4
:
8
7
RESET  
100 kΩ  
CT  
R
1
2
3
4
6
5
0.47 μF  
R5:  
33 kΩ  
R
Document Number: 002-08511 Rev. *D  
Page 9 of 22  
MB3771  
8.4 5 V and 12 V Power Supply Monitor (2 types of power supply monitor VCC1 = 5 V, VCC2 =12 V)  
5 V is monitored by VSA. Detection voltage is about 4.2 V  
12 V is monitored by VSB. When R1 = 390 kΩ and R2 = 62 kΩ, Detection voltage is about 9.0 V.Generally the detection voltage is  
determined by the following equation.  
Detection Voltage = (R1 + R2) × VSB/R2  
V
V
CC2  
CC1  
MB3771  
1
8
7
6
5
RESET  
R
1
2
: 390 kΩ  
: 62 kΩ  
2
3
4
Logic  
circuit  
C
T
R
8.5 5 V and 12 V Power Supply Monitor (RESET signal is generated by 5 V, VCC1 = 5 V, VCC2 = 12 V)  
5 V is monitored by VSA, and generates RESET signal when VSA detects voltage sagging.  
12 V is monitored by VSC, and generates its detection signal at OUTC.  
The detection voltage of 12 V monitoring and its hysteresis is determined by the following equations.  
R1 + R2 + R3  
Detection voltage =  
Hysteresis width =  
× VSC  
(8.95 V in the circuit above)  
R2 + R3  
R1 (R3 R3 // R4)  
(R2 + R3) (R2 + R3 // R4)  
× VSC  
(200 mV in the circuit above)  
V
V
CC2  
CC1  
R
L
: 10 kΩ  
MB3771  
R : 100 kΩ  
5
R : 390 kΩ  
1
1
2
3
4
RESET  
IRQ  
8
7
6
5
or  
Port Logic Circuit  
R
2
3
: 33 kΩ  
: 30 kΩ  
R4: 510 kΩ  
CT  
R
Document Number: 002-08511 Rev. *D  
Page 10 of 22  
MB3771  
8.6 5 V Power Supply Monitor with forced RESET input (VCC = 5 V)  
RESIN is an TTL compatible input.  
RESIN  
V
CC  
MB3771  
1
8
RESET  
2
3
4
7
6
5
C
T
Logic Circuit  
8.7 5 V Power Supply Monitor with Non-inverted RESET  
In this case, Comparator C is used to invert RESET signal. OUTC is an open-collector output.  
RL is used an a pull-up resistor.  
V
CC  
MB3771  
R : 10 kΩ  
L
1
8
7
6
5
CT  
2
3
4
RESET  
8.8 Supply Voltage Monitoring with Delayed Trigger  
When the voltage shown in the diagram below is applied at VCC, the minimum value of the input pulse width is increased to 40 µs  
(when C1 = 1000 pF).  
The formula for calculating the minimum value of the input pulse width [TPI] is:  
TPI [µs] 4 × 10-2 × C1 [pF]  
TP  
VCC 5 V  
4 V  
MB3771  
1
8
7
6
5
RESET  
2
3
4
CT  
C1  
Document Number: 002-08511 Rev. *D  
Page 11 of 22  
MB3771  
8.9 Dual (Positive/Negative) Power Supply Voltage Monitoring (VCC = 5 V, VEE = Negative Power Supply)  
Monitors a 5 V and a negative (any given level) power supply. R1, R2, and R3 should be the same value.  
Detection Voltage = VSB VSB × R4/R3  
Example if VEE = 5 V, R4 = 91 kΩ  
Then the detected voltage = 4.37 V  
In cases where VEE may be output when VCC is not output, it is necessary to use a Schottky barrier diode (SBD).  
V
CC  
R5 : 5.1 kΩ  
MB3771  
8
7
1
2
RESET  
: 20 kΩ  
R
4
V
EE  
R
1
2
R3 :  
20 kΩ  
6
5
3
4
0.22 μF  
CT  
R
: 20 kΩ  
SBD  
8.10 Reference Voltage Generation and Voltage Sagging Detection  
8.10.1 9V Reference Voltage Generation and 5V/9V Monitoring  
Detection Voltage = 7.2 V  
In the above examples, the output voltage and the detection voltage are determined by the following equations:  
Detection Voltage = (R1 + R2) × VSB/R2  
15 V  
R 5 : 3 kΩ  
V
CC : 5 V  
MB3771  
8
7
6
5
1
2
3
4
RESET  
CT  
9 V (50 mA)  
R3 :  
7.5 kΩ  
R
R
1
2
: 300 kΩ  
: 62 kΩ  
0.47 μF  
R4 :  
1.2 kΩ  
Document Number: 002-08511 Rev. *D  
Page 12 of 22  
MB3771  
8.10.2 5 V Reference Voltage Generation and 5V Monitoring (No.1)  
Detection Voltage = 4.2 V  
In the above examples, the output voltage and the detection voltage are determined by the following equations:  
Output Voltage = (R3 + R4) × VSC/R4  
15 V  
R5 : 3 kΩ  
MB3771  
8
7
6
5
1
2
3
4
RESET  
C
T
5 V(50 mA)  
0.47 μF  
R
3
4
: 3.6 kΩ  
: 1.2 kΩ  
R
8.10.3 5 V Reference Voltage Generation and 5 V Monitoring (No. 2)  
The value of R1 should be calculated from the current consumption of the MB3771, the current flowing at R2 and R3, and the 5 V  
output current. The table below provides sample resistance values for reference.  
VCC (V)  
40  
R1 (k)  
11  
Output Current (mA)  
< 1.6  
< 1.4  
< 0.6  
24  
6.2  
15  
4.7  
V
CC  
R1  
1
2
8
7
RESET  
5 V  
3
4
6
5
CT  
R2 :  
100 kΩ  
0.47 μF  
R3  
: 33 kΩ  
GND  
8.10.4 1.245 V Reference Voltage Generation and 5 V Monitoring  
Resistor R1 determines Reference current. Using 1.2 kas R1, reference current is about 2 mA.  
VCC  
(5 V)  
R1 : 10 kΩ  
1
2
8
7
RESET  
3
4
6
5
CT  
Reference  
Voltage  
0.47 μF  
GND  
Document Number: 002-08511 Rev. *D  
Page 13 of 22  
MB3771  
8.11 Low Voltage and Over Voltage Detection (VCC = 5 V)  
VSH has no hysteresis. When over voltage is detected, RESET is held in the constant time as well as when  
low voltage is detected.  
VSL = (R1 + R2) × VSB/R2  
VSH = (R3 + R4) × VSC/R4  
V
CC  
R
R
3
4
R
R
1
MB3771  
RESET  
1
2
3
4
8
RESET  
7
6
5
CT  
2
V
CC  
V
SL  
VSH  
8.12 Detection of Abnormal State of Power Supply System (VCC = 5 V)  
This Example circuit detects abnormal low/over voltage of power supply voltage and is indicated by LED  
indicator. LED is reset by the CLEAR key.  
The detection levels of low/over voltages are determined by VSA, and R1 and R2 respectively.  
VCC  
LED  
R
1
2
MB3771  
R3  
: 620 Ω  
CLEAR  
1
8
7
6
5
R4:  
2
3
4
1 kΩ to 100 kΩ  
R
Document Number: 002-08511 Rev. *D  
Page 14 of 22  
MB3771  
8.13 Back-up Power Supply System (VCC = 5 V)  
Use CMOS Logic and connect VDD of CMOS logic with VCCO  
The back-up battery works after CS goes high as V2 < V1.  
During tPO, memory access is prohibited.  
.
CS‘s threshold voltage V1 is determined by the following equation:  
V1 = VF + (R1 + R2 + R3) × VSB/R3  
When V1 is 4.45 V or less, connect 7 pin with VCC  
.
When V1 is 4.45 V or more, 7 pin can be used to open.  
The voltage to change V2 is provided as the following equation:  
V2 = VF + (R1 + R2 + R3) × VSC/ (R2 + R3)  
However, please set V2 to 3.5 V or more.  
VCC  
V1  
V2  
t
CS  
TPO  
t
VCCO  
t
Document Number: 002-08511 Rev. *D  
Page 15 of 22  
MB3771  
VCC  
D1  
R4 >1 kΩ  
V F 0.6 V  
R 1: 100 kΩ  
R 2: 6.2 kΩ  
R 5: 100 kΩ  
MB3771  
R 6: 100 kΩ  
1
2
3
8
7
6
VCCO  
CT  
4
5
CS  
R3: 56 kΩ  
* : Diode has been added to prevent Comp.C from malfunctioning when VCC voltage is low.  
Set V1 and V2 with care given to VF temperature characteristics (typically negative temperature characteristics).  
Document Number: 002-08511 Rev. *D  
Page 16 of 22  
MB3771  
9. Typical Characteristics  
Detection voltage (VSC) vs.  
Power supply current (ICC1) vs.  
Operating ambient temperature  
power supply voltage  
700  
1.30  
600  
500  
400  
300  
200  
100  
0
Ta =  
+25°C  
40°C  
1.25  
1.20  
+85°C  
40°C  
+25°C  
+85°C  
0
5
10  
15  
20  
50  
25  
0
+25  
+50  
+75  
+100  
Power supply voltage VCC (V)  
Operating ambient temperature Ta (°C)  
Power supply current (ICC2) vs.  
power supply voltage  
Detection voltage (VSB) vs.  
Operating ambient temperature  
700  
1.30  
600  
500  
+25°C  
Ta =  
+85°C  
V
SBH  
400  
300  
200  
100  
0
40°C  
1.25  
1.20  
40°C  
V
SBL  
+25°C  
+85°C  
5
0
10  
15  
20  
50  
25  
0
+25  
+50  
+75  
+100  
Power supply voltage VCC (V)  
Operating ambient temperature Ta (°C)  
Detection voltage (VSA) vs.  
Operating ambient temperature  
Output voltage (RESET) vs. power supply voltage  
4.5  
5
4
3
2
4.4  
4.3  
VSAH  
V
SAL  
4.2  
4.1  
4.0  
Ta =  
1
+25°C  
40°C  
+85°C  
0
50  
25  
0
+25  
+50  
+75  
+100  
0
1
2
3
4
5
Operating ambient temperature Ta (°C)  
Power supply voltage VCC (V)  
(Continued)  
Document Number: 002-08511 Rev. *D  
Page 17 of 22  
MB3771  
(Continued)  
Output voltage (VOHR) vs. output current  
Detection voltage (VSB, VSC) vs. Power supply voltage  
1.27  
5.0  
4.5  
4.0  
V
SBH  
1.26  
1.25  
1.24  
1.23  
1.22  
1.21  
1.20  
V
SC  
+85°C  
V
SBL  
40°C  
Ta =  
+25°C  
0
5
10  
15  
20  
0
5  
10  
15  
Power supply voltage VCC (V)  
Output current IRESET (μA)  
Reset hold time (tPO) vs.  
power supply voltage (CT = 0.01μF)  
Output voltage (VOLR) vs. output sink current  
1.5  
2.0  
Ta = 40°C  
+85°C  
Ta =  
40°C  
+25°C  
1.0  
+85°C  
1.0  
+25°C  
0.5  
0
0
0
5
10  
15  
20  
0
10  
20  
30  
40  
50  
Output sink current IRESET (mA)  
Power supply voltage VCC (V)  
Output voltage (VOLC) vs.  
output sink current  
Reset hold time (tPO) vs. CT pin capacitance  
10  
1
1.0  
0.5  
0
40°C  
Ta =  
+25°C  
+85°C  
100 m  
Ta =  
+25°C  
+85°C  
10 m  
1 m  
40°C  
100  
10  
1
μ
μ
μ
1 p 10 p 100 p 1000 p 0.01  
μ 0.1 μ 1 μ 10 μ 100 μ  
0
5
10  
15  
20  
Output sink current IOUTC (mA)  
CT pin capacitance (F)  
Document Number: 002-08511 Rev. *D  
Page 18 of 22  
MB3771  
10. Notes on Use  
Take account of common impedance when designing the earth line on a printed wiring board.  
Take measures against static electricity.  
• For semiconductors, use antistatic or conductive containers.  
• When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.  
• The work table, tools and measuring instruments must be grounded.  
• The worker must put on a grounding device containing 250 kto 1 Mresistors in series.  
Do not apply a negative voltage  
• Applying a negative voltage of 0.3 V or less to an LSI may generate a parasitic transistor, resulting in  
malfunction.  
11. Ordering Information  
Part Number  
Package  
Remarks  
8-pin Plastic SOP  
(SOE008)  
MB3771PF-❏❏❏E1  
12. RoHS Compliance Information  
The LSI products of Cypress with “E1” are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury,  
Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) .  
The product that conforms to this standard is added “E1” at the end of the part number.  
Document Number: 002-08511 Rev. *D  
Page 19 of 22  
 
MB3771  
13. Package Dimensions  
Package Code: SOE008  
0.25  
ꢃ;  
H
D
4
D
5
4
E1  
E
INDEX AREA  
0.25  
H D  
ꢃ;  
0.40  
C A-B D  
5
BOTTOM VIEW  
TOP VIEW  
DETAIL A  
L2  
GAUGE  
PLANE  
ș
c
A
A
SEATING  
PLANE  
C
A'  
b
A1  
10  
0.10  
A-B  
e
L
L1  
SECTION A-A'  
b
0.13  
C
D
8
DETAIL A  
SIDE VIEW  
127(6  
ꢁꢂ $/', 0(16, 21ꢂ $5ꢂ, ꢂ 0, //, 0(7( ꢁ  
ꢁꢂ ', 0(16, 21, 1 $1ꢂ 7 2/(5$1&, 1 ꢂ 3( ꢂꢂ $6 0ꢂ < ꢁ ꢅ ꢇꢇ ꢁ  
DIMENSION  
SYMBOL  
MIN. NOM. MAX.  
2.25  
ꢁꢂ ', 0(16, 21, 1 , 1&/ 8'ꢂ 02/ ꢂ )/$6  ', 0(16, 21, 1 ꢂ (ꢂ '2(ꢂ 12, 1&/ 8'(  
ꢂꢂꢂ, 17(5/($ ꢂ )/$6 ꢂ 2ꢂ 3527586, 2 , 17(5/($ ꢂ )/$6 ꢂ 2ꢂ 3527586, 216  
ꢂꢂꢂꢂ 6+$/ꢂ 12ꢂ (;&(( ꢂ ꢁ ꢂ Pꢂ 3( ꢂ 6, ' ꢂ ꢂ DQ(', 0(16, 2ꢂ $5ꢂ '(7(50, 1('  
A
0.20  
0.05  
A1  
D
ꢂꢂꢂꢂ $ꢂ '$78 ꢂ  
6.35 BSC  
7.80 BSC  
5.30 BSC  
ꢁꢂ 7+ꢂ 3$&.$*ꢂ 7 2ꢂ 0$ %ꢂ 6 0$//( ꢂ 7+$ ꢂ 7+ꢂ 3$&.$*ꢂ %277 2 ꢁ  
ꢂꢂꢂꢂ ', 0(16, 21, 1 ꢂꢂ ꢂ DQ(ꢂ $5ꢂ '(7(50, 1( $ꢂ 7+ꢂ 287(50267  
ꢂꢂꢂꢂ (;75( 0(2 7+ꢂ 3/$67, ꢂ %2'ꢂ (;&/ 86, 9 2ꢂ 02/ )/$6 ꢉ  
ꢂꢂꢂꢂ 7+ꢂ %$ ꢂ %855 ꢂ *$7 %855ꢂ $1ꢂ, 17(5/($ ꢂ )/$6 %8, 1&/ 8', 1*  
ꢂꢂꢂꢂ $1ꢂ 0, 6 0$7&ꢂ %(7 :(( ꢂ 7+ꢂ 7 2ꢂ $1ꢂ %277 2 ꢂ 2ꢂ 7+ꢂ 3/$67, ꢂ %2' ꢁ  
E
E
1
ș
0°  
0.13  
0.39  
0.45  
8°  
ꢁꢂ '$780ꢂ  
ꢂ ꢂ ꢂ 7 ꢂ %'(7(50, 1( $'$78 ꢂ ꢁ  
0.20  
0.55  
0.75  
c
b
L
L
L
e
ꢁꢂ ꢍ , ꢂ 7+ꢂ 0$;, 08 180%( ꢂ 2ꢂ 7(50, 1$ꢂ 326, 7, 21ꢂ ) 2ꢂ 7+ꢂ 63(&, ), ('  
ꢂꢂꢂꢂꢂ 3$&.$*ꢂ /(1*7 ꢁ  
0.47  
ꢁꢂ 7+ꢂ ', 0(16, 2ꢂ $33/ ꢂ 7 7+ꢂ )/$ꢂ 6(&7, 2 27+ꢂ /($ ꢂ %(7 :(( ꢂ  PP  
0.60  
ꢂꢂꢂꢂ 7 ꢂ ꢁ ꢃꢅ P )52 ꢂ 7+ꢂ /($ 7,  
1.25 REF  
0.25 BSC  
1.27 BSC  
1
ꢁꢂ ', 0(16, 2 E '2(ꢂ 12, 1&/ 8'ꢂ 7+ꢂ '$ 0%$ ꢂ 3527586, 2 ꢂ $// 2 :$%/(  
ꢂꢂꢂꢂ '$ 0%$ ꢂ 3527586, 2ꢂ 6+$/ꢂ %ꢂ P 7 27$ꢂ, ꢂ (;&(627+ꢂ E ', 0(16, 21  
ꢂꢂꢂꢂ $ꢂ 0$;, 08 ꢂ 0$7(5, $ꢂ &21', 7, 2 ꢁ  
2
ꢂꢂꢂꢂ 7+ꢂ '$ 0%$ ꢂ 0$ꢂ 12%ꢂ / 2&$7( ꢂ 2ꢂ 7+ꢂ / 2 :( ꢂ 5$', 8ꢂ 27+ꢂ ) 22ꢁ  
ꢁꢂ 7+, ꢂ &+$ 0)( ꢂ )($785, ꢂ 237, 21$ ꢁꢂ / , ꢂ, ꢂ 12ꢂ 35(6(1 7+( ꢂ ꢂ 3, ꢂ ꢀ  
ꢂꢂꢂ, '(17, ), ( 086 %ꢂ / 2&$7( ꢂ :, 7+, ꢂ 7+ꢂ, 1'(ꢂ $5(ꢂ, 1', &$7('  
ꢂ ꢍ $ꢀ, '(), 1( ꢂ $ꢂ 7+ꢂ 9(57, &$ꢂ ', 67$1&ꢂ )52 ꢂ 7+ꢂ 6($7, 1 3/$1ꢂ 7 2  
ꢂꢂꢂꢂꢂꢂꢂ 7+ꢂ / 2 :(6ꢂꢂ 32, 1ꢂ 2ꢂ 7+ꢂ 3$&.$*ꢂ %2'ꢂ (;&/ 8', 1 7+ꢂ /, ꢂ $1ꢂ 25  
ꢂꢂꢂꢂꢂꢂꢂ 7+(50$ꢂ (1+$1&( 0(1ꢂ 2ꢂ &$9, 7 ꢂ '2 : 3$&.$*ꢂ &21), *85$7, 21 ꢁ  
11. JEDEC SPECIFICATION NO. REF : N/A  
002-15857 Rev. **  
Document Number: 002-08511 Rev. *D  
Page 20 of 22  
 
MB3771  
Document History  
Spansion Publication Number: DS04-27400-11Ea  
Document Title: MB3771 Power Supply Monitor  
Document Number: 002-08511  
Orig. of  
Change  
Submission  
Date  
Revision  
ECN  
Description of Change  
**  
TAOA  
05/12/2006 Migrated to Cypress and assigned document number 002-08511.  
No change to document contents or format.  
*A  
*B  
5177314  
5550024  
TAOA  
03/16/2016 Updated to Cypress format.  
Updated Pin Assignment: Change the package name from FPT-8P-M01 to SOE008  
Updated Ordering Information: Change the package name from FPT-8P-M01 to SOE008  
Updated Package Dimensions: Updated to Cypress format  
HIXT  
12/12/2016  
Deleted Marking Format (Lead Free version)  
Deleted Labeling Sample (Lead free version)  
Deleted MB3771PF-❏❏❏E1 Recommended Conditions of Moisture Sensitivity Level  
Deleted the part number, “MB3771PF-❏❏❏”, from Ordering Information  
*C  
*D  
5606248  
5788467  
HIXT  
01/31/2017  
Deleted the words in the Remarks, “Lead Free version”, from Ordering Information  
MASG  
06/28/2017 Adapted Cypress new logo.  
Document Number: 002-08511 Rev. *D  
Page 21 of 22  
MB3771  
Sales, Solutions, and Legal Information  
Worldwide Sales and Design Support  
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office  
closest to you, visit us at Cypress Locations.  
Products  
PSoC® Solutions  
ARM® Cortex® Microcontrollers  
cypress.com/arm  
cypress.com/automotive  
cypress.com/clocks  
cypress.com/interface  
cypress.com/iot  
PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6  
Automotive  
Cypress Developer Community  
Clocks & Buffers  
Interface  
Forums | WICED IOT Forums | Projects | Video | Blogs | Training  
| Components  
Internet of Things  
Memory  
Technical Support  
cypress.com/memory  
cypress.com/mcu  
cypress.com/support  
Microcontrollers  
PSoC  
cypress.com/psoc  
cypress.com/pmic  
cypress.com/touch  
cypress.com/usb  
Power Management ICs  
Touch Sensing  
USB Controllers  
Wireless/RF  
cypress.com/wireless  
© Cypress Semiconductor Corporation, 2003-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,  
including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries  
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other  
intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress  
hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to  
modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users  
(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress’s patents that are infringed by the Software (as  
provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation  
of the Software is prohibited.  
TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE  
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent  
permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any  
product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is  
the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products  
are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or  
systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the  
device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably  
expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim,  
damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other  
liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.  
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in  
the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.  
Document Number: 002-08511 Rev. *D  
Revised June 28, 2017  
Page 22 of 22  

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