AB-175 [ETC]
AB-175 - CODING SCHEMES USED WITH DATA CONVERTERS ; AB - 175 - 用于数据转换器的编码方案
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CODING SCHEMES USED WITH
DATA CONVERTERS
Jason Albanus
With the recent proliferation of analog-to-digital converters
Unipolar Straight Binary is the coding scheme used by the
ADC7802 and ADS7803.
(ADCs) and digital-to-analog converters (DACs), and the
variety of digital coding schemes which they use, has come
a need to understand these different coding schemes which
converters use to talk to the “digital world”. The purpose of
this article is to describe the individual coding schemes used
with ADCs and DACs manufactured by Burr-Brown, and
explain their relationships.
CSB — COMPLEMENTARY STRAIGHT BINARY
The Complementary Straight Binary coding scheme is the
exact digital opposite (one’s complement) of Unipolar
Straight Binary. CSB coding, like its counterpart USB, is
also restricted to unipolar systems.
Following this text is a list of abbreviations and definitions
intended to clarify any questions regarding the nomenclature
which has been used.
When using CSB coding with a digital system, the digital
count begins at all zeros (0000) at the positive full scale
value. As the digital code increments, the analog voltage
decreases one VLSB at at time, until 0V is reached at a digital
code of 1111. The relationship between CSB coding and its
corresponding analog voltages can be seen in Table II.
Throughout this guide, examples and tables given are for a
4-bit data converter. In unipolar and bipolar examples alike,
the Full Scale Range (FSR) is 10V creating a VLSB of
0.625V. For unipolar examples, minus full scale (–FS ) is 0V
and plus full scale (+FS) is 10V; for bipolar examples, –FS
is –5V and +FS is +5V.
MNEMONIC
Zero
DIGITAL CODE
Vt–
VCODE
Vt+
1111
0.000
0.3125
USB — UNIPOLAR STRAIGHT BINARY
+1VLSB
1110
1101
1100
0.3125
0.9375
1.5625
0.625
1.250
1.875
0.9375
1.5625
2.1875
The Unipolar Straight Binary coding is perhaps the simplest
coding scheme to understand. As the name implies, it is a
coding scheme which is used only for unipolar voltages.
1/4 FSR
1/2 FSR
1011
1010
1001
1000
2.1875
2.8125
3.4375
4.0625
2.500
3.125
3.750
4.375
2.8125
3.4375
4.0625
4.6875
When using USB coding, the digital count begins at all zeros
(0000) at a VCODE of 0V (Vt+ = 0V + 1/2VLSB and there is
no Vt–). As the digital code increments, the analog voltage
increases one VLSB at a time, and the digital count ends
(1111) at the positive full scale value. Table I shows how the
USB codes correspond to analog voltages for a 4-bit digital
system.
0111
0110
0101
0100
4.6875
5.3125
5.9375
6.5625
5.000
5.625
6.250
6.875
5.3125
5.9375
6.5625
7.1875
3/4 FSR
+FS
0011
0010
0001
7.1875
7.8125
8.4375
7.500
8.125
8.750
7.8125
8.4375
9.0625
MNEMONIC
Zero
DIGITAL CODE
Vt–
VCODE
Vt+
0000
9.0625
9.375
0000
0.000
0.3125
TABLE II. CSB Coding Scheme.
+1 VLSB
0001
0010
0011
0.3125
0.9375
1.5625
0.625
1.250
1.875
0.9375
1.5625
2.1875
BOB — BIPOLAR OFFSET BINARY
1/4 FSR
1/2 FSR
0100
0101
0110
0111
2.1875
2.8125
3.4375
4.0625
2.500
3.125
3.750
4.375
2.8125
3.4375
4.0625
4.6875
Bipolar Offset Binary coding, as the name implies, is for use
in bipolar systems (where the analog voltage can be positive
and negative). This coding scheme is very similar to USB
coding since, as the analog voltage increases, the digital
count also increases.
1000
1001
1010
1011
4.6875
5.3125
5.9375
6.5625
5.000
5.625
6.250
6.875
5.3125
5.9375
6.5625
7.1875
BOB coding begins with digital zero (0000) at the negative
full scale. By incrementing the digital count, the correspond-
ing analog value will approach the positive full scale in
1VLSB steps, passing through bipolar zero on the way. This
“zero crossing” occurs at a digital code of 1000 (see Table
3/4 FSR
+FS
1100
1101
1110
7.1875
7.8125
8.4375
7.500
8.125
8.750
7.8125
8.4375
9.0625
1111
9.0625
9.375
TABLE I. USB Coding Scheme.
©1991 Burr-Brown Corporation
AN-175
Printed in U.S.A. March, 1991
III). The digital count continues to increase proportionally to
the analog input until the positive full scale is reached at a
full digital count (1111) as shown by Table III.
MNEMONIC
DIGITAL CODE
Vt–
VCODE
Vt+
–FS
1111
1110
1101
1100
–5.000
–4.375
–3.750
–3.125
–4.6875
–4.0625
–3.4375
–2.8125
–4.6875
–4.0625
–3.4375
With BOB coding, the MSB can be considered a sign
indicator whereas a logic “0” indicates a negative analog
value, and a logic “1” indicates an analog value greater than
or equal to BPZ.(1)
1/2 –FS
1011
1010
1001
–2.8125
–2.1875
–1.5625
–2.500
–1.875
–1.250
–2.1875
–1.5625
–0.9375
BPZ – 1VLSB
BPZ
1000
0111
–0.9375
–0.3125
–0.625
0.000
–0.3125
+0.3125
MNEMONIC
DIGITAL CODE
Vt–
VCODE
Vt+
BPZ + 1VLSB
0110
0101
0100
+0.3125
+0.9375
+1.5625
+0.625
+1.250
+1.875
+0.9375
+1.5625
+2.1875
–FS
0000
0001
0010
0011
–5.000
–4.375
–3.750
–3.125
–4.6875
–4.0625
–3.4375
–2.8125
–4.6875
–4.0625
–3.4375
1/2 +FS
+FS
0011
0010
0001
+2.1875
+2.8125
+3.4375
+2.500
+3.125
+3.750
+2.8125
+3.4375
+4.0625
1/2 –FS
0100
0101
0110
–2.8125
–2.1875
–1.5625
–2.500
–1.875
–1.250
–2.1875
–1.5625
–0.9375
0000
+4.0625
+4.375
BPZ – 1VLSB
BPZ
0111
1000
–0.9375
–0.3125
–0.625
0.000
–0.3125
+0.3125
TABLE IV. COB Coding Scheme.
BPZ + 1VLSB
1001
1010
1011
+0.3125
+0.9375
+1.5625
+0.625
+1.250
+1.875
+0.9375
+1.5625
+2.1875
BTC — BINARY TWO’S COMPLEMENT
Binary Two’s Complement coding is the type of coding used
by most microprocessor or math processor based systems for
mathematical algorithms, and is also the coding scheme
which the digital audio industry has decided to use as its
standard.
1/2 +FS
+FS
1100
1101
1110
+2.1875
+2.8125
+3.4375
+2.500
+3.125
+3.750
+2.8125
+3.4375
+4.0625
1111
+4.0625
+4.375
TABLE III. BOB Coding Scheme.
Binary Two’s Complement coding is also a scheme de-
signed for bipolar analog signals. It is very similar to BOB,
but does not appear so. The only difference between BOB
and BTC is that the MSB has been inverted.
The ADS7800, a 12-bit, 333kHz, sampling analog-to-digital
converter, utilizes the Bipolar Offset Binary output code to
implement its ±5 and ±10V input ranges. The DAC780x
series of digital-to-analog converters also use this scheme in
each of their three different interface formats (serial, 8-bits
+ 4-bits parallel, and 12-bit parallel).
Unfortunately, BTC is not as straightforward as the schemes
previously mentioned. The codes are not continuous from
one end of the analog “spectrum” to the other due to a
discontinuity which occurs at BPZ.
COB — COMPLEMENTARY OFFSET BINARY
Digital zero (0000) corresponds to BPZ, and the digital
count increments to its maximum positive code of 0111 as
the analog voltage approaches and reaches its positive full
scale value. The code then resumes at the negative full scale
value at a digital code of 1000, and then approaches BPZ
until a digital value of 1111 is reached at one LSB value
below BPZ.
Complementary Offset Binary coding, like its counterpart
BOB, is also for use in systems where the analog signal is
bipolar. The relationship between COB and BOB is that
each coding scheme is the one’s complement (all bits in-
verted) of the other.
COB coding begins with digital zero (0000) at the positive
full scale. By incrementing the digital count, the corre-
sponding analog value will approach the negative full scale
in –1VLSB steps, passing through bipolar zero on the way.
This “zero crossing” occurs at a digital code of 0111 (see
Table IV). As the digital count continues to increase, the
analog signal goes more negative until the negative full
scale is reached at a full digital count (1111) as shown by
Table IV.
With the BTC coding scheme, the MSB can also be consid-
ered a sign indicator. When the MSB is a logic “0” a positive
value is indicated, and when the MSB is a logic “1” a
negative value is indicated.(3)
This is the coding scheme which is used with Burr-Brown’s
DSP interface chips (DSP101/DSP102 analog input and
DSP201/DSP202 analog output) designed for “zero chip
interface” to most of the popular digital signal processors
available today. Binary Two’s Complement is also one of
the codes utilized by the ADC603 and ADC614 high speed
analog-to-digital converters, and, of course, all of Burr-
Brown’s PCM digital audio converters.
With COB coding, like BOB coding, the MSB can also be
considered a sign indicator whereas a logic “1” indicates a
negative analog value, and a logic “0” indicates an analog
value greater than or equal to BPZ.(2)
NOTE: (1) The Vt+ transition to BPZ from a negative value (0111 to 1000) actually occurs at –0.3125V causing the MSB to go “positive” at a negative value. (2) The Vt+ transition
to BPZ from a negative value (1000 to 0111) actually occurs at –0.3125V causing the MSB to go “positive” at a negative value. (3) The Vt+ transition to BPZ from a negative
value (1111 to 0000) actually occurs at –0.3125V causing the MSB to go “positive” at a negative value.
2
MNEMONIC
DIGITAL CODE
Vt–
VCODE
Vt+
MNEMONIC
DIGITAL CODE
Vt-
VCODE
Vt+
–FS
1000
1001
1010
1011
–5.000
–4.375
–3.750
–3.125
–4.6875
–4.0625
–3.4375
–2.8125
–FS
0111
0110
0101
0100
–5.000
–4.375
–3.750
–3.125
–4.6875
–4.0625
–3.4375
–2.8125
–4.6875
–4.0625
–3.4375
–4.6875
–4.0625
–3.4375
1/2 –FS
1100
1101
1110
–2.8125
–2.1875
–1.5625
–2.500
–1.875
–1.250
–2.1875
–1.5625
–0.9375
1/2 –FS
0011
0010
0001
–2.8125
–2.1875
–1.5625
–2.500
–1.875
–1.250
–2.1875
–1.5625
–0.9375
BPZ – 1VLSB
BPZ
1111
0000
–0.9375
–0.3125
–0.625
0.000
–0.3125
+0.3125
BPZ – 1VLSB
BPZ
0000
1111
–0.9375
–0.3125
–0.625
0.000
–0.3125
+0.3125
BPZ + 1VLSB
0001
0010
0011
+0.3125
+0.9375
+1.5625
+0.625
+1.250
+1.875
+0.9375
+1.5625
+2.1875
BPZ + 1VLSB
1110
1101
1100
+0.3125
+0.9375
+1.5625
+0.625
+1.250
+1.875
+0.9375
+1.5625
+2.1875
1/2 +FS
0100
0101
0110
+2.1875
+2.8125
+3.4375
+2.500
+3.125
+3.750
+2.8125
+3.4375
+4.0625
1/2 +FS
1011
1010
1001
+2.1875
+2.8125
+3.4375
+2.500
+3.125
+3.750
+2.8125
+3.4375
+4.0625
+FS
0111
+4.0625
+4.375
+FS
1000
+4.0625
+4.375
TABLE V. BTC Coding Scheme.
TABLE VI. CTC Coding Scheme.
CTC — COMPLEMENTARY TWO’S COMPLEMENT
devices required for any transformation are digital logic
“inverters”, however, some of the transformations can be
achieved by using analog components.(4) The following
section will be divided into sections depending on how the
transformation is to be accomplished.
Complementary Two’s Complement coding is also a scheme
designed for bipolar analog signals. It is the one’s comple-
ment of its counterpart BTC, and is also very similar to
COB, although this relationship is not immediately obvious.
The only difference between COB and CTC is that the MSB
has been inverted.
Inversion of all Bits
USB to CSB and CSB to USB
BOB to COB and COB to BOB
BTC to CTC and CTC to BTC
With CTC coding, digital “zero” is at an analog voltage
which is slightly less (1 LSB) than analog bipolar zero. As
the digital count increments, the analog voltage becomes
more negative until all of the bits are high except for the
MSB (0111). At this point, the digital code corresponds to
the analog negative full scale. The next step in incrementing
the digital code would be to have the MSB a logic “1”, and
the rest of the bits as logic “0”s (1000), and this code
represents the analog positive full scale value. As the digital
codes continue to increment, the corresponding analog volt-
age decreases until BPZ is obtained. Table VI demonstrates
this analog/digital relationship.
The CSB scheme is simply the USB code with all of the bits
inverted (one’s complement). This is also how to perform
most of the transformation of BOB to COB, and BTC to
CTC. For conversion of unipolar schemes, there is only a
digital “solution”, and conversion of bipolar schemes may
be done with analog or digital components.
Converting between the bipolar codes in an analog fash-
ion, all that’s needed is one op amp configured for a gain
of –1V/V (see Figure 2). This op amp can be used on the
input stage of an ADC or the output stage of a DAC.
Some sample and hold amplifiers, such as the SHC5320,
are configurable for a gain of –1V/V, providing very easy
conversion between these codes in an analog-to-digital
system. Remember that either +1VLSB or –1VLSB must be
summed in with the analog value.
With Complementary Two’s Complement coding, the MSB
is also a sign indicator with its states of “0” and “1”
representing negative and positive voltages, respectively.
This code is also used by Burr-Brown’s high speed ADC603
and ADC614. These converters accomplish this dual code
task by providing an input for code selection.
The bipolar transformations may be quite straightforward
when done in the analog domain; however, to convert
digitally, an individual logic “inverter” must be used on
every data line, input or output (see Figure 1), as with the
unipolar schemes.
MANIPULATING BETWEEN VARIOUS CODES
The input and output codings used with ADCs and DACs is
varied, and an individual converter may be capable of
utilizing one or more coding scheme. However, with all of
these schemes available, the desired scheme is not always
readily available with the particular converter of interest. Do
not fear, because converting one coding scheme to another,
to match a particular system, is very easy as long as you wish
to convert a bipolar scheme to another bipolar scheme; or a
unipolar scheme into another unipolar scheme. The only
The ADC603 and ADC614 allow both BTC and CTC
coding schemes by providing an “Output Logic Invert” input
pin. This flexibility allows these converters to be used in
even more applications easier than if just one scheme had
been implemented.
NOTE: (4) When converting bipolar digital schemes, regardless of whether the transformation is done digitally or in an analog fashion, a value of either +1VLSB or –1VLSB must
be summed in with the analog value. This is due to the assymetric nature of the codes around bipolar zero (see definition of Vt). This addition of one VLSB is relatively simple,
since most data converters allow for an offset adjustment which can accomodate this.
3
Inversion of all bits except the MSB
MSB
BOB to CTC and CTC to BOB
BTC to COB and COB to BTC
Manipulation of BOB into CTC and BTC into COB requires
inverting all bits except the MSB. This is also a difficult
transformation to accomplish, since it would require a digi-
tal inverter for every bit except the most significant bit (see
Figure 4).
ADC
LSB
MSB
FIGURE 1. Digital Inversion of All Bits.
R
ADC
R
VIN
VO = –VIN
LSB
R/2
FIGURE 4. Inversion of All Bits Except the MSB.
FIGURE 2. Analog Signal Inversion.
DEFINITIONS
n
=
=
Number of bits in a particular digital system.
Inversion of the MSB
LSB
Least Significant Bit — The digital bit with the least
analog “weight”.
BOB to BTC and BTC to BOB
COB to CTC and CTC to COB
MSB
=
=
=
Most Significant Bit — The digital bit with the
greatest analog “weight”.
Manipulating the BOB scheme into BTC and manipulating
COB into CTC requires much less hardware. To go from
BOB to BTC, or COB to CTC (or vice versa) it is only
necessary to invert the MSB (see Figure 3).
Increment
Decrement
To increase a digital “count”, or to count up, as in a
code changing from 0000 to 0001.
To decrease a digital “count”, or to count down, as
in a code changing from 0001 to 0000.
USB
CSB
BOB
COB
BTC
CTC
FSR
=
=
=
=
=
=
=
Unipolar Straight Binary coding.
Burr-Brown’s PCM78, a 16-bit ADC developed for digital
audio applications allows BOB or BTC output schemes by
providing a “BOB/BTC select” input. Open circuit or ground-
ing of this pin provides for BTC and BOB respectively by
controlling an internal inverter for the most significant bit.
Complementary Straight Binary coding.
Bipolar Offset Binary coding.
Complementary Offset Binary coding.
Binary Two’s Complement coding.
Complementary Two’s Complement coding.
Full Scale Range — The dynamic range of an
analog signal.
BPZ
VLSB
=
=
Bipolar Zero — An analog voltage of 0V.
MSB
Least Significant Bit Voltage — The value of voltage
represented by one LSB. For digital-to-analog
converters which provide a current output mode of
operation, VLSB actually refers to a voltage after a
current-to-voltage conversion. Throughout the text, it
is presumed that this current to voltage conversion
has taken place.
ADC
VLSB = FSR/2n (Equation 1)
LSB
FIGURE 3. Inversion of the MSB.
4
DEFINITIONS (CONT)
VCODE
=
Code Voltage —The voltage corresponding to a
particular digital code in an ideal converter. For
digital-to-analog converters which provide a current
output mode of operation, VCODE actually referes to
a voltage after a current-to-voltage conversion.
Throughout the text, it is presumed that this
current-to-voltage conversion has occurred.
VCODE = (digital code)10 * VLSB (Equation 2)
For analog-to-digital converters, the code voltage is
actually an analog range of voltages encompassed
by VCODE ± 1/2VLSB. This is due to the inherent
quantization error of ± 1/2VLSB that is present in the
finite digital output of the ADC.
The value of (digital code)10 * VLSB will be used
throughout this text to represent VCODE unless
otherwise stated.
+FS
=
Positive Full Scale —The most positive end of an
analog signal’s range which is represented by a
digital code. A VCODE equal to the positive full
range (+FS) does not exist. The industry standard
is that the most positive voltage corresponding to a
digital code (maximum VCODE) is the positive full
scale voltage minus the voltage associated with
one LSB (+FS – 1VLSB). The text “positive full
scale” (or +FS) refers to this lesser, industry
standard value. This +FS industry standard is
primarily due to another industry standard in which
0V is a code voltage (see Equation 3) bounded by
the absolute value of ±1/2VLSB. In a unipolar
system, this means that the analog voltage range
represented by a digital code corresponding to BPZ
is only 1/2VLSB. In bipolar systems, all digital codes
have analog ranges of 1VLSB, and a digital code
representing 0V is 0V ±1/2VLSB (see Equation 3
and Equation 4).
–FS
Vt
=
=
Negative Full Scale — The most negative end of
an analog signal’s range which is represented by a
digital code.
Transition voltage — The voltage which corre-
sponds to the actual change of a digital code in
an ideal analog-to-digital converter. These
voltages are the voltages at each end of the range
of VCODE ±1/2VLSB
.
Vt+ = VCODE + 1/2VLSB (Equation 3)
Vt– = VCODE – 1/2VLSB (Equation 4)
For an ideal digital-to-analog converter, the output
would be exactly VCODE, and the transition voltage
can be ignored.
5
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