IE-703114-MC-EM1 [ETC]
IE-703114-MC-EM1 User's Manual | User's Manual[09/2003] ; IE- 703114 -MC- EM1用户手册|用户手册[ 09/2003 ]\n型号: | IE-703114-MC-EM1 |
厂家: | ETC |
描述: | IE-703114-MC-EM1 User's Manual | User's Manual[09/2003]
|
文件: | 总56页 (文件大小:956K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
User’s Manual
IE-703114-MC-EM1
In-Circuit Emulator Option Board
Target Device
V850E/IA2
Document No. U16533EJ1V0UM00 (1st edition)
Date Published September 2003 N CP(K)
©
Printed in Japan
[MEMO]
User’s Manual U16533EJ1V0UM
2
Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States
and/or other countries.
PC/AT is a trademark of International Business Machines Corporation.
•
The information in this document is current as of December, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
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appear in this document.
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or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
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(Note)
(1)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2)
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8E 02. 11-1
User’s Manual U16533EJ1V0UM
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
Electronics product in your application, pIease contact the NEC Electronics office in your country to
obtain a list of authorized representatives and distributors. They will verify:
•
•
•
•
•
Device availability
Ordering information
Product release schedule
Availability of related technical literature
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
[GLOBAL SUPPORT]
http://www.necel.com/en/support/support.html
NEC Electronics Hong Kong Ltd.
Hong Kong
Tel: 2886-9318
NEC Electronics America, Inc. (U.S.)
Santa Clara, California
Tel: 408-588-6000
NEC Electronics (Europe) GmbH
Duesseldorf, Germany
Tel: 0211-65 03 01
800-366-9782
NEC Electronics Hong Kong Ltd.
Seoul Branch
• Sucursal en España
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Tel: 091-504 27 87
Seoul, Korea
Tel: 02-558-3737
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Tel: 01-30-67 58 00
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Tel: 021-6841-1138
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Milano, Italy
Tel: 02-66 75 41
NEC Electronics Taiwan Ltd.
Taipei, Taiwan
Tel: 02-2719-2377
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• United Kingdom Branch
Milton Keynes, UK
Tel: 01908-691-133
J03.4
User’s Manual U16533EJ1V0UM
4
INTRODUCTION
Target Readers
Purpose
This manual is intended for users who wish to design and develop application
systems using the V850E/IA2.
This manual is intended to give users an understanding of the basic specifications
and the proper operation of the IE-703114-MC-EM1.
Organization
This manual is broadly divided into the following parts.
• Overview
• Names and functions of components
• Factory settings
• Cautions
• Differences between target device and target interface circuit
How to Read This Manual
It is assumed that the readers of this manual have general knowledge of electrical
engineering, logic circuits, and microcontrollers.
The IE-703114-MC-EM1 is used connected to the IE-V850E-MC in-circuit
emulator. This manual explains the basic setup procedure and switch settings
of the IE-703114-MC-EM1. For the names and functions of the IE-V850E-MC,
and the connection of parts, refer to the IE-V850E-MC, IE-V850E-MC-A User’s
Manual (U14487E), which is a separate volume.
To broadly understand the basic specifications and operation methods
→ Read this manual in the order of the CONTENTS.
To know the operation methods and command functions of the IE-V850E-MC, and
IE-703114-MC-EM1
→ Read the user’s manual of the debugger (sold separately) that is used.
Conventions
Note:
Footnote for item marked with Note in the text
Caution:
Information requiring particular attention
Remark:
Supplementary information
…
Numerical representation:
Binary
×××× or ××××B
…
Decimal
××××
…
Hexadecimal
××××H
Prefix indicating the power of 2 (address space, memory capacity):
K (kilo): 210 = 1,024
M (mega): 220 = 1,0242
User’s Manual U16533EJ1V0UM
5
Terminology
The meanings of terms used in this manual are listed below.
This is the device to be emulated.
Target device
Target system
The system (user-built system) to be debugged. This includes the target program and
hardware configured by the user.
Emulation CPU
This is the device that performs emulation of the target device in the IE-V850E-MC.
Related Documents
When using this manual, refer to the following manuals.
The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
{
Documents related to development tools (user’s manuals)
Product Name
Document Number
U14487E
IE-V850E-MC, IE-V850E-MC-A (In-Circuit Emulator)
IE-703114-MC-EM1 (In-Circuit Emulator Option Board)
V850E/IA2 Hardware
This manual
U15195E
V850 Series Development Tools (Tutorial Guide)
CA850 (Ver.2.50 or Later) (C Compiler Package)
U14218E
Operation
U16053E
C Language
PM plus
U16054E
U16055E
Assembly Language
Operation
U16042E
ID850 (Ver.2.50) (Integrated Debugger)
SM850 (Ver.2.50) (System Simulator)
SM850 (Ver.2.00 or Later) (System Simulator)
To be prepared
To be prepared
U14873E
Operation
External Part User Open Interface
Specifications
RX850 (Ver.3.13 or Later) (Real-Time OS)
Basics
U13430E
U13410E
U13431E
U13773E
U13774E
U13772E
U13737E
U13916E
U14410E
U16544E
Installation
Technical
Basics
RX850 Pro (Ver.3.13) (Real-Time OS)
Installation
Technical
RD850 (Ver. 3.01) (Task Debugger)
RD850 Pro (Ver. 3.01) (Task Debugger)
AZ850 (Ver. 3.10) (System Performance Analyzer)
V850 Series Development Tools
(Supporting 32-Bit OS)
(Application Note)
Tutorial Guide
(Windows Based)
6
User’s Manual U16533EJ1V0UM
CONTENTS
CHAPTER 1 OVERVIEW..........................................................................................................................10
1.1 Hardware Configuration.............................................................................................................11
1.2 Hardware Specifications (When Connected to IE-V850E-MC)................................................12
1.3 System Specifications of IE-703114-MC-EM1 (When Connected to IE-V850E-MC)..............13
1.4 System Configuration.................................................................................................................14
1.5 Contents in Carton......................................................................................................................16
1.6 Connection Between IE-V850E-MC and IE-703114-MC-EM1...................................................17
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS ............................................................19
2.1 Component Names and Functions of IE-703114-MC-EM1......................................................19
2.2 Clock Settings .............................................................................................................................21
2.2.1
2.2.2
Clock settings outline.....................................................................................................................21
Clock setting methods ...................................................................................................................22
2.3 Operation Mode Setting .............................................................................................................26
2.4 Power Supply Settings ...............................................................................................................27
2.4.1
JP2 setting.....................................................................................................................................27
2.5 Emulation Memory......................................................................................................................28
2.5.1
2.5.2
Wait setting for emulation memory ................................................................................................28
Cautions related to emulation memory ..........................................................................................29
CHAPTER 3 FACTORY SETTINGS........................................................................................................30
CHAPTER 4 CAUTIONS ..........................................................................................................................31
4.1 Cautions Related to Pin Termination........................................................................................31
4.2 Cautions Related to Internal RAM.............................................................................................32
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT ...........33
APPENDIX A DIMENSIONS.....................................................................................................................41
APPENDIX B EXAMPLE OF USE OF CONNECTOR FOR TARGET CONNECTION.....................52
APPENDIX C CONNECTORS FOR TARGET CONNECTION .............................................................53
C.1 Usage ...........................................................................................................................................53
C.2 Cautions on Handling Connectors............................................................................................55
APPENDIX D MOUNTING PLASTIC SPACER......................................................................................56
User’s Manual U16533EJ1V0UM
7
LIST OF FIGURES
Figure No.
Title
Page
1-1
System Configuration .......................................................................................................................................14
1-2
1-3
Contents in Carton............................................................................................................................................16
Connection Between IE-V850E-MC and IE-703114-MC-EM1 .........................................................................17
2-1
2-2
2-3
2-4
2-5
2-6
2-7
IE-703114-MC-EM1..........................................................................................................................................19
Clock Setting Outline ........................................................................................................................................21
Outline When Using Mounted Internal Clock....................................................................................................23
Outline When Changing Mounted Crystal Oscillator and Using New Oscillator as Internal Clock ...................24
Outline When Using Crystal Oscillator on Target System as External Clock ...................................................25
JP2 Setting (Automatic Switching Setting) .......................................................................................................27
JP2 setting (When Power from Target System Is Used) ..................................................................................27
4-1
Schematic Diagram of Power Supply Flow.......................................................................................................32
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
Pin Equivalent Circuit 1.....................................................................................................................................33
Pin Equivalent Circuit 2.....................................................................................................................................34
Pin Equivalent Circuit 3.....................................................................................................................................35
Pin Equivalent Circuit 4.....................................................................................................................................35
Pin Equivalent Circuit 5.....................................................................................................................................36
Pin Equivalent Circuit 6.....................................................................................................................................36
Pin Equivalent Circuit 7.....................................................................................................................................40
Pin Equivalent Circuit 8.....................................................................................................................................40
A-1
A-2
100-Pin Plastic LQFP (Fine Pitch) (14 × 14).....................................................................................................50
100-Pin Plastic QFP (14 × 20)..........................................................................................................................51
C-1
C-2
C-3
Mounting NQPACK100SD or NQPACK100RB.................................................................................................53
Mounting Device...............................................................................................................................................54
NQPACK100SD or NQPACK100RB and Device Pin .......................................................................................54
D-1
Mounting Method of Plastic Spacer..................................................................................................................56
User’s Manual U16533EJ1V0UM
8
LIST OF TABLES
Table No
Title
Page
1-1
1-2
Hardware Specifications...................................................................................................................................12
System Specifications of IE-703114-MC-EM1 (When Connected to IE-V850E-MC) .......................................13
2-1
2-2
2-3
2-4
List of Hardware Settings When Setting Clock.................................................................................................22
Settings When Using Mounted Internal Clock..................................................................................................23
Settings When Changing Mounted Internal Clock............................................................................................24
Settings When Using External Clock................................................................................................................25
4-1
Pins That Cannot Be Emulated ........................................................................................................................31
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
Corresponding Pins (Pin Equivalent Circuit 1) .................................................................................................33
Corresponding Pins (Pin Equivalent Circuit 2) .................................................................................................34
Corresponding Pins (Pin Equivalent Circuit 3) .................................................................................................35
Corresponding Pins (Pin Equivalent Circuit 4) .................................................................................................35
Corresponding Pins (Pin Equivalent Circuit 5) .................................................................................................36
Corresponding Pins (Pin Equivalent Circuit 6) .................................................................................................37
Corresponding Pins (Pin Equivalent Circuit 7) .................................................................................................40
Corresponding Pins (Pin Equivalent Circuit 8) .................................................................................................40
User’s Manual U16533EJ1V0UM
9
CHAPTER 1 OVERVIEW
The IE-703114-MC-EM1 is an option board for the in-circuit emulator IE-V850E-MC. By connecting the IE-
703114-MC-EM1 to the IE-V850E-MC, hardware and software can be debugged efficiently in system development
using the V850E/IA2.
In this manual, the basic setup procedures and switch settings of the IE-703114-MC-EM1 when connecting it to
the IE-V850E-MC are described. For the names and functions of the parts of the IE-V850E-MC, and for the
connection of parts, refer to the IE-V850E-MC, IE-V850E-MC-A User’s Manual (U14487E) which is a separate
volume.
User’s Manual U16533EJ1V0UM
10
CHAPTER 1 OVERVIEW
1.1 Hardware Configuration
Separately sold hardware
In-circuit emulator (IE-V850E-MC)
Option board
IE-V850E-MC can be used as in-circuit emulator for V850E/IA2 by
adding this board.
(IE-703114-MC-EM1)
Separately sold hardware
Extension probeNote
[SC-100SDN]
General-purpose extension probe made by TOKYO ELETECH
CORPORATION.
PC interface board
IE-70000-PCI-IF(-A)
IE-70000-CD-IF-A
These boards are used to connect the IE-V850E-MC-A to a personal
computer. These boards are inserted in the expansion slot of the
personal computer.
IE-70000-PCI-IF(-A): For PCI bus
IE-70000-CD-IF-A: For PCMCIA socket
100-pin GC-GF conversion
adapterNote
Socket to convert to GF foot pattern when 100-pin GF package is used
AC adapter dedicated to NEC Electronics in-circuit emulators
(NEXB-2R100SD/RB)
Power adapter
(IE-70000-MC-PS-B)
Note For further information, contact Daimaru Kogyo Co., Ltd.
Tokyo Electronics Department (TEL +81-3-3820-7112)
Osaka Electronics Department (TEL +81-6-6244-6672)
User’s Manual U16533EJ1V0UM
11
CHAPTER 1 OVERVIEW
1.2 Hardware Specifications (When Connected to IE-V850E-MC)
Table 1-1. Hardware Specifications
Parameter
Value
Target device
µPD703114GC-xxx-8EU (mask ROM version 0.5 mm pitch)
µPD70F3114GC-8EU (flash memory version 0.5 mm pitch)
µPD703114GF-xxx-3BA (mask ROM version 0.65 mm pitch)
µPD70F3114GF-3BA (flash memory version 0.65 mm pitch)
Target interface voltage
VDD = RVDD = AVDD0 = AVDD1 = 5.0 V 10%
REGIN = 3.0 to 3.6 V
Maximum operating frequency
40 MHz
28 mm
External dimensions
(Refer to APPENDIX A
DIMENSIONS)
Height
Length
Width
229 mm
96 mm
Power consumption
Weight
9.1 W (Max.)
190 g
{
{
{
{
Extremely lightweight and compact.
Higher equivalence with target device can be achieved by omitting buffer between signal cables.
8-bit external trace can be performed by connecting external logic probe (included).
The following pins can be masked.
RESET, NMI, WAIT
User’s Manual U16533EJ1V0UM
12
CHAPTER 1 OVERVIEW
1.3 System Specifications of IE-703114-MC-EM1 (When Connected to IE-V850E-MC)
Table 1-2. System Specifications of IE-703114-MC-EM1 (When Connected to IE-V850E-MC)
Parameter
Specification
Emulation memory capacity
Internal ROM
128 KB
4 MB
External memory
Execution/pass detection
coverage
Targeting internal ROM
128 KB
Program execution function
Real-time execution
function
Go, Execution from cursor position, Automatic Go, Execution
up to cursor position, Restart, Return-out
Non real-time execution
function
Step-in, Next-over, Slow motion
Break function
Event detection break, software break, forcible break, break
by Come function, break when condition is satisfied during
step execution, fail-safe break
Trace function
Other functions
Trace conditions
Memory capacity
All trace, section trace, qualify trace
168 bit × 32 K frames
Mapping function, event function, snapshot function, stub
function, register manipulation function, memory
manipulation function, time measurement function, real-time
RAM sampling function
Caution Some of the functions may not be supported depending on the debugger used.
User’s Manual U16533EJ1V0UM
13
CHAPTER 1 OVERVIEW
1.4 System Configuration
The system configuration when connecting the IE-703114-MC-EM1 to the IE-V850E-MC, which is then connected
to a personal computer (PC-9800 series, PC/ATTM or compatibles) is shown below.
Figure 1-1. System Configuration
<17>
<5>
<6>
<7>
<16>
<18>
<4>
<8>
<3>
<12>
<12>
Target
system
Target
system
<9>
<10>
<13>
<14>
<1>, <2>
<13>
<9>
<11>
<15>
<10>, <14>
Device
Device
<15>
<14>
Target
system
<11>
<10>
Target
system
Target system
Remark 1. <1> Personal computer (PC-9800 series, PC/AT or compatible)
<2> Debugger (sold separately), device fileNote
<3> PC interface board (IE-70000-PCI-IF(-A), IE-70000-CD-IF-A: Sold separately)
<4> PC interface cable (included with IE-V850E-MC)
<5> In-circuit emulator (IE-V850E-MC: Sold separately)
<6> In-circuit emulator option board (IE-703114-MC-EM1)
<7> External logic probe (included)
<8> Extension probe (SC-100SDN: Sold separately)
<9> Connector for GC package emulator connection (YQPACK100SD: Included)
<10> Connector for GC package target connection (NQPACK100SD: Included)
<11> GC package device mount cover (HQPACK100SD: Included)
<12> GF package conversion adapter (NEXB-2R100SD/RB: Sold separately)
User’s Manual U16533EJ1V0UM
14
CHAPTER 1 OVERVIEW
<13> Connector for GF package emulator connection (YQPACK100RB: Included with NEXB-
2R100SD/RB)
<14> Connector for GC package target connection (NQPACK100RB: Included with NEXB-
2R100SD/RB)
<15> GF package device mount cover (HQPACK100RB: Included with NEXB-2R100SD/RB)
<16> Power adapter (IE-70000-MC-PS-B: Sold separately)
<17> 100-V AC power cable (sold separately: Included with IE-70000-MC-PS-B)
<18> 220-V AC power cable (sold separately: Included with IE-70000-MC-PS-B)
Remark 2. The circled areas in the above figure are the enlargements of the connectors for target connection.
Note Obtain the device file from the website of NEC Electronics (http://www.necel.com/micro/)..
User’s Manual U16533EJ1V0UM
15
CHAPTER 1 OVERVIEW
1.5 Contents in Carton
The carton of the IE-703114-MC-EM1 contains the main unit, guarantee card, packing list, and accessory bag.
Make sure that the accessory bag contains this manual and connector accessories. In case of missing or damaged
items, contact an NEC Electronics sales representative or distributor.
Figure 1-2. Contents in Carton
<2> Accessory bag
<1> IE-703114-MC-EM1
<5> IC Socket
NQPACK100SD
<4> Packing list
<6> IC Socket
YQPACK100SD
<7> IC Socket
HQPACK100SD
<3> Guarantee card
<8> Guide pin
YQGUIDE
<1> IE-703114-MC-EM1 × 1
<5> IC socket NQPACK100SD × 1
<2> Accessory bag × 1
<3> Guarantee card × 1
<4> Packing list × 1
<6> IC socket YQPACK100SD × 1
<7> IC socket HQPACK100SD × 1
<8> Guide pin YQGUIDE × 4
Check that the accessory bag contains this manual, a packing list, an external logic probe, and a restriction
document.
User’s Manual U16533EJ1V0UM
16
CHAPTER 1 OVERVIEW
1.6 Connection Between IE-V850E-MC and IE-703114-MC-EM1
The procedure for connecting the IE-V850E-MC and IE-703114-MC-EM1 is described below.
Caution Do not break or bend connector pins.
<1> Remove the pod cover (lower) of the IE-V850E-MC.
<2> Set the PGA socket lever of the IE-703114-MC-EM1 to the OPEN position as shown in Figure 1-3 (b).
<3> Connect the IE-703114-MC-EM1 to the PGA socket at the rear of the pod (refer to Figure 1-3 (c)). When
connecting, position the IE-V850E-MC and IE-703114-MC-EM1 so that they are horizontal.
Spacers can be connected to fix the pod (refer to APPENDIX D MOUNTING PLASTIC SPACER).
<4> Set the PGA socket lever of the IE-703114-MC-EM1 to the CLOSE position as shown in Figure 1-3 (b).
<5> Fix the IE-703114-MC-EM1 between the pod cover (lower) with the nylon rivets supplied with the IE-V850E-
MC.
Figure 1-3. Connection Between IE-V850E-MC and IE-703114-MC-EM1 (1/2)
(a) Overview
Nylon rivets
Pod cover (upper)
Nylon rivets
IE-703114-MC-EM1
IE-V850E-MC
Pod cover
(lower)
Nylon rivets
User’s Manual U16533EJ1V0UM
17
CHAPTER 1 OVERVIEW
Figure 1-3. Connection Between IE-V850E-MC and IE-703114-MC-EM1 (2/2)
(b) PGA socket lever of IE-703114-MC-EM1
CLOSE
OPEN
(c) Connecting part (IE-703114-MC-EM1)
A1 pin position
: Insertion guide
: IE-V850E-MC insertion area
User’s Manual U16533EJ1V0UM
18
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
This chapter describes the names, functions, and switch settings of components comprising the IE-703114-MC-
EM1. For the details of the pod, jumper, and switch positions, etc., refer to the IE-V850E-MC, IE-V850E-MC-A
User’s Manual (U14487E).
2.1 Component Names and Functions of IE-703114-MC-EM1
Figure 2-1. IE-703114-MC-EM1
(a) Top view
(b) Bottom view
Direction of pin 1 of the connector
for target connection
Connector for
target connection
JP1
LD2
LD1
SW1
JP2
TP1
TP2
TP3
TP4
TP5
TP6
8
2
7
1
µ
PD70F3114
1
3
2
4
OSC1
CN1 EXTD
Serial No.
Connector for
IE-V850E-MC connection
Version
Part No.
Emulation memory
User’s Manual U16533EJ1V0UM
19
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(1) Test pins (TP1 to TP6)
To leave the DMA cycle in the tracer, or to set a break, connect these pins to the external logic probe.
• TP1: GND
• TP2: Test pin for product shipment test
• TP3: DMAAK0
• TP4: DMAAK1
• TP5: DMAAK2
• TP6: DMAAK3
(2) SW1
This is a switch for clock mode switching (for details, refer to 2.2 Clock Settings).
(3) JP1
This is a jumper for switching the clock supply source (for details, refer to 2.2 Clock Settings).
(4) JP2
This is a jumper for switching the power supply (for details, refer to 2.4 Power Supply Settings).
(5) CN1 EXTD
Connects the external logic probe (included).
(6) LD1 (CKSEL: Green)
This is an LED for indicating the level input to the CKSEL pin. When the target system is not connected, this is lit
or extinguished according to the SW1 setting.
LED Status
Lit
Extinguished
When Used as Standalone Unit
SW1 = DIRECT
When Used in Target System Connection
The CKSEL signal from the target system is high
The CKSEL signal from the target system is low
SW1 = PLL
(7) LD2 (RUN: Yellow)
This is an LED for indicating if a user program is being executed or not.
LED Status
Lit
Extinguished
User program is being executed.
User program is halted.
(8) Connector for IE-V850E-MC connection
This is a connector for connecting the IE-V850E-MC.
(9) Connector for target connection
This is a connector for connecting the target system or the extension probe.
(10)Emulation memory
This is a memory that replaces the memory/memory mapped I/O on the target system (for details, refer to 2.5
Emulation Memory).
User’s Manual U16533EJ1V0UM
20
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.2 Clock Settings
2.2.1 Clock settings outline
The following 3 clock setting methods are available.
For details, refer to 2.2.2 Clock setting methods.
(1) Use the crystal oscillator mounted on OSC1 of the IE-703114-MC-EM1 as the internal clock.
(2) Change the crystal oscillator mounted on OSC1 of the IE-703114-MC-EM1 the replacement oscillator as the
internal clock.
(3) Use the crystal oscillator on the target system as an external clock (clock input from target system).
Caution When using an external clock, input the clock generated by the crystal oscillator to the X1 pin.
When a clock generated by a crystal/ceramic resonator is used, the emulator does not operate
normally.
Figure 2-2. Clock Setting Outline
IE-703114-MC-EM1
Crystal oscillator
(can be changed)
Internal/external
clock switch
OSC1
Target system
JP1
IC4
Crystal
oscillator
X1
IE-V850E-MC
SW1
PLL/Direct
mode
Emulation
CPU
switching
µ
PD70F3114
CKSEL
CLKOUT
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.2.2 Clock setting methods
A list of the hardware settings when setting the clock is shown below.
Table 2-1. List of Hardware Settings When Setting Clock
Type of Clock Used
Clock
Source
SelectionNote 1
OSC1 Crystal
Oscillator
JP1 Setting
Clock
Mode
SW1
CKSEL
PinNote 2
PLL
2
1
(1) Use crystal oscillator
(OSC1) mounted on
IE-703114-MC-EM1 as
internal clock.
Internal
Internal
External
Factory
PLL
Low-level
input
settings
Direct
PLL
(4.000 MHz)
Direct
High-level
input
8
2
7
Direct
PLL
(2) Change crystal oscillator
(OSC1) mounted on
Change
PLL
Low-level
input
1
(to other than
4.000 MHz)
Direct
PLL
IE-703114-MC-EM1 and
use new oscillator as the
internal clock.
Direct
High-level
input
8
2
7
Direct
PLL
(3) Use the crystal oscillator on
the target system as an
external clock.
Crystal
PLL
Low-level
input
1
oscillator can
be either
Direct
PLL
mounted or not
mounted
Direct
High-level
input
8
7
Direct
Notes 1. Select the clock source in the clock source selection area in the configuration dialog box on the
debugger.
2. The input setting for the CKSEL pin is made only when a target system is connected. Leave this pin
open when operating the emulator on a standalone basis. The emulator operates according to the SW1
setting.
3. When changing the crystal oscillator on the emulator, choose an oscillator that satisfies the conditions
described below.
Power supply voltage
Output level
Type
5 V
CMOS
8-pin type
Pin positions
Pin 1: NC, Pin 4: GND, Pin 5: OUT, Pin 8: VDD
4. For cautions related to using an external clock, refer to the V850E/IA2 Hardware User’s Manual
(U15195E).
Caution Settings other than those described above are prohibited.
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22
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(1) Using the crystal oscillator (OSC1) mounted on the IE-703114-MC-EM1 as the internal clock
<1> Mount the 4.000 MHz crystal oscillator mounted at factory shipment in the OSC1 socket of the IE-703114-
MC-EM1 (with the default settings).
<2> Change JP1 as indicated in Table 2-2 (with the default settings).
<3> Set the SW1 and CKSEL pins according to the clock mode to be used, as shown in Table 2-2.
<4> To start up the integrated debugger (ID850), select “Internal” in the clock source selection area in the
configuration dialog box (selection of clock in emulator).
Table 2-2. Settings When Using Mounted Internal Clock
Type of Clock Used
Clock Source
Selection
OSC1 Crystal
Oscillator
JP1
Clock
Mode
SW1
CKSEL PinNote
Low-level input
Setting
PLL
2
1
Use crystal oscillator
(OSC1) mounted on
IE-703114-MC-EM1 as
internal clock.
Internal
Factory setting
(4.000 MHz)
PLL
Direct
PLL
Direct
High-level input
8
7
Direct
Note The input setting for the CKSEL pin is made only when a target system is connected. Leave this pin open
when operating the emulator on a standalone basis.
Figure 2-3. Outline When Using Mounted Internal Clock
IE-703114-MC-EM1
1-2 shorted
3-4 shorted
5-6 open
Mounted
crystal oscillator
Select
“Internal”
on ID850
7-8 open
OSC1
4 MHz
Target system
JP1
IC4
X1
Crystal
oscillator
IE-V850E-MC
SW1
PLL/Direct
mode
switching
Emulation
CPU
CKSEL
µ
PD70F3114
CLKOUT
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(2) Changing the crystal oscillator (OSC1) mounted on the IE-703114-MC-EM1 and using the new oscillator as the
internal clock
<1> Remove the crystal oscillator (OSC1) that is mounted on the IE-703114-MC-EM1 and mount the oscillator to
be used.
<2> Set JP1 as shown in Table 2-3 (factory settings).
<3> Set the SW1 and CKSEL pins according to the clock mode to be used, as shown in Table 2-3.
<4> Select “Internal” in the clock source selection area in the configuration dialog box on the integrated debugger
(ID850).
Table 2-3. Settings When Changing Mounted Internal Clock
Type of Clock Used
Clock Source
Selection
OSC1 Crystal
Oscillator
JP1
Clock
Mode
SW1
CKSEL pinNote
Setting
PLL
2
1
Change the crystal
oscillator mounted on
IE-703114-MC-EM1
and use the new
oscillator as the
Internal
Change (to
other than
4.000 MHz)
PLL
Low-level input
Direct
PLL
Direct
High-level input
internal clock.
8
7
Direct
Note The input setting for the CKSEL pin is made only when a target system is connected. Leave this pin open
when operating the emulator on a standalone basis.
Figure 2-4. Outline When Changing Mounted Crystal Oscillator and Using New Oscillator as Internal Clock
IE-703114-MC-EM1
Change crystal
oscillator
1-2 shorted
3-4 shorted
5-6 open
Select
“Internal”
on ID850
Target system
7-8 open
OSC1
Other than
4 MHz
IC4
JP1
Crystal
oscillator
X1
IE-V850E-MC
CN2
SW1
PLL/Direct
mode
switching
Emulation
CPU
CKSEL
µ
PD70F3114
CLKOUT
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(3) Using the target system crystal oscillator as an external clock
<1> Set JP1 as shown in Table 2-4 (factory setting).
<2> Set the SW1 and CKSEL pins according to the clock mode to be used, as shown in Table 2-4.
<3> Select “External” in the clock source selection area in the configuration dialog box on the integrated
debugger (ID850).
Table 2-4. Settings When Using External Clock
Type of Clock Used
Clock Source
Selection
OSC1 Crystal
Oscillator
JP1
Clock
Mode
SW1
CKSEL PinNote
Low-level input
Setting
PLL
2
Use crystal oscillator
on target system as
external clock.
External
Crystal
PLL
1
oscillator can
be either
Direct
mounted or not
mounted
PLL
Direct
High-level input
8
7
Direct
Note The input setting for the CKSEL pin is made only when a target system is connected. Leave this pin open
when operating the emulator on a standalone basis.
Caution Be sure to input a clock generated by a crystal oscillator to the X1 pin.
When a clock generated by a crystal/ceramic resonator is used, the emulator does not operate
normally.
Figure 2-5. Outline When Using Crystal Oscillator on Target System as External Clock
IE-703114-MC-EM1
1-2 shorted
Select
“External”
on ID850
Can be either
mounted or
not mounted
3-4 shorted
5-6 open
7-8 open
IC4
Target system
OSC1
JP1
X1
IE-V850E-MC
Crystal
oscillator
SW1
PLL/Direct
mode
switching
Emulation
CPU
CKSEL
µ
PD70F3114
CLKOUT
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.3 Operation Mode Setting
The IE-703114-MC-EM1 supports single-chip mode and ROMless mode, similar to the V850E/IA2. Set these as
follows.
Set as follows in the configuration dialog box mask setting area in accordance with the operation mode used when
the integrated debugger (ID850) is activated.
Operation in ROMless mode:
Select Mode00
Operation in single-chip mode: Select Mode02
Caution In ROMless mode, be sure to start mapping emulation memory from address 0H if the
emulator is not connected to the target system.
Emulation of the MODE pin cannot be performed since the input level to the MODE pin is implemented using the
debugger pin mask function in the IE-703114-MC-EM1.
For the settings of the pins on the target system, refer to the V850E/IA2 Hardware User’s Manual (U15195E).
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.4 Power Supply Settings
2.4.1 JP2 setting
When JP2 is set as shown in Figure 2-6, the IE-703114-MC-EM1 detects the power supply on the target board
and automatically switches whether the emulator operates on VDD from the target system or the emulator’s internal
power supply. (Factory setting)
Caution If the JP2 setting is incorrect, the emulator may be damaged.
Figure 2-6. JP2 Setting (Automatic Switching Setting)
JP2Note
2
1
4
3
Set 1 and 2 as shorted, and 3 and 4 as open
Note A relay is used for switching the power supply. Depending on the combinations with the target system, the
relay may repeatedly turn on/off, making a continuous switching sound, when the target system is turned
off. In such a case, set JP2 as shown in Figure 2-7.
When JP2 is set as shown in Figure 2-7, VDD is always supplied from the target system. Note that, with this
setting, the emulator does not operate when the target system is not connected.
Figure 2-7. JP2 setting (When Power from Target System Is Used)
JP2
2
1
4
3
Set 1 and 2 as open, and 3 and 4 as shorted
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.5 Emulation Memory
This is a substitute memory used to emulate the memory or memory mapped I/O on the target system (capacity: 4
MB).
The emulation memory is mounted on the IE-703114-MC-EM1.
2.5.1 Wait setting for emulation memory
The data wait, address wait, and idle state for the emulation memory are set as follows.
(1) ID850
Select from the following three types on the configuration screen.
Selection
Wait Type
Data wait
Emulation Memory Access
Fixed to 0 waits
External Memory Access
WAIT MASK
Depends on DWC 0, 1 register setting
WAIT signal masked
Address wait
Idle state
Fixed to 0 waits
Fixed to 0 cycles
Fixed to 1 wait
Depends on AWC register setting
Depends on BCC register setting
1 WAIT ACCESS
TARGET WAIT
Data wait
Depends on DWC 0, 1 register setting
and WAIT signal status
Address wait
Idle state
Fixed to 0 waits
Fixed to 0 cycles
Depends on AWC register setting
Depends on BCC register setting
Data wait
Depends on DWC 0, 1 register setting
However, 1 wait when set to 0 waits
Depends on DWC, 0, 1 register setting
and WAIT signal status
Address wait
Idle state
Fixed to 0 waits
Depends on ASC register setting
Depends on BCC register setting
Depends on BCC register setting
(2) MULTI
Select mask or unmask for WAIT and EMWAIT using the “Pinmask” command.
Selection
WAIT: Mask
Wait Type
Data wait
Emulation Memory Access
Fixed to 0 waits
External Memory Access
Depends on DWC 0, 1 register setting
WAIT signal masked
EMWAIT: Mask
Address wait
Idle state
Fixed to 0 waits
Fixed to 0 cycles
Fixed to 1 wait
Depends on AWC register setting
Depends on BCC register setting
WAIT: Unmask
EMWAIT: Mask
Data wait
Depends on DWC 0, 1 register setting
and WAIT signal status
Address wait
Idle state
Fixed to 0 waits
Fixed to 0 cycles
Depends on AWC register setting
Depends on BCC register setting
WAIT: Unmask
Data wait
Depends on DWC 0, 1 register setting
However, 1 wait when set to 0 waits
Depends on DWC 0, 1 register setting
and WAIT signal status
EMWAIT: Unmask
Address wait
Idle state
Fixed to 0 waits
Depends on AWC register setting
Depends on BCC register setting
Depends on BCC register setting
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
2.5.2 Cautions related to emulation memory
(1) Number of data waits required for emulation memory access
The number of data waits that must be inserted for emulation memory access varies depending on the operating
frequency of the emulator.
4 MHz ≤ Operating frequency < 25 MHz
25 MHz ≤ Operating frequency < 40 MHz
40 MHz = Operating frequency
0 waits
1 wait
2 waits
(2) Bus sizing
Make the bus sizing 16 bits (set BSn0 in the BSC register to 1).
An 8-bit bus cannot be used.
(3) WAIT pin
The number of data waits for the emulation memory is not affected by the WAIT pin.
(4) Address wait
Address waits cannot be inserted in the emulation memory.
When address waits need to be inserted, set as follows.
Number of data waits for CS
space of emulation memory
Number of address waits for
external memory or external I/O
Number of data waits for
external memory or external I/O
+
=
This setting is effective to make the access speed to the emulation memory equal to that of the external memory
or external I/O to measure the performance, etc.
For how to insert waits in the emulation memory, refer to 2.5.1 Wait setting for emulation memory.
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29
CHAPTER 3 FACTORY SETTINGS
Item
Setting
Remark
JP1
JP2
SW1
Settings other than those shown here are
prohibited.
2
1
8
7
Setting that detects the power supply on the target
board and switches automatically whether the
emulator operates on VDD from the target system or
on the emulator’s internal power supply.
JP2Note
2
1
4
3
Set to PLL mode.
PLL
DIRECT
Crystal oscillator
(OSC1)
4.000 MHz crystal oscillator is mounted.
The frequency can be changed by changing the
crystal resonator.
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CHAPTER 4 CAUTIONS
4.1 Cautions Related to Pin Termination
The following shows the pins that need special processing in the emulator.
For the detailed circuit configuration, refer to CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND
TARGET INTERFACE CIRCUIT.
(1) Pins that cannot be emulated
The following pins are left open in the emulator, so they cannot be emulated.
Evaluate them by using the target device.
Table 4-1. Pins That Cannot Be Emulated
Pin Name 1
MODE0
Pin Name 2
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GC (14 × 14)
Pin No.
12
−
14
MODE1
REGIN
X2
VPP
62
64
−
16
18
−
18
20
(2) RESET pin
The RESET pin is connected (pulled-up) to VDD via a 33 kΩ resistor.
(3) X1 pin
When using an external clock, the X1 pin is pulled down via a 33 kΩ resistor.
The input to the clock generator is delayed by up to 13.2 ns because it passes through 74HC157 first.
When using an internal clock, this pin is pulled down via a 33 kΩ resister and left open.
(4) CKSEL pin
Pull-up/pull-down can be switched by SW1.
When “PLL” is selected by SW1, this pin is pulled down via a 33 kΩ resistor. When “DIRECT” is selected, it is
pulled up via a 33 kΩ resistor.
31
User’s Manual U16533EJ1V0UM
CHAPTER 4 CAUTIONS
(5) VDD pin
(1) VDD in the target system is used to operate the circuit in the emulator.
(2) When JP2 is set as “1 and 2 open” and “3 and 4 shorted”, the evaluation chip in the emulator operates on
VDD from the target system.
(3) When JP2 is set as “1 and 2 open” and “3 and 4 open”, the emulator recognizes the target system power is
off and operates with the 3.3 V power supply.
Figure 4-1. Schematic Diagram of Power Supply Flow
IE-V850E-MC
IE-703114-MC-EM1
PD70F3114
Target system
Emulation
CPU
µ
Power supply
circuit
VDD
Relay
Fixed
Switched automatically
JP2
JP2Note
2
1
4
3
2
1
4
3
4.2 Cautions Related to Internal RAM
In the emulator, the internal RAM is mapped at the 12 KB space 0xFFFC000 to 0xFFFEFFF.
Since the V850E/IA2 is mapped at the 6 KB space 0xFFFC000 to 0xFFFD7FF, the target system is not mapped at
the higher 6 KB space in the internal RAM (0xFFFD800 to 0xFFFEFFF).
Therefore, measures must be taken such as setting access breaks beforehand because if the higher 6 KB space
is accessed, the emulator cannot issue a fail-safe break.
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
This chapter describes the equivalent circuits in the emulator for signals of the emulator connected to the target
system. Note that, depending on the processing within the emulator, some pins cannot be emulated (refer to
CHAPTER 4 CAUTIONS).
Figures 5-1 to 5-8 show the equivalent circuits.
Tables 5-1 to 5-8 list the pins corresponding to each equivalent circuit.
Figure 5-1. Pin Equivalent Circuit 1
5 V
5 V
4.45 V
µ
PC358
74VHCT541
22 Ω
IE-V850E-MC
LED (Target)
V
DD
1 kΩ
5 V
V
DD5
DD5
Emulation CPU
Relay
(
µ
PD703191)
V
µ
PD70F3114
Table 5-1. Corresponding Pins (Pin Equivalent Circuit 1)
Pin Name 1
VDD
Package
GC (14 × 14)
GF (14 × 20)
Pin No.
39, 64, 86
41, 66, 88
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-2. Pin Equivalent Circuit 2
PDL0 to PDL15
Emulation CPU
PD703191)
PDH0 to PDH5
PCT0 to PCT6
PCM0 to PCM1
(
µ
Table 5-2. Corresponding Pins (Pin Equivalent Circuit 2)
Pin Name
1
Pin Name
2
Package
Pin No.
Pin Name
1
Pin Name
2
Package
Pin No.
PDL0
PDL1
PDL2
PDL3
PDL4
PDL5
PDL6
PDL7
PDL8
PDL9
PDL10
PDL11
PDL12
PDL13
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
40
42
41
43
42
44
43
45
44
46
45
47
46
48
47
49
48
50
49
51
50
52
51
53
52
54
53
55
PDL14
PDL15
PDH0
PDH1
PDH2
PDH3
PDH4
PDH5
PCT0
PCT1
PCT4
PCT6
PCM0
PCM1
AD14
AD15
A16
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GC (14 × 14)
GC (14 × 14)
GC (14 × 14)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GC (14 × 14)
54
56
55
57
56
58
57
59
58
60
59
61
60
62
61
63
65
67
66
68
67
69
68
70
69
71
70
72
A17
A18
A19
A20
A21
LWR
UWR
RD
ASTB
WAIT
CLKOUT
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-3. Pin Equivalent Circuit 3
V
DD5
33 kΩ
Emulation CPU
PD703191)
RESET
(
µ
Table 5-3. Corresponding Pins (Pin Equivalent Circuit 3)
Pin Name 1
RESET
Package
GC (14 × 14)
GF (14 × 20)
Pin No.
19
21
Figure 5-4. Pin Equivalent Circuit 4
AVSS0, AVSS1
,
V
SS, VSS3, CVSS
GND
Table 5-4. Corresponding Pins (Pin Equivalent Circuit 4)
Pin Name 1
AVSS1
Pin Name 2
LWR
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
Pin No.
3
5
VSS3
CVSS
VSS
UWR
RD
13, 63
15, 65
20
22
ASTB
WAIT
38, 87
40, 89
95
AVSS0
97
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-5. Pin Equivalent Circuit 5
MODE0, MODE1,
OPEN
REGIN, X2
Table 5-5. Corresponding Pins (Pin Equivalent Circuit 5)
Pin Name 1
MODE0
Pin Name 2
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GC (14 × 20)
Pin No.
12
−
14
MODE1
REGIN
X2
VPP
62
64
−
16
18
−
18
20
Figure 5-6. Pin Equivalent Circuit 6
µ
PD70F3114
Remark For the corresponding pin names, refer to Table 5-6.
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Table 5-6. Corresponding Pins (Pin Equivalent Circuit 6) (1/3)
Pin Name 1
AVDD0
Pin Name 2
Pin Name 3
Pin Name 4
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
Pin No.
94
96
96
98
97
99
98
100
99
1
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
ANI00
ANI01
ANI02
ANI03
ANI04
ANI05
AVDD1
ANI10
ANI11
ANI12
ANI13
ANI14
ANI15
ANI16
ANI17
RVDD
−
−
−
−
100
2
−
1
3
−
2
4
−
4
6
−
5
7
−
6
8
−
7
9
−
8
10
9
−
−
11
10
12
11
13
14
16
15
17
22
24
23
25
24
26
25
27
−
−
−
REGOUT
SI0
P40
P41
P42
P30
SO0
SCK0
RXD0
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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Table 5-6. Corresponding Pins (Pin Equivalent Circuit 6) (2/3)
Pin Name 1
TXD0
Pin Name 2
P31
Pin Name 3
Pin Name 4
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
Pin No.
26
28
27
29
28
30
29
31
30
32
31
33
32
34
33
35
34
36
35
37
36
38
37
39
71
73
72
74
73
75
74
76
75
77
76
78
77
79
78
80
79
81
80
82
−
−
−
SI1
RXD1
P32
P33
P34
P20
P21
P22
P23
P24
P25
TCLR3
P27
P10
P11
P12
−
−
SO1
TXD1
−
SCK1
TI2
ASCK1
INTP20
INTP21
INTP22
INTP23
INTP24
INTP25
INTP30
INTP31
TO10
−
−
TO21
TO22
TO23
TO24
TCLR2
TI3
−
−
−
−
P26
−
TO3
−
TIUD10
TCUD10
TCLR10
NMI
−
INTP100
INTP101
P00
−
−
−
ESO0
ESO1
ADTRG0
ADTRG1
INTP4
TO000
INTP0
INTP1
INTP2
INTP3
TO3OFF
−
P01
P02
P03
P04
P05
−
−
−
−
−
−
User’s Manual U16533EJ1V0UM
38
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Table 5-6. Corresponding Pins (Pin Equivalent Circuit 6) (3/3)
Pin Name 1
TO001
Pin Name 2
Pin Name 3
Pin Name 4
Package
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
GC (14 × 14)
GF (14 × 20)
Pin No.
81
83
82
84
83
85
84
86
85
87
88
90
89
91
90
92
91
93
92
94
93
95
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
TO002
TO003
TO004
TO005
TO010
TO011
TO012
TO013
TO014
TO015
User’s Manual U16533EJ1V0UM
39
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-7. Pin Equivalent Circuit 7
(a) When using an external clock
74HC157
X1
µ
PD70F3114
33 kΩ
(b) When using an internal clock
X1
OPEN
33 kΩ
Table 5-7. Corresponding Pins (Pin Equivalent Circuit 7)
Pin Name 1
X1
Package
GC (14 × 14)
GF (14 × 20)
Pin No.
17
19
Figure 5-8. Pin Equivalent Circuit 8
(a) When selecting PLL via SW1
µ
PD70F3114
CKSEL
33 kΩ
(b) When selecting DIRECT via SW1
5 V
33 kΩ
CKSEL
µ
PD70F3114
Table 5-8. Corresponding Pins (Pin Equivalent Circuit 8)
Pin Name 1
CKSEL
Package
GC (14 × 14)
GF (14 × 20)
Pin No.
21
23
User’s Manual U16533EJ1V0UM
40
APPENDIX A DIMENSIONS
(1) IE-V850E-MC + IE-703114-MC-EM1 (Unit: mm)
474.7
55
166
251.7
Top View
Pin 1 direction
Side View
IE-V850E-MC
IE-703114-MC-EM1
Bottom View
231.3
15.88
Top View
21.6
41
User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(2) SC-100SDN (Unit: mm)
1
140
42
User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(3) NQPACK100SD (Unit: mm)
[Top view]
21.0
0.5 X 24 = 12.0
R2.2
–
C 1.5
0.5
5.8
0.3
3
Slit width
φ
3 – 1.0
2.5
14.0+– 00.1
2.5
[Side view]
0.18
0.5
15.0
0.5
[Bottom view]
17.0
9.0
φ
4 – 2.0 Projection height 1.8
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(4) YQPACK100SD (Unit: mm)
[Top view]
16.6
0.5 X 24 = 12.0
4
–
0.5
5.8
φ
2.2
φ
3 – 1.0
10.9
13.3
15.7
4
–
R 3.2
R 2.2
–
4
18.1
[Side view]
0.3
0.25 X 0.3
0.25
0.4
[Bottom view]
0.2
C 1.5
13.4
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(5) HQPACK100SD (Unit: mm)
[Top view]
16.6
0.5 X 24 = 12.0
4
–
0.5
5.8
φ
2.2
φ
3 – 1.0
R 2.2
R 3.2
[Side view]
0.23
0.58
[Bottom view]
0.2
C 1.5
13.4
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(6) NEXB-2R100SD/RB (Unit: mm)
[Top view]
99
100
1 2
81
82
79
80
52
NEXB-2R100SD/RB
21.55
51
29 30
49
50
32
31
[Side view]
[Bottom view]
1.2
C2.0
81
82
99
100
79 80
2 1
1.2
51 52
30 29
50
49
32
31
31.0
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(7) NQPACK100RB (Unit: mm)
[Top view]
21.75
0.65 × 19 = 12.35
C1.5
3-R1.5
6.0
0.65
0.4
3-
φ 1.0
14.25
17.4
[Side view]
0.25
15.25
(21.75)
0.5
[Bottom view]
17.15
0.5
15.25
10.0
4-φ 2.0 (A projection height : 1.8 mm)
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(8) YQPACK100RB (Unit: mm)
[Top view]
23.75
17.4
0.65 × 19 = 12.35
0.65
6.0
3-R2.5
C2.0
3-
φ 1.0
φ
4- 2.2
10.35
12.75
15.15
17.55
[Side view]
0.3
0.25
0.25
0.4
[Bottom view]
14.15
C1.5
14.75
0.4
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
(9) HQPACK100RB (Unit: mm)
[Top view]
23.75
0.65 × 19 = 12.35
3-R2.5
C2.0
0.65
6.0
3-
φ 1.0
4-
φ 2.2
17.4
[Side view]
16.57
(23.07)
0.25
0.5
[Bottom view]
14.1
C1.5
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
The following shows a diagram of the conditions when connecting the in-circuit emulator option board to the
conversion connector. Follow the configuration below and consider the shape of parts to be mounted on the target
system when designing a system.
Figure A-1. 100-Pin Plastic LQFP (Fine Pitch) (14 × 14)
Side view
In-circuit emulator
In-circuit emulator
IE-V850E-MC
option board
IE-703114-MC-EM1
Conversion connector
YQGUIDE
YQPACK100SD
231.3 mm
Note
NQPACK100SD
Target system
Note YQSOCKET100SDN (sold separately) can be inserted here to adjust the height (height: 3.2 mm).
Top view
IE-V850E-MC
Target system
IE-703114-MC-EM1
YQPACK100SD, NQPACK100SD,
YQGUIDE
Connection condition diagram
IE-703114-MC-EM1
Connect to IE-V850E-MC.
75 mm
YQGUIDE
YQPACK100SD
NQPACK100SD
13.3 mm
31.84 mm
17.9955 mm
Target system
21.58 mm
28.7445 mm
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User’s Manual U16533EJ1V0UM
APPENDIX A DIMENSIONS
Figure A-2. 100-Pin Plastic QFP (14 × 20)
Side view
In-circuit emulator
IE-V850E-MC
In-circuit emulator option board
IE-703114-MC-EM1
Conversion connector
231.3 mm
Note
NEXB-2R100SD/RB
YQGUIDE
YQPACK100RB
NQPACK100RB
Target system
Note YQSOCKET100SDN (sold separately) can be inserted here to adjust the height (height: 3.2 mm).
Top view
IE-V850E-MC
Target system
NEXB-2R100SD/RB
Pin 1 position
IE-703114-MC-EM1
20.7 mm
8 mm
YQPACK100RB, NQPACK100RB,
YQGUIDE
Connection condition diagram
IE-703114-MC-EM1
Connect to IE-V850E-MC.
Pin 1 position
75 mm
NEXB-2R100SD/RB
YQPACK100RB
NQPACK100RB
33.2 mm
38 mm
Target system
20 mm
28.7 mm
18.5 mm
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User’s Manual U16533EJ1V0UM
APPENDIX B EXAMPLE OF USE OF CONNECTOR FOR TARGET CONNECTION
(1) When directly connecting device to target system (connector for target connection is not used)
Device
Target system
(2) When using device using connector for target connection (GC package)
Fastening screws
(included with HQPACK100SD)
HQPACK100SD
Device
NQPACK100SD
Target system
(3) When using device using connector for target connection (GF package)
Fastening screws
(included with HQPACK100RB)
HQPACK100RB
Device
NQPACK100RB
Target system
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User’s Manual U16533EJ1V0UM
APPENDIX C CONNECTORS FOR TARGET CONNECTION
C.1 Usage
(1) When mounting NQPACK100SD or NQPACK100RB on target system
<1> Coat the tip of the four projections (points) at the bottom of the NQPACK100SD or NQPACK100RB with
two-component type epoxy adhesive (cure time longer than 30 min.) and bond the NQPACK100SD or
NQPACK100RB to the target system. If not bonded properly, the pad of the printed circuit board may peel
off when the emulator is removed from the target system. If the leads of the NQPACK100SD is not can be
easily, aligned with the pads of the target system perform step <2> to adjust the position.
<2> To adjust the position, insert the guide pins for position adjustment (NQGUIDE) provided with the
NQPACK100SD or NQPACK100RB into the pin holes on the upper side of NQPACK100SD or
NQPACK100RB (refer to Figure C-1). The diameter of a hole is φ = 1.0 mm. There are three non-through
holes (refer to APPENDIX A DIMENSIONS).
<3> After setting the HQPACK100SD or HQPACK100RB, solder the NQPACK100SD or HQPACK100RB to the
target system. By following this sequence, adherence of flux or solder sputtering on the contact pins of the
NQPACK100SD or HQPACK100RB can be avoided.
Recommended soldering conditions… Reflow:
240°C, 20 seconds max.
Partial heating: 240°C, 10 seconds max. (per pin row)
<4> Remove the guide pins.
Figure C-1. Mounting NQPACK100SD or NQPACK100RB
HQPACK100SD
or HQPACK100RB
Guide pins
(NQGUIDE)
NQPACK100SD
or NQPACK100RB
Target system
Remark NQPACK100SD or NQPACK100RB: Connector for target connection
HQPACK100SD or NQPACK100RB: Cover for device installation
User’s Manual U16533EJ1V0UM
53
APPENDIX C CONNECTORS FOR TARGET CONNECTION
(2) When mounting device
Caution Check for abnormal conditions such as resin burr or bent pins before mounting a device on the
NQPACK100SD or NQPACK100RB. Moreover, check that the hold pins of the HQPACK100SD
or HQPACK100RB are not broken or bent before mounting the HQPACK100SD or
HQPACK100RB. If there are broken or bent pins, fix them with a thin, flat plate such as a blade.
<1> Make sure that the NQPACK100SD or NQPACK100RB is clean and the device pins are parallel (flat)
before mounting a device on the NQPACK100SD or NQPACK100RB. Then, after mounting the
NQPACK100SD or NQPACK100RB on the target board, fix the device and the HQPACK100SD or
HQPACK100RB (refer to Figure C-2).
<2> Using the screws provided with the HQPACK100SD or HQPACK100RB (four locations: M2 × 6 mm),
secure the HQPACK100SD or HQPACK100RB, device, and NQPACK100SD or NQPACK100RB.
Tighten the screws in a crisscross pattern with the screwdriver provided or a driver with a torque gauge
(avoid tightening only one screw strongly). Tighten the screws with 0.55 kg⋅f⋅cm (0.054 N⋅m) max. torque.
Excessive tightening may diminish conductivity.
At this time, each pin is fixed inside the plastic dividers by the contact pin of the NQPACK100SD or
NQPACK100RB and the hold pin of the HQPACK100SD or HQPACK100RB (refer to Figure C-3). Thus,
pins cannot cause shorting with the pins of neighboring devices.
Figure C-2. Mounting Device
Fastening screws
HQPACK100SD
or HQPACK100RB
Device
NQPACK100SD
or NQPACK100RB
Target system
Figure C-3. NQPACK100SD or NQPACK100RB and Device Pin
Hold pin of HQPACK100SD
or HQPACK100RB
Divider
Device
Pin
Contact pin of NQPACK100SD
or NQPACK100RB
User’s Manual U16533EJ1V0UM
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APPENDIX C CONNECTORS FOR TARGET CONNECTION
C.2 Cautions on Handling Connectors
(1) When taking connectors out of the case, remove the sponge while holding the main unit.
(2) When soldering the NQPACK100SD or NQPACK100RB to the target system, cover it with the HQPACK100SD or
HQPACK100RB for protection against splashing flux.
Recommended soldering conditions… Reflow:
240°C, 20 seconds max.
Partial heating: 240°C, 10 seconds max. (per pin row)
(3) Check for abnormal conditions such as resin burr or bent pins before mounting a device on the NQPACK100SD
or NQPACK100RB. Moreover, when covering with the HQPACK100SD or HQPACK100RB, check that the hold
pins of the HQPACK100SD or HQPACK100RB are not broken or bent before mounting the HQPACK100SD or
HQPACK100RB. If there are broken or bent pins, fix them with a thin, flat plate such as a blade.
(4) When securing the YQPACK100SD or YQPACK100RB (connector for emulator connection) or HQPACK100SD
or HQPACK100RB to the NQPACK100SD or NQPACK100RB with screws, tighten the four screws temporarily
with the screwdriver provided or a driver with a torque gauge, then tighten the screws in a crisscross pattern (with
0.054 N⋅m max. torque).
Excessive tightening of only one screw may diminish conductivity.
If the conductivity is diminished after screw-tightening, stop tightening, remove the screws and make sure the
NQPACK100SD or NQPACK100RB is clean and the device pins are parallel (flat).
(5) Device pins are not strong. Repeatedly connecting to the NQPACK100SD or NQPACK100RB may cause pins to
bend. When mounting a device on NQPACK100SD or NQPACK100RB, check and adjust bent pins.
User’s Manual U16533EJ1V0UM
55
APPENDIX D MOUNTING PLASTIC SPACER
This chapter describes the mounting method for the plastic spacer supplied with the IE-V850E-MC.
When using the emulator connected to the target system, mount the plastic spacer as shown in Figure D-1 to fix
the pod horizontally.
z Mounting plastic spacer on IE-V850E-MC
<1> Remove the nylon rivet from the rear part of the pod.
<2> Tighten the plastic spacer with the plastic screw supplied.
<3> To adjust the height, use a spacer other than the included spacer or a stand.
Figure D-1. Mounting Method of Plastic Spacer
Plastic spacer
Target system
User’s Manual U16533EJ1V0UM
56
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