NTTD1P02R2/D [ETC]

Power MOSFET -1.45 Amps, -20 Volts ; 功率MOSFET -1.45安培,伏特-20\n
NTTD1P02R2/D
型号: NTTD1P02R2/D
厂家: ETC    ETC
描述:

Power MOSFET -1.45 Amps, -20 Volts
功率MOSFET -1.45安培,伏特-20\n

文件: 总8页 (文件大小:92K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NTTD1P02R2  
Product Preview  
Power MOSFET  
-1.45 Amps, -20 Volts  
P–Channel Enhancement Mode  
Dual Micro8 Package  
http://onsemi.com  
Features  
Ultra Low R  
DS(on)  
–1.45 AMPERES  
–20 VOLTS  
Higher Efficiency Extending Battery Life  
Logic Level Gate Drive  
Miniature Dual Micro8 Surface Mount Package  
Diode Exhibits High Speed, Soft Recovery  
Micro8 Mounting Information Provided  
160 mW @ VGS = –4.5  
Applications  
Dual P–Channel  
Power Management in Portable and Battery–Powered Products, i.e.:  
Computers, Printers, PCMCIA Cards, Cellular and Cordless  
Telephones  
D
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
G
Rating  
Symbol  
Value  
Unit  
Drain–to–Source Voltage  
V
–20  
V
V
S
DSS  
Gate–to–Source Voltage – Continuous  
V
"8.0  
GS  
Thermal Resistance –  
Junction–to–Ambient (Note 1.)  
R
P
I
I
250  
0.50  
–1.45  
–1.15  
–10  
°C/W  
W
A
A
A
θ
JA  
8
Total Power Dissipation @ T = 25°C  
A
D
Continuous Drain Current @ T = 25°C  
A
D
1
Continuous Drain Current @ T = 70°C  
A
D
Pulsed Drain Current (Note 3.)  
I
DM  
Micro8  
CASE 846A  
STYLE 2  
Thermal Resistance –  
Junction–to–Ambient (Note 2.)  
Total Power Dissipation @ T = 25°C  
R
P
125  
1.0  
°C/W  
W
θ
JA  
A
D
Continuous Drain Current @ T = 25°C  
I
I
–2.04  
–1.64  
–16  
A
A
A
A
D
Continuous Drain Current @ T = 70°C  
A
D
MARKING DIAGRAM  
& PIN ASSIGNMENT  
Pulsed Drain Current (Note 3.)  
I
DM  
Operating and Storage  
Temperature Range  
T , T  
–55 to  
+150  
°C  
J
stg  
1
2
3
4
Drain 1  
Drain 1  
Drain 2  
Drain 2  
8
7
6
5
Source 1  
Gate 1  
Source 2  
Single Pulse Drain–to–Source Avalanche  
E
AS  
35  
mJ  
YWW  
BC  
Energy – Starting T = 25°C  
J
Gate 2  
(V = –20 Vdc, V = –4.5 Vdc,  
DD  
GS  
Peak I = –3.5 Apk, L = 5.6 mH,  
L
(Top View)  
= Year  
WW = Work Week  
BC = Device Code  
R
= 25 )  
G
Maximum Lead Temperature for Soldering  
Purposes for 10 seconds  
T
L
260  
°C  
Y
1. Minimum FR–4 or G–10 PCB, Steady State.  
2. Mounted onto a 2square FR–4 Board (1sq. 2 oz Cu 0.06thick single  
sided), Steady State.  
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.  
ORDERING INFORMATION  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
Device  
NTTD1P02R2  
Package  
Shipping  
4000/Tape & Reel  
Micro8  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
November, 2000 – Rev. 0  
NTTD1P02R2/D  
NTTD1P02R2  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) *  
C
Characteristic  
OFF CHARACTERISTICS  
Symbol  
Min  
Typ  
Max  
Unit  
Drain–to–Source Breakdown Voltage  
V
Vdc  
(BR)DSS  
(V = 0 Vdc, I = –250 µAdc)  
Temperature Coefficient (Positive)  
–20  
–12  
GS  
D
mV/°C  
µAdc  
Zero Gate Voltage Drain Current  
I
DSS  
(V = 0 Vdc, V = –20 Vdc, T = 25°C)  
–1.0  
–10  
GS  
DS  
J
(V = 0 Vdc, V = –20 Vdc, T = 125°C)  
GS  
DS  
J
Gate–Body Leakage Current  
(V = –8 Vdc, V = 0 Vdc)  
I
I
nAdc  
nAdc  
GSS  
–100  
100  
GS  
DS  
Gate–Body Leakage Current  
(V = +8 Vdc, V = 0 Vdc)  
GSS  
GS  
DS  
ON CHARACTERISTICS  
Gate Threshold Voltage  
V
GS(th)  
Vdc  
(V = V , I = –250 µAdc)  
Temperature Coefficient (Negative)  
–0.7  
–0.95  
2.3  
–1.4  
DS  
GS  
D
Static Drain–to–Source On–State Resistance  
R
DS(on)  
(V = –4.5 Vdc, I = –1.45 Adc)  
0.130  
0.175  
0.190  
0.160  
0.250  
GS  
D
(V = –2.7 Vdc, I = –0.7 Adc)  
GS  
D
(V = –2.5 Vdc, I = –0.7 Adc)  
GS  
D
Forward Transconductance (V = –10 Vdc, I = –0.7 Adc)  
g
FS  
2.5  
Mhos  
pF  
DS  
D
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
265  
100  
60  
iss  
(V = –16 Vdc, V = 0 Vdc,  
DS  
GS  
Output Capacitance  
C
oss  
f = 1.0 MHz)  
Reverse Transfer Capacitance  
C
rss  
SWITCHING CHARACTERISTICS (Notes 4. and 5.)  
Turn–On Delay Time  
t
10  
25  
30  
25  
10  
20  
30  
20  
5.0  
1.5  
2.0  
ns  
ns  
d(on)  
Rise Time  
t
r
(V = –16 Vdc, I = –1.45 Adc,  
DD  
D
V
GS  
= –4.5 Vdc, R = 6.0 )  
G
Turn–Off Delay Time  
Fall Time  
t
t
t
d(off)  
t
f
Turn–On Delay Time  
Rise Time  
d(on)  
t
r
(V = –16 Vdc, I = –0.7 Adc,  
DD  
D
V
GS  
= –4.5 Vdc, R = 6.0 )  
G
Turn–Off Delay Time  
Fall Time  
d(off)  
t
f
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
Q
10  
nC  
tot  
gs  
gd  
(V = –16 Vdc,  
DS  
Q
Q
V
GS  
= –4.5 Vdc,  
I
D
= –1.45 Adc)  
BODY–DRAIN DIODE RATINGS (Note 4.)  
Diode Forward On–Voltage  
(I = –1.45 Adc, V = 0 Vdc)  
V
–0.91  
–0.72  
–1.1  
Vdc  
ns  
S
GS  
SD  
(I = –1.45 Adc, V = 0 Vdc,  
S
GS  
T = 125°C)  
J
Reverse Recovery Time  
t
25  
13  
rr  
(I = –1.45 Adc, V = 0 Vdc,  
S
GS  
t
a
dI /dt = 100 A/µs)  
S
t
12  
b
Reverse Recovery Stored Charge  
Q
0.015  
µC  
RR  
4. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%.  
5. Switching characteristics are independent of operating junction temperature.  
* Handling precautions to protect against electrostatic discharge is mandatory.  
http://onsemi.com  
2
NTTD1P02R2  
3
2
3
–2.7 V  
–2.9 V  
–3.1 V  
–3.3 V  
–3.7 V  
–4.5 V  
–2.5 V  
V
DS  
–10 V  
–2.3 V  
T = 25°C  
J
–2.1 V  
2
–8 V  
–1.9 V  
–1.7 V  
T = –55°C  
J
1
0
1
0
T = 100°C  
T = 25°C  
J
J
V
= –1.5 V  
GS  
0
0.25  
0.5  
0.75  
1
1.25  
1.5  
1.75  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
–V , DRAIN–TO–SOURCE VOLTAGE (VOLTS)  
DS  
–V , GATE–TO–SOURCE VOLTAGE (VOLTS)  
GS  
Figure 1. On–Region Characteristics  
Figure 2. Transfer Characteristics  
0.4  
0.3  
0.2  
T = 25°C  
J
I
= –1.45 A  
D
0.3  
0.2  
0.1  
0
V
GS  
= –2.5 V  
T = 25°C  
J
V
V
= –2.7 V  
= –4.5 V  
GS  
GS  
0.1  
0
0
2
4
6
8
10  
12  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
–V  
GS,  
GATE–TO–SOURCE VOLTAGE (VOLTS)  
–I DRAIN CURRENT (AMPS)  
D,  
Figure 3. On–Resistance versus  
Gate–to–Source Voltage  
Figure 4. On–Resistance versus Drain Current  
and Gate Voltage  
1.6  
1.4  
1.2  
1
100  
10  
1
V
GS  
= 0 V  
I
V
= –1.45 A  
D
= –4.5 V  
GS  
T = 125°C  
J
T = 100°C  
J
0.8  
0.6  
–50 –25  
0
25  
50  
75  
100  
125 150  
4
8
12  
16  
20  
T
J,  
JUNCTION TEMPERATURE (°C)  
–V  
DS,  
DRAIN–TO–SOURCE VOLTAGE (VOLTS)  
Figure 5. On–Resistance Variation with  
Temperature  
Figure 6. Drain–to–Source Leakage Current  
versus Voltage  
http://onsemi.com  
3
NTTD1P02R2  
800  
5
20  
18  
16  
14  
12  
10  
8
QT  
Q2  
V
= 0 V  
V
GS  
= 0 V  
DS  
C
iss  
T = 25°C  
J
4
3
2
600  
400  
C
rss  
–V  
GS  
Q1  
C
C
iss  
6
200  
0
I
D
= –1.45 A  
1
0
–V  
DS  
4
T = 25°C  
J
oss  
rss  
2
0
C
0
1
2
3
4
5
6
10  
5
0
5
10  
15  
20  
–V  
GS  
–V  
DS  
Q , TOTAL GATE CHARGE (nC)  
g
GATE–TO–SOURCE OR DRAIN–TO–SOURCE  
VOLTAGE (VOLTS)  
Figure 8. Gate–to–Source and  
Drain–to–Source Voltage versus Total Charge  
Figure 7. Capacitance Variation  
100  
V
D
= –16 V  
V
= 0 V  
DD  
GS  
1.6  
1.2  
0.8  
I
= –1.45 A  
T = 25°C  
J
V
GS  
= –4.5 V  
t
r
t
d (off)  
10  
t
f
t
d (on)  
0.4  
0
1
10  
100  
1
0.4  
0.5  
0.6  
0.7  
0.8  
0.9  
1
R
GATE RESISTANCE (OHMS)  
–V  
SD,  
SOURCE–TO–DRAIN VOLTAGE (VOLTS)  
G,  
Figure 9. Resistive Switching Time Variation  
versus Gate Resistance  
Figure 10. Diode Forward Voltage  
versus Current  
100  
V
GS  
= 8 V  
SINGLE PULSE  
di/dt  
T
C
= 25°C  
I
S
10  
1
100 ms  
t
rr  
1 ms  
t
a
t
b
TIME  
10 ms  
0.25 I  
t
p
S
0.1  
I
S
R
LIMIT  
DS(on)  
THERMAL LIMIT  
PACKAGE LIMIT  
dc  
0.01  
0.1  
1
10  
100  
Figure 12. Diode Reverse Recovery Waveform  
V
DS  
, DRAIN–TO–SOURCE VOLTAGE (VOLTS)  
Figure 11. Maximum Rated Forward Biased  
Safe Operating Area  
http://onsemi.com  
4
NTTD1P02R2  
TYPICAL ELECTRICAL CHARACTERISTICS  
1000  
100  
10  
D = 0.5  
0.2  
0.1  
0.05  
P
(pk)  
R
(t) = r(t) R  
θ
JC  
0.02  
0.01  
θ
JC  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
READ TIME AT t  
1
t
1
1
t
2
T
- T = P  
C
R (t)  
θ
JC  
J(pk)  
(pk)  
SINGLE PULSE  
DUTY CYCLE, D = t /t  
1 2  
0.1  
1.0E–05 1.0E–04  
1.0E–03  
1.0E–02  
1.0E–01  
t, TIME (s)  
1.0E+00  
1.0E+01  
1.0E+02  
1.0E+03  
Figure 13. Thermal Response  
INFORMATION FOR USING THE Micro8 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to ensure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self–align when  
subjected to a solder reflow process.  
0.041  
1.04  
0.208  
5.28  
0.126  
3.20  
0.015  
0.38  
0.0256  
0.65  
inches  
mm  
http://onsemi.com  
5
NTTD1P02R2  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
The soldering temperature and time shall not exceed  
260°C for more than 10 seconds.  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
Always preheat the device.  
The delta temperature between the preheat and  
soldering should be 100°C or less.*  
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering  
method, the difference shall be a maximum of 10°C.  
When shifting from preheating to soldering, the  
maximum temperature gradient shall be 5°C or less.  
After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and  
result in latent failure due to mechanical stress.  
Mechanical stress or shock should not be applied  
during cooling.  
* Soldering a device without preheating can cause  
excessive thermal shock and stress which can result in  
damage to the device.  
TYPICAL SOLDER HEATING PROFILE  
For any given circuit board, there will be a group of  
control settings that will give the desired heat pattern. The  
operator must set temperatures for several heating zones  
and a figure for belt speed. Taken together, these control  
settings make up a heating “profile” for that particular  
circuit board. On machines controlled by a computer, the  
computer remembers these profiles from one operating  
session to the next. Figure 14 shows a typical heating  
profile for use when soldering a surface mount device to a  
printed circuit board. This profile will vary among  
soldering systems, but it is a good starting point. Factors  
that can affect the profile include the type of soldering  
system in use, density and types of components on the  
board, type of solder used, and the type of board or  
substrate material being used. This profile shows  
temperature versus time. The line on the graph shows the  
actual temperature that might be experienced on the surface  
of a test board at or near a central solder joint. The two  
profiles are based on a high density and a low density  
board. The Vitronics SMD310 convection/infrared reflow  
soldering system was used to generate this profile. The type  
of solder used was 62/36/2 Tin Lead Silver with a melting  
point between 177–189°C. When this type of furnace is  
used for solder reflow work, the circuit boards and solder  
joints tend to heat first. The components on the board are  
then heated by conduction. The circuit board, because it has  
a large surface area, absorbs the thermal energy more  
efficiently, then distributes this energy to the components.  
Because of this effect, the main body of a component may  
be up to 30 degrees cooler than the adjacent solder joints.  
STEP 5  
HEATING  
ZONES 4 & 7  
SPIKE"  
STEP 6  
VENT  
STEP 7  
COOLING  
STEP 1  
PREHEAT  
ZONE 1  
RAMP"  
STEP 4  
HEATING  
ZONES 3 & 6  
SOAK"  
STEP 2  
VENT  
STEP 3  
HEATING  
SOAK" ZONES 2 & 5  
RAMP"  
205° TO 219°C  
PEAK AT  
SOLDER JOINT  
200°C  
150°C  
170°C  
DESIRED CURVE FOR HIGH  
MASS ASSEMBLIES  
160°C  
150°C  
SOLDER IS LIQUID FOR  
40 TO 80 SECONDS  
(DEPENDING ON  
100°C  
140°C  
MASS OF ASSEMBLY)  
100°C  
50°C  
DESIRED CURVE FOR LOW  
MASS ASSEMBLIES  
TIME (3 TO 7 MINUTES TOTAL)  
T
MAX  
Figure 14. Typical Solder Heating Profile.  
http://onsemi.com  
6
NTTD1P02R2  
TAPE & REEL INFORMATION  
Micro8  
Dimensions are shown in millimeters (inches)  
1.60 (.063)  
1.50 (.059)  
2.05 (.080)  
1.95 (.077)  
0.35 (.013)  
0.25 (.010)  
1.85 (.072)  
1.65 (.065)  
4.10 (.161)  
3.90 (.154)  
PIN  
NUMBER 1  
B
B
A
5.55 (.218)  
5.45 (.215)  
12.30  
11.70  
(.484)  
(.461)  
3.50 (.137)  
3.30 (.130)  
1.60 (.063)  
1.50 (.059)  
TYP.  
1.50 (.059)  
1.30 (.052)  
A
FEED DIRECTION  
8.10 (.318)  
7.90 (.312)  
SECTION A–A  
5.40 (.212)  
5.20 (.205)  
SECTION B–B  
NOTES:  
1. CONFORMS TO EIA–481–1.  
2. CONTROLLING DIMENSION: MILLIMETER.  
18.4 (.724)  
MAX.  
NOTE 3  
13.2 (.52)  
12.8 (.50)  
330.0  
(13.20)  
MAX.  
50.0  
(1.97)  
MIN.  
14.4 (.57)  
12.4 (.49)  
NOTE 4  
NOTES:  
1. CONFORMS TO EIA–481–1.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. INCLUDES FLANGE DISTORTION AT OUTER EDGE.  
4. DIMENSION MEASURED AT INNER HUB.  
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7
NTTD1P02R2  
PACKAGE DIMENSIONS  
Micro8  
CASE 846A–02  
ISSUE E  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
–A–  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,  
PROTRUSIONS OR GATE BURRS. MOLD FLASH,  
PROTRUSIONS OR GATE BURRS SHALL NOT  
EXCEED 0.15 (0.006) PER SIDE.  
4. DIMENSION B DOES NOT INCLUDE INTERLEAD  
FLASH OR PROTRUSION. INTERLEAD FLASH OR  
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)  
PER SIDE.  
–B–  
K
MILLIMETERS  
INCHES  
PIN 1 ID  
G
DIM MIN  
MAX  
3.10  
3.10  
1.10  
MIN  
MAX  
0.122  
0.122  
0.043  
0.016  
D 8 PL  
A
B
C
D
G
H
J
2.90  
2.90  
---  
0.114  
0.114  
---  
M
S
S
0.08 (0.003)  
T B  
A
0.25  
0.40 0.010  
0.65 BSC  
0.026 BSC  
0.05  
0.13  
4.75  
0.40  
0.15 0.002  
0.23 0.005  
5.05 0.187  
0.70 0.016  
0.006  
0.009  
0.199  
0.028  
SEATING  
PLANE  
–T–  
K
L
C
0.038 (0.0015)  
STYLE 2:  
PIN 1. SOURCE 1  
2. GATE 1  
L
J
H
3. SOURCE 2  
4. GATE 2  
5. DRAIN 2  
6. DRAIN 2  
7. DRAIN 1  
8. DRAIN 1  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
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NTTD1P02R2/D  

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