UT61L256C [ETC]
ASYNCHRONOUS STATIC RAM- High Speed ; 异步静态RAM-高速\n
| 型号： | UT61L256C |
| 厂家： | 
ETC |
| 描述： | ASYNCHRONOUS STATIC RAM- High Speed
|
| 文件： | 总12页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
REVISION HISTORY
REVISION
DESCRIPTION
DATE
Preliminary Rev. 0.1 Original
May 4,2001
Jul 13,2001
Jan 17,2003
Rev. 1.0
Rev. 1.1
Sample ready and release
1. Add package 28-pin 300 mil skinny PDIP & Package
outline dimension
℃ ℃
2. Add Extended temperature : -25 ~85
3. Revised Low operating power consumption :
60mA (typical) ꢀ60/50/40 mA (typical)
4. Add Standby current : 10 mA (typical)
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
FEATURES
GENERAL DESCRIPTION
Fast access time : 10/12/15 ns (max.)
Low operating power consumption :
60/50/40 mA (typical)
Standby current : 10 mA (typical)
Single 3.3V power supply
All inputs and outputs TTL compatible
ꢁ
The UT61L256C is a 262,144-bit high-speed
CMOS static random access memory organized
as 32,768 words by 8 bits. It is fabricated using
high performance, high reliability CMOS
technology.
ꢁ
ꢁ
ꢁ
Operating temperature :
℃ ℃
Commercial : 0 ~70
℃ ℃
Extended : -25 ~85
ꢁ
The UT61L256C is designed for high-speed
system applications. It is particularly suited for
use in high-speed system applications.
Fully static operation
Three state outputs
Package : 28-pin 300 mil SOJ
ꢁ
ꢁ
ꢁ
The UT61L256C operates from a single 3.3V
power supply and all inputs and outputs are fully
TTL compatible.
28-pin 8mm×13.4mm STSOP
28-pin 300 mil skinny PDIP
FUNCTIONAL BLOCK DIAGRAM
×
32K
8
A0-A14
DECODER
MEMORY
ARRAY
Vcc
Vss
I/O DATA
CIRCUIT
I/O1-I/O8
COLUMN I/O
CE
OE
CONTROL
CIRCUIT
WE
_________________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
PIN CONFIGURATION
Vcc
A14
A12
A7
1
28
27
A10
CE
1
28
27
OE
2
3
WE
A11
2
3
26
25
26
25
A9
A8
A13
A8
I/O8
I/O7
4
4
A6
A13
WE
Vcc
5
6
24
23
I/O6
A5
5
6
24
23
A9
I/O5
I/O4
A4
A11
7
8
9
22
21
7
8
9
22
21
A3
OE
A10
CE
A14
A12
A7
Vss
I/O3
I/O2
I/O1
A0
UT61L256C
A2
20
19
20
19
10
11
A1
18
17
16
15
A6
A0
10
11
I/O8
I/O7
I/O6
I/O5
I/O4
12
13
14
A5
18
17
I/O1
I/O2
I/O3
Vss
A4
A1
12
A3
A2
13
14
16
15
STSOP
SOJ
Vcc
WE
A14
A12
A7
1
28
27
2
3
26
25
A13
A8
4
A6
A5
5
6
24
23
A9
A4
A11
7
22
21
A3
OE
8
9
A2
A10
20
19
A1
CE
A0
10
11
I/O8
I/O7
18
17
I/O1
I/O2
I/O3
Vss
12
I/O6
I/O5
I/O4
13
14
16
15
skinny PDIP
PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0 - A14
Address Inputs
I/O1 - I/O8
Data Inputs/Outputs
Chip Enable Input
CE
Write Enable Input
Output Enable Input
WE
OE
VCC
VSS
Power Supply
Ground
_________________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to Vss
Operating Temperature
SYMBOL
VTERM
TA
RATING
-0.5 to +4.5
0 to +70
UNIT
V
℃
Commercial
Extended
TA
-25 to +85
℃
Storage Temperature
TSTG
-65 to +150
℃
W
mA
℃
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
PD
IOUT
Tsolder
1
50
260
*Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions
for extended period may affect device reliability.
TRUTH TABLE
MODE
I/O OPERATION
SUPPLY CURRENT
OE
X
H
WE
X
H
CE
H
L
Standby
Output Disable
Read
High - Z
High - Z
DOUT
ISB,ISB1
ICC
ICC
L
L
H
Write
L
X
L
DIN
ICC
Note: H = VIH, L=VIL, X = Don't care.
℃
℃
℃
℃
DC ELECTRICAL CHARACTERISTICS
(TA = 0 to 70 (C) / -25 to 85 (E) )
PARAMETER
Power Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
SYMBOL TEST CONDITION
MIN. TYP. MAX. UNIT
VCC
VIH
VIL
ILI
3.0
2
3.3
3.6
-
V
V
V
-
-
-
-
- 1
0.8
1
A
µ
≦ ≦
VSS VIN VCC
Output Leakage Current
ILO
- 1
-
1
A
µ
≦ ≦
VSS VI/O VCC
= VIH or = VIH
CE
or
OE
= VIL
WE
Output High Voltage
Output Low Voltage
Operating Power
Supply Current
VOH
VOL
ICC
IOH = - 4mA
IOL = 8mA
2.0
-
-
-
-
60
-
V
V
mA
mA
mA
mA
0.4
75
- 10
- 12
- 15
= VIL , II/O = 0mA
CE
Cycle=Min.
-
-
-
50
40
10
60
50
15
Standby Power
Supply Current
ISB
= VIH
CE
CE
ISB1
-
-
3
mA
≧
VCC-0.2V
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 8ns.
2. Undershoot : Vss-3.0v for pulse width less than 8ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
℃
CAPACITANCE (T =25 , f=1.0MHz)
A
PARAMETER
Input Capacitance
SYMBOL
MIN.
-
-
MAX.
8
10
UNIT
pF
pF
CIN
CI/O
Input/Output Capacitance
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
3ns
1.5V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
CL=30pF, IOH/IOL=-4mA/8mA
℃
℃
℃
℃
AC ELECTRICAL CHARACTERISTICS
(TA = 0 to 70 (C) / -25 to 85 (E) )
(1) READ CYCLE
UT61L256C-10 UT61L256C-12 UT61L256C-15
MIN. MAX. MIN. MAX. MIN. MAX.
SYMBOL
PARAMETER
UNIT
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
10
-
-
-
10
10
5
-
-
5
5
-
12
-
-
-
12
12
6
-
-
6
6
-
15
-
-
-
15
15
7
-
-
7
7
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
2
0
-
-
1
3
0
-
-
3
4
0
-
-
3
(2) WRITE CYCLE
PARAMETER
UT61L256C-10 UT61L256C-12 UT61L256C-15
MIN. MAX. MIN. MAX. MIN. MAX.
SYMBOL
UNIT
Write Cycle Time
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
10
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
12
10
10
0
9
0
7
0
3
-
-
-
-
-
-
-
-
-
-
15
12
12
0
10
0
8
0
4
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
tOW*
tWHZ*
1
7
8
*These parameters are guaranteed by device characterization, but not production tested.
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled)
(1,2,4)
tRC
Address
tAA
tOH
tOH
DOUT
Data Valid
READ CYCLE 2 (
and
Controlled)
(1,3,5,6)
OE
CE
t
RC
Address
CE
t
t
AA
ACE
OE
t
OE
t
CHZ
t
CLZ
t
OHZ
t
OH
t
OLZ
Dout
HIGH-Z
HIGH-Z
Data Valid
Notes :
1.
is HIGH for read cycle.
WE
2. Device is continuously selected
=VIL.
CE
3. Address must be valid prior to or coincident with
transition; otherwise tAA is the limiting parameter.
CE
4.
is LOW.
OE
±
5. tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.
6. At any given temperature and voltage condition, tCHZ is less than tCLZ, tOHZ is less than tOLZ.
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
WRITE CYCLE 1 (
Controlled)
(1,2,3,5)
WE
t
WC
Address
t
AW
CE
t
CW
t
WR
t
AS
t
WP
WE
t
WHZ
t
OW
High-Z
Dout
Din
(4)
(4)
t
DW
t
DH
Data Valid
WRITE CYCLE 2 (
Controlled)
(1,2,5)
CE
t
WC
Address
t
AW
CW
CE
t
AS
t
t
WR
WE
t
WP
t
WHZ
High-Z
Dout
t
DH
t
DW
Din
Data Valid
Notes :
1.
and
must be HIGH during all address transitions.
CE
WE
2. A write occurs during the overlap of a low
and a low
.
CE
WE
LOW, tWP must be greater than tWHZ+tDW to allow the drivers to
OE
3. During a
controlled with write cycle with
WE
turn off and data to be placed on the bus.
4. During this period, I/O pins are in the output state, and input singals must not be applied.
5. If the low transition occurs simultaneously with or after low transition, the outputs remain in a high
CE
impedance state.
WE
±
6. tOW and tWHZ are specified with CL = 5pF. Transition is measured 500mV from steady state.
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
PACKAGE OUTLINE DIMENSION
28 pin 300 mil SOJ Package Outline Dimension
28
15
1
14
A2
UNIT
INCH(REF)
MM(BASE)
SYMBOL
A
0.140 (MAX)
0.026 (MIN)
3.556 (MAX)
0.660 (MIN)
A1
± ±
0.100 0.005 2.540 0.127
A2
B
±
±
0.018 0.003 0.457 0.076
± ±
0.028 0.003 0.711 0.076
X
XX
B1
c
C
L
±
±
0.010 0.003 0.254 0.076
± ±
0.710 0.010 18.03 0.254
D
E
±
±
0.337 0.010 8.560 0.254
± ±
0.300 0.005 7.620 0.127
E1
e
±
±
0.050 0.003 1.270 0.076
± ±
0.087 0.010 2.210 0.254
L
Note:
±
±
S
Y
0.030 0.004 0.762 0.102
1. S/E/D DIM NOT INCLUDEING MOLD FLASH.
0.003 (MAX) 0.076 (MAX)
2. THE END FLASH IN PACKAGE LENGTHWISE IS
NOT MORE THAN 10 MILS EACH SIDE
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
6
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
28 pin 8x13.4mm STSOP Package Outline Dimension
HD
c
L
°
12 (2x)
°
12 (2x)
1
28
14
15
"A"
y
Seating Plane
D
°
12 (2X)
14
15
GAUGE PLANE
0
SEATING PLANE
°
12 (2X)
L
1
28
L1
"A" DATAIL VIEW
DIMENSIONS IN MILLIMETERS
DIMENSIONS IN INCHES
SYMBOLS
MIN
1.00
0.05
0.91
0.17
0.10
13.20
11.70
7.90
-
0.30
0.675
0.00
0o
NOM
1.10
-
MAX
1.20
0.15
1.05
0.27
0.20
13.60
11.90
8.10
-
MIN
NOM
0.043
-
MAX
A
A1
A2
b
c
HD
D
E
e
L
L1
Y
0.040
0.002
0.036
0.007
0.004
0.520
0.461
0.311
-
0.012
0.027
0.000
0o
0.047
0.006
0.041
0.011
0.008
0.535
0.469
0.319
-
1.00
0.22
0.15
13.40
11.80
8.00
0.55
0.50
-
0.039
0.009
0.006
0.528
0.465
0.315
0.0216
0.020
-
0.70
-
0.028
-
-
0.076
-
0.003
5o
5o
3o
3o
Θ
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
7
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
PACKAGE OUTLINE DIMENSION
28 pin 300 mil skinny PDIP Package Outline Dimension
UNIT
MIN
NOR.
MAX
SYMBOL
A
A1
A2
D
E
E1
L
-
-
-
0.210
-
0.135
1.400
0.015
0.125
1.385
0.130
1.390
0.310 BSC
0.288
0.130
0.350
7
0.283
0.115
0.330
0
0.293
0.150
0.370
15
eB
Θ°
：
Note
：
1. JEDEC OUTLINE N / A
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
8
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
ORDERING INFORMATION
COMMERCIAL TEMPERATURE
PART NO.
ACCESS TIME (ns)
PACKAGE
28PIN SOJ
28PIN SOJ
UT61L256CJC-10
UT61L256CJC-12
UT61L256CJC-15
UT61L256CLS-10
UT61L256CLS-12
UT61L256CLS-15
UT61L256CKC-10
UT61L256CKC-12
UT61L256CKC-15
10
12
15
10
12
15
10
12
15
28PIN SOJ
28PIN STSOP
28PIN STSOP
28PIN STSOP
28PIN Skinny PDIP
28PIN Skinny PDIP
28PIN Skinny PDIP
EXTENDED TEMPERATURE
PART NO.
ACCESS TIME (ns)
PACKAGE
28PIN SOJ
28PIN SOJ
UT61L256CJC-10E
UT61L256CJC-12E
UT61L256CJC-15E
UT61L256CLS-10E
UT61L256CLS-12E
UT61L256CLS-15E
UT61L256CKC-10E
UT61L256CKC-12E
UT61L256CKC-15E
10
12
15
10
12
15
10
12
15
28PIN SOJ
28PIN STSOP
28PIN STSOP
28PIN STSOP
28PIN Skinny PDIP
28PIN Skinny PDIP
28PIN Skinny PDIP
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
9
UTRON
UT61L256C
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
THIS PAGE IS LEFT BLANK INTENTIONALLY.
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80058
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
10
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