FDD86326 [FAIRCHILD]
N-Channel Shielded Gate PowerTrench MOSFET 80 V, 37 A, 23 m Ohm; N沟道屏蔽栅极PowerTrench MOSFET的? 80 V, 37 A, 23米欧姆型号: | FDD86326 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | N-Channel Shielded Gate PowerTrench MOSFET 80 V, 37 A, 23 m Ohm |
文件: | 总6页 (文件大小:171K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 2013
FDD86326
N-Channel Shielded Gate PowerTrench® MOSFETꢀ
80 V, 37 A, 23 mꢁ
Features
Shielded Gate MOSFET Technology
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for rDS(on), switching performance and ruggedness.
Max rDS(on) = 23 mꢁ at VGS = 10 V, ID = 8 A
Max rDS(on) = 37 mꢁ at VGS = 6 V, ID = 4.6 A
High performance trench technology for extremely low rDS(on)
High power and current handling capability in a widely used
surface mount package
Application
DC - DC Conversion
Very low Qg and Qgd compared to competing trench
technologies
Fast switching speed
100% UIL tested
RoHS Compliant
D
D
G
G
S
D-PAK
(TO-252)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
80
20
37
8
40
121
62
3.1
TC = 25 °C
TA = 25 °C
ID
(Note 1a)
(Note 3)
A
-Pulsed
EAS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
mJ
W
TC = 25 °C
TA = 25 °C
PD
(Note 1a)
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RꢂJC
RꢂJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.0
40
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
FDD86326
Package
D-PAK(TO-252)
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
FDD86326
1
©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 ꢃA, VGS = 0 V
80
V
ꢄBVDSS
ꢀꢀꢀꢄTJ
IDSS
IGSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 ꢃA, referenced to 25 °C
VDS = 64 V, VGS = 0 V
67
mV/°C
1
100
ꢃA
nA
VGS
=
20 V, VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 ꢃA
D = 250 ꢃA, referenced to 25 °C
GS = 10 V, ID = 8 A
VGS = 6 V, ID = 4.6 A
VGS = 10 V, ID = 8 A, TJ = 125 °C
VDS = 10 V, ID = 8 A
2
3.1
4
V
ꢀꢄVGS(th)
ꢀꢀꢀꢄTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
-8.5
mV/°C
V
19
26
33
21
23
37
44
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
mꢁ
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
780
180
15
1035
240
25
pF
pF
pF
ꢁ
VDS = 50 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.4
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
7.6
3.0
13.4
2.9
13.4
7.6
4.0
15
10
24
10
19
11
ns
ns
ns
VDD = 50 V, ID = 8 A,
VGS = 10 V, RGEN = 6 ꢁ
ns
Qg
Qg
Qgs
Qgd
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
nC
nC
nC
nC
VGS = 0 V to 5 V
VDD = 50 V,
ID = 8 A
3.7
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 8 A
(Note 2)
(Note 2)
0.8
0.7
43
1.3
1.2
68
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 2.6 A
trr
Reverse Recovery Time
ns
IF = 8 A, di/dt = 100 A/ꢃs
Qrr
Reverse Recovery Charge
43
68
nC
Notes:
1. R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
ꢂJA
ꢂJCꢀ
is guaranteed by design while R
is determined by the user’s board design.
ꢂJA
a. 40 °C/W when mounted on a
1 in pad of 2 oz copper.
b. 96 °C/W when mounted on a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 300 ꢃs, Duty cycle < 2.0%.
3. Starting T = 25°C, L = 3 mH, I = 9 A, V = 80 V, V = 10 V.
J
AS
DD
GS
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2
©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
Typical Characteristics TJ = 25 °C unless otherwise noted
40
6
5
4
3
2
1
0
VGS = 4.5 V
PULSE DURATION = 80 ꢃs
VGS = 10 V
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 ꢃs
30
20
10
0
DUTY CYCLE = 0.5% MAX
VGS = 5 V
VGS = 8 V
VGS = 6 V
VGS = 5 V
VGS = 6 V
VGS = 4.5 V
VGS = 10 V
30
VGS = 8 V
0
1
2
3
4
5
0
10
20
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
2.0
80
ID = 8 A
VGS = 10 V
PULSE DURATION = 80 ꢃs
ID = 8 A
DUTY CYCLE = 0.5% MAX
1.8
1.6
1.4
1.2
1.0
0.8
0.6
70
60
50
40
30
20
10
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
40
50
PULSE DURATION = 80 ꢃs
VGS = 0 V
DUTY CYCLE = 0.5% MAX
10
1
30
20
10
0
VDS = 5 V
TJ = 150 o
C
TJ = 25 oC
TJ = 150 o
C
0.1
0.01
0.001
TJ = 25 o
C
TJ = -55 o
C
TJ = -55 o
C
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
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3
©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
Typical Characteristics TJ = 25 °C unless otherwise noted
10
1000
100
10
ID = 8 A
VDD = 25 V
Ciss
8
VDD = 50 V
6
Coss
VDD = 75 V
4
2
0
f = 1 MHz
= 0 V
Crss
V
GS
0
3
6
9
12
15
0.1
1
10
80
150
10
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
9
8
7
6
40
30
20
10
0
5
TJ = 25 oC
4
VGS = 10 V
3
TJ = 100 o
C
TJ = 125 o
C
2
VGS = 4.5 V
R
ꢂJC = 2 oC/W
1
0.01
0.1
1
10
30
25
50
75
100
125
tAV, TIME IN AVALANCHE (ms)
Tc, CASE TEMPERATURE (oC)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
10000
100
10
1
VGS = 10 V
SINGLE PULSE
ꢂJC = 2 oC/W
TC = 25 oC
R
100 us
1 ms
1000
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
R
ꢂJC = 2 oC/W
10 ms
100 ms
DC
T
C = 25 oC
100
50
0.1
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
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4
©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.1
0.01
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
x Z
x R
+ T
SINGLE PULSE
J
DM
ꢂJC
ꢂJC C
R
ꢂJC = 2 oC/W
0.01
10-5
10-4
10-3
10-2
10-1
1
Figure 13. Junction-to-Case Transient Thermal Response Curve
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©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
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Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
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First Production
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Full Production
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Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I64
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©2010 Fairchild Semiconductor Corporation
FDD86326 Rev.C2
6
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