FDMA1430JP [FAIRCHILD]

Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A; 最大RDS(ON) = 90英里©在VGS = -4.5 V, ID = -2.9一
FDMA1430JP
型号: FDMA1430JP
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A
最大RDS(ON) = 90英里©在VGS = -4.5 V, ID = -2.9一

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March 2013  
FDMA1430JP  
Integrated P-Channel PowerTrench® MOSFET and BJT  
-30 V, -2.9 A, 90 mΩ  
Features  
General Description  
This device is designed specifically as a single package solution  
for loadswitching in cellular handset and other ultra-portable  
applications. It features a 50 V NPN BJT and a 30 V P-ch Trench  
MOSFET in the space saving MicroFET 2x2 package that offers  
exceptional thermal performance for it's physical size and is well  
suited to linear mode applications.  
„ Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A  
„ Max rDS(on) = 130 mΩ at VGS = -2.5 V, ID = -2.6 A  
„ Max rDS(on) = 170 mΩ at VGS = -1.8 V, ID = -1.7 A  
„ Max rDS(on) = 240 mΩ at VGS = -1.5 V, ID = -1 A  
„ Low profile - 0.8 mm maximum - in the new package  
MicroFET 2x2  
Application  
„ HBM ESD protection level > 2 kV typical (Note 3)  
„ RoHS Compliant  
„ Loadswitching  
E
B
D
PIN 1  
C
G
S
E
B
C
D
D
C
G
S
Top  
Bottom  
MicroFET 2x2  
Maximum Ratings TA = 25 °C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
-30  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
V
V
±8  
Drain Current  
-Continuous  
-Pulsed  
TA = 25°C  
(Note 1a)  
-2.9  
-12  
ID  
A
VCBO  
VCEO  
VEBO  
IC  
Collector-Base Voltage  
Collector-Emitter Voltage  
Emitter-Base Voltage  
Collector Current  
(Note 4)  
(Note 5)  
50  
V
V
50  
10  
V
100  
mA  
mW  
°C  
PC  
Collector Power Dissipation  
Junction Temperature  
Power Dissipation  
200  
TJ  
150  
TA = 25°C  
TA = 25°C  
(Note 1a)  
(Note 1b)  
1.5  
PD  
W
0.7  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJA  
RθJA  
Thermal Resistance, Junction to Ambient(MOSFET)  
Thermal Resistance, Junction to Ambient(MOSFET)  
(Note 1a)  
(Note 1b)  
86  
°C/W  
173  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
7’’  
Tape Width  
8 mm  
Quantity  
143  
FDMA1430JP  
MicroFET 2x2  
5000 units  
www.fairchildsemi.com  
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
1
Electrical Characteristics TJ = 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = -250 μA, VGS = 0 V  
-30  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = -250 μA, referenced to 25 °C  
-23  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
VDS = -24 V, VGS = 0 V  
VGS = ±8 V, VDS = 0 V  
-1  
μA  
μA  
±1  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = -250 μA  
-0.4  
-0.6  
2.4  
-1  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
D = -250 μA, referenced to 25 °C  
GS = -4.5 V, ID = -2.9 A  
mV/°C  
V
67  
81  
90  
VGS = -2.5 V, ID = -2.6 A  
VGS = -1.8 V, ID = -1.7 A  
VGS = -1.5 V, ID = -1 A  
130  
170  
240  
98  
rDS(on)  
Static Drain to Source On Resistance  
Forward Transconductance  
mΩ  
114  
VGS = -4.5 V, ID = -2.9 A,  
TJ = 125 °C  
102  
11  
133  
gFS  
VDS = -5 V, ID = -2.9 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Input Capacitance  
438  
47  
580  
70  
pF  
pF  
pF  
VDS = -15 V, VGS = 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
41  
60  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
4.8  
4.4  
67  
10  
10  
ns  
ns  
V
V
DD = -15 V, ID = -1 A,  
GS = -4.5 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
107  
33  
ns  
21  
ns  
Qg  
Total Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
7.2  
0.7  
1.6  
10  
nC  
nC  
nC  
VDD = -15 V, ID = -2.9 A,  
GS = -4.5 V  
Qgs  
Qgd  
V
Drain-Source Diode Characteristics  
VSD  
trr  
Source to Drain Diode Forward Voltage  
Reverse Recovery Time  
VGS = 0 V, IS = -1.1 A  
(Note 2)  
-0.7  
16  
5
-1.2  
29  
V
ns  
nC  
IF = -2.9 A, di/dt = 100 A/μs  
Qrr  
Reverse Recovery Charge  
10  
BJT Characteristics  
ICBO  
hFE  
Collector Cut-off Current  
VCB = 40 V, IE = 0 A  
VCE = 5 V, IC = 5 mA  
IC = 10 mA, IB = 0.5 mA  
VCE = 10 V, IC = 5 mA  
0.1  
0.3  
μA  
DC Current Gain  
68  
VCE(sat)  
fT  
Collector-Emitter Saturation Voltage  
Current Gain Bandwidth Product  
Output Capacitance  
Input Off Voltage  
V
MHz  
pF  
V
250  
3.7  
Cob  
VCB = 10 V, IE = 0 A, f = 1 MHz  
VCE = 5 V, IC = 100 μA  
VI(off)  
VI(on)  
R1  
0.5  
Input On Voltage  
VCE = 0.2 V, IC = 5 mA  
1.3  
V
Input Resistor  
4.7  
0.1  
kΩ  
R1/R2  
Resistor Ratio  
www.fairchildsemi.com  
2
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
Electrical Characteristics  
Notes:  
2
1. R  
is determined with the device mounted on a 1 in oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R is determined by the  
θJA  
θJA  
θJC  
user's board design.  
a. 86 °C/W when mounted on  
a 1 in pad of 2 oz copper  
b. 173 °C/W when mounted on  
a minimum pad of 2 oz copper  
2
2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0%  
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.  
4. Guaranteed by Icbo  
5. Guaranteed by Iceo  
.
www.fairchildsemi.com  
3
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
Typical Characteristics TJ = 25 °C unless otherwise noted  
12  
3
2
1
0
VGS = -4.5 V  
VGS = -2.5 V  
VGS = -3.5 V  
VGS = -1.5 V  
8
VGS = -1.8 V  
VGS = -1.8 V  
VGS = -2.5 V  
VGS = -1.5 V  
4
VGS = -4.5 V  
VGS = -3.5 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0
4
8
12  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
-ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs Drain Current and Gate Voltage  
1.8  
400  
300  
200  
100  
0
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
ID = -2.9 A  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
VGS = -4.5 V  
ID = -2.9 A  
TJ = 125 o  
C
TJ = 25 o  
C
-75 -50 -25  
0
25 50 75 100 125 150  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
TJ, JUNCTION TEMPERATURE (oC)  
-VGS, GATE TO SOURCE VOLTAGE (V)  
F i gu re 3 . N orma li zed On - Res is ta nc e  
vs Junction Temperature  
Figure4. On-Resistance vs Gate to  
Source Voltage  
12  
10  
PULSE DURATION = 80 μs  
VGS = 0 V  
DUTY CYCLE = 0.5% MAX  
1
0.1  
VDS = -5 V  
TJ = 150 o  
C
8
TJ = 25 oC  
TJ = 150 o  
C
0.01  
4
TJ = 25 o  
C
TJ = -55 o  
C
0.001  
0.0001  
TJ = -55 o  
C
0
0.5  
1.0  
1.5  
2.0  
2.5  
0.0  
0.4  
0.8  
1.2  
-VGS, GATE TO SOURCE VOLTAGE (V)  
-VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs Source Current  
www.fairchildsemi.com  
4
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
Typical Characteristics TJ = 25 °C unless otherwise noted  
1000  
100  
10  
4.5  
ID = -2.9 A  
Ciss  
VDD = -10 V  
3.0  
Coss  
VDD = -15 V  
Crss  
VDD = -20 V  
1.5  
f = 1 MHz  
= 0 V  
V
GS  
0.0  
0
2
4
6
8
0.1  
1
10  
30  
-VDS, DRAIN TO SOURCE VOLTAGE (V)  
Q , GATE CHARGE (nC)  
g
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s D r a i n  
to Source Voltage  
10-1  
50  
10  
10-2  
10-3  
10-4  
10-5  
10-6  
10-7  
10-8  
10-9  
10-10  
VDS = 0 V  
100 μs  
1
0.1  
1 ms  
TJ = 125 oC  
THIS AREA IS  
10 ms  
100 ms  
1 s  
LIMITED BY r  
DS(on)  
SINGLE PULSE  
TJ = MAX RATED  
10 s  
DC  
0.01  
0.001  
R
θJA = 173 oC/W  
A = 25 oC  
CURVE BENT TO  
MEASURED DATA  
TJ = 25 o  
C
T
0.1  
1
10  
100  
0
3
6
9
12  
15  
-VGS, GATE TO SOURCE VOLTAGE (V)  
-VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure9. GateLeakagevsGate  
to Source Voltage  
Figure 10. Forward Bias Safe  
Operating Area  
1000  
SINGLE PULSE  
RθJA = 173 oC/W  
100  
10  
1
T
A = 25 o  
C
0.1  
10-4  
10-3  
10-2  
10-1  
t, PULSE WIDTH (sec)  
1
10  
100  
1000  
Figure 11. Single Pulse Maximum Power Dissipation  
www.fairchildsemi.com  
5
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
Typical Characteristics TJ = 25 °C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.1  
P
DM  
0.05  
0.02  
0.01  
t
1
t
2
0.01  
NOTES:  
DUTY FACTOR: D = t /t  
SINGLE PULSE  
RθJA = 173 oC/W  
1
2
PEAK T = P  
J
x Z  
x R  
+ T  
DM  
θJA  
θJA A  
0.001  
10-4  
10-3  
10-2  
10-1  
t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 12. Junction-to-Ambient Transient Thermal Response Curve  
www.fairchildsemi.com  
6
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
Dimensional Outline and Pad Layout  
www.fairchildsemi.com  
7
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
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GTO™  
IntelliMAX™  
ISOPLANAR™  
Sync-Lock™  
®*  
®
tm  
®
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®
PowerTrench  
PowerXS™  
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Datasheet contains the design specifications for product development. Specifications  
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Rev. I64  
©2013 Fairchild Semiconductor Corporation  
FDMA1430JP Rev.C1  
8
www.fairchildsemi.com  

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