FDN359BN [FAIRCHILD]

N-Channel Logic Level PowerTrench TM MOSFET; N沟道逻辑电平的PowerTrench MOSFET TM
FDN359BN
型号: FDN359BN
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

N-Channel Logic Level PowerTrench TM MOSFET
N沟道逻辑电平的PowerTrench MOSFET TM

晶体 小信号场效应晶体管 开关 光电二极管 PC
文件: 总6页 (文件大小:96K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
January 2006  
FDN359BN  
N-Channel Logic Level PowerTrenchTM MOSFET  
Features  
2.7 A, 30 V.  
General Description  
RDS(ON)= 0.046 @ VGS = 10 V  
DS(ON)= 0.060 @ VGS = 4.5 V  
This N-Channel Logic Level MOSFET is produced  
R
using  
Fairchild’s  
Semiconductor’s  
advanced  
PowerTrench process that has been especially tailored  
to minimize on-state resistance and yet maintain  
superior switching performance.  
Very fast switching speed.  
Low gate charge (5nC typical)  
These devices are well suited for low voltage and  
battery powered applications where low in-line power  
loss and fast switching are required.  
High performance version of industry standard  
SOT-23 package. Identical pin out to SOT-23 with 30%  
higher power handling capability.  
D
D
S
S
G
SuperSOTTM-3  
G
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
VDSS  
Drain-Source Voltage  
30  
V
VGSS  
ID  
Gate-Source Voltage  
V
A
±20  
2.7  
Maximum Drain Current – Continuous  
– Pulsed  
(Note 1a)  
15  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
0.5  
PD  
W
0.46  
TJ, TSTG  
Operating and Storage Temperature Range  
55 to +150  
°C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
250  
75  
RθJA  
°C/W  
°C/W  
RθJC  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
359B  
FDN359BN  
7’’  
8mm  
3000 units  
FDN359BN Rev A(W)  
©2006 Fairchild Semiconductor Corporation  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
30  
V
VGS = 0 V,  
ID = 250 µA,Referenced to 25°C  
VDS = 24 V, VGS = 0 V  
TJ = -55OC  
VGS = ±20 V, VDS = 0 V  
ID = 250 µA  
BVDSS  
TJ  
IDSS  
Breakdown Voltage Temperature  
Coefficient  
Zero Gate Voltage Drain Current  
21  
mV/°C  
1
µA  
µA  
nA  
10  
IGSS  
Gate–Body Leakage  
±100  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
1
1.8  
–4  
3
V
mV/°C  
V
DS = VGS  
,
ID = 250 µA  
VGS(th)  
TJ  
RDS(on)  
Gate Threshold Voltage  
Temperature Coefficient  
ID = 250 µA,Referenced to 25°C  
Static Drain–Source  
On–Resistance  
0.026 0.046  
0.032 0.060  
0.033 0.075  
VGS = 10 V,  
VGS = 4.5 V,  
VGS = 10 V, ID = 2.7 A, TJ = 125°C  
ID = 2.7 A  
ID = 2.4 A  
ID(on)  
gFS  
On–State Drain Current  
VGS = 10 V,  
VDS = 5 V  
15  
A
S
Forward Transconductance  
VDS = 5V,  
ID = 2.7 A  
11  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
RG  
Input Capacitance  
485  
105  
65  
650  
140  
100  
pF  
pF  
pF  
V
DS = 15 V,  
V GS = 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
f = 1.0 MHz  
f = 1.0 MHz  
1.8  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
7
5
14  
10  
35  
4
ns  
ns  
VDD = 15V,  
VGS = 10 V,  
ID = 1 A,  
RGEN = 6 Ω  
20  
2
ns  
ns  
Qg  
Qgs  
Qgd  
5
7
nC  
nC  
nC  
VDS = 15 V,  
VGS = 5 V  
ID = 2.7 A,  
1.3  
1.8  
FDN359BN Rev A(W)  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
0.42  
1.2  
A
V
VSD  
Drain–Source Diode Forward  
Voltage  
VGS = 0 V, IS = 0.42 A (Note 2)  
0.7  
IF = 2.7A, diF/dt = 100 A/µs  
trr  
12  
3
20  
5
ns  
Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
Qrr  
nC  
otes:  
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.  
b) 270°C/W when mounted on a  
minimum pad.  
a) 250°C/W when mounted on a  
2
0.02 in pad of 2 oz. copper.  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%  
FDN359BN Rev A(W)  
Typical Characteristics  
2.6  
2.2  
1.8  
1.4  
1
15  
3.5V  
VGS = 10V  
4.5V  
VGS = 3.0V  
12  
9
4.0V  
3.0V  
3.5V  
6
4.0V  
4.5V  
5.0V  
6.0  
10.0V  
3
2.5V  
0.6  
0
0
3
6
9
12  
15  
0
0.5  
1
1.5  
2
2.5  
VDS, DRAIN-SOURCE VOLTAGE (V)  
ID, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.08  
0.06  
0.04  
0.02  
1.2  
1.1  
1
ID = 2.7A  
GS = 10V  
ID = 1.35A  
V
TA = 125oC  
0.9  
0.8  
TA = 25oC  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
V
GS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
100  
15  
12  
9
VGS = 0V  
VDS = 5V  
10  
1
0.1  
0.01  
TA = 125oC  
6
TA = 125oC  
-55oC  
25oC  
3
-55oC  
0.8  
0.001  
0.0001  
25oC  
0
0
0.2  
0.4  
0.6  
1
1.2  
1.4  
1
1.5  
2
2.5  
3
3.5  
4
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDN359BN Rev A(W)  
Typical Characteristics  
10  
800  
600  
400  
200  
0
f = 1MHz  
VGS = 0 V  
ID = 2.7A  
8
VDS = 10V  
Ciss  
20V  
6
15V  
4
2
0
Coss  
Crss  
0
2
4
6
8
10  
0
5
10  
15  
20  
25  
30  
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
30  
25  
20  
15  
10  
5
100  
10  
SINGLE PULSE  
RθJA = 270°C/W  
100µs  
T
A = 25°C  
RDS(ON) LIMIT  
1ms  
10ms  
100ms  
1
1s  
DC  
VGS = 10V  
0.1  
0.01  
SINGLE PULSE  
RθJA = 270oC/W  
T
A = 25oC  
0
0.001  
0.01  
0.1  
1
10  
100  
1000  
0.01  
0.1  
1
10  
100  
VDS, DRAIN-SOURCE VOLTAGE (V)  
t1, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
RθJA(t) = r(t) * RθJA  
RθJA = 270 °C/W  
0.2  
0.1  
0.1  
0.05  
P(pk)  
0.02  
0.01  
t1  
t2  
0.01  
SINGLE  
TJ - TA = P * RθJA(t)  
Duty Cycle, D = t1 / t2  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDN359BN Rev A(W)  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
®
ACEx™  
PowerSaver™  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
TCM™  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
FAST  
®
PowerTrench  
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
CROSSVOLT™  
DOME™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
FACT™  
FASTr™  
FPS™  
FRFET™  
GlobalOptoisolator™  
GTO™  
®
QFET  
QS™  
®
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
μSerDes™  
ScalarPump™  
SILENT SWITCHER  
SMART START™  
SPM™  
Stealth™  
TinyLogic  
TINYOPTO™  
TruTranslation™  
UHC™  
HiSeC™  
I2C™  
MSXPro™  
OCX™  
®
UltraFET  
i-Lo™  
ImpliedDisconnect™  
IntelliMAX™  
UniFET™  
VCX™  
Wire™  
OCXPro™  
OPTOLOGIC  
®
®
OPTOPLANAR™  
PACMAN™  
POP™  
Power247™  
PowerEdge™  
FACT Quiet Series™  
Across the board. Around the world.™  
®
The Power Franchise  
SuperFET™  
SuperSOT™-3  
Programmable Active Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY  
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY  
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT  
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I18  

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