FDP100N10 [FAIRCHILD]
N-Channel PowerTrench㈢ MOSFET; N沟道MOSFET的PowerTrench
| 型号： | FDP100N10 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | N-Channel PowerTrench㈢ MOSFET |
| 文件： | 总8页 (文件大小：454K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 2007
FDP100N10
N-Channel PowerTrench MOSFET
100V, 75A, 10mΩ
tm
®
Features
Description
•
•
•
•
RDS(on) = 8.2mΩ ( Typ.)@ VGS = 10V, ID = 75A
This N-Channel MOSFET is producedusing Fairchild Semicon-
ductor’s advanced PowerTrench process that has been espe-
cially tailored to minimize the on-state resistance and yet
maintain superior switching performance.
Fast switching speed
Low gate charge
High performance trench technology for extremely low RDS(on)
•
•
High power and current handing capability
RoHS compliant
Applications
•
DC to DC converters / Synchronous Rectification
D
G
TO-220
G
S
D
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted*
Symbol
VDSS
VGSS
ID
Parameter
Ratings
100
Units
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current
±20
V
-Continuous (TC = 75oC)
- P uls ed
75
A
IDM
D rai n Cur rent
(Note 1)
(Note 2)
(Note 3)
300
A
EAS
dv/dt
Single Pulsed Avalanche Energy
Peak Diode Recovery dv/dt
365
mJ
V/ns
W
W/oC
oC
4.8
(TC = 25oC)
- Derate above 25oC
208
PD
Power Dissipation
1.4
TJ, TSTG
TL
Operating and Storage Temperature Range
-55 to +175
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
300
oC
*Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
Parameter
Thermal Resistance, Junction to Case
Ratings
0.72
Units
RθJC
RθCS
RθJA
Thermal Resistance, Case to Sink Typ.
Thermal Resistance, Junction to Ambient
0.5
oC/W
62.5
*When mounted on the minimum pad size recommended (PCB Mount)
©2007 Fairchild Semiconductor Corporation
FDP100N10 Rev. A1
1
www.fairchildsemi.com
Package Marking and Ordering Information TC = 25oC unless otherwise noted
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDP100N10
FDP100N10
TO-220
-
-
50
Electrical Characteristics
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250µA, VGS = 0V, TJ = 25oC
100
-
-
-
V
∆BVDSS
Breakdown Voltage Temperature
Coefficient
I
D = 250µA, Referenced to 25oC
-
-
0.1
V/oC
/
∆TJ
V
DS = 100V, VGS = 0V
-
-
-
1
IDSS
Zero Gate Voltage Drain Current
Gate to Body Leakage Current
µA
VDS = 100V, VGS = 0V, TJ = 150oC
-
-
500
±100
IGSS
VGS = ±20V, VDS = 0V
nA
On Characteristics
VGS(th)
RDS(on)
gFS
Gate Threshold Voltage
VGS = VDS, ID = 250µA
2.5
-
4.5
10
-
V
mΩ
S
Static Drain to Source On Resistance
Forward Transconductance
VGS = 10V, ID = 75A
-
-
8.2
110
VDS = 10V, ID = 37.5A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
-
-
-
-
-
-
5500
530
220
76
7300
710
325
100
-
pF
pF
pF
nC
nC
nC
VDS = 25V, VGS = 0V
f = 1MHz
Coss
Crss
Qg(tot)
Qgs
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
V
DS = 50V, ID = 75A
GS = 10V
30
Qgd
20
-
(Note 4, 5)
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
-
-
-
-
70
150
540
260
240
ns
ns
ns
ns
VDD = 50V, ID = 75A
GS = 10V, RGEN = 25Ω
265
125
115
V
(Note 4, 5)
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
-
-
-
-
-
-
-
75
300
1.25
-
A
A
ISM
VSD
trr
Drain to Source Diode Forward Voltage
Reverse Recovery Time
VGS = 0V, ISD = 75A
-
V
71
164
ns
nC
VGS = 0V, ISD = 75A
dIF/dt = 100A/µs
(Note 4)
Qrr
Reverse Recovery Charge
-
Notes:
1: Repetitive Rating: Pulse width limited by maximum junction temperature
o
2: L = 0.13mH, I = 75A, V = 25V, R = 25Ω, Starting T = 25 C
AS
DD
G
J
o
3:
I
≤ 75A, di/dt ≤ 200A/µs, V ≤ BV
, Starting T = 25 C
SD
DD
DSS J
4: Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5: Essentially Independent of Operating Temperature Typical Characteristics
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2
FDP100N10 Rev. A1
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1000
500
VGS = 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
100
10
1
100
150oC
-55oC
25oC
10
5
*Notes:
1. 250µs Pulse Test
2. TC = 25oC
*Notes:
1. VDS = 20V
2. 250µs Pulse Test
2
4
6
8
10
12
0.1
1
5
VGS,Gate-Source Voltage[V]
VDS,Drain-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Drain Current and Gate Voltage
1000
0.020
0.015
0.010
0.005
0.000
100
10
1
150oC
VGS = 10V
VGS = 20V
25oC
*Notes:
1. VGS = 0V
*Note: TJ = 25oC
2. 250µs Pulse Test
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
50
100 150 200 250 300 350
ID, Drain Current [A]
VSD, Body Diode Forward Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
8000
10
C
C
C
= C + C (C = shorted)
gs gd ds
iss
VDS = 80V
VDS = 50V
= C + C
ds gd
oss
rss
= C
gd
V
DS = 25V
8
6
4
2
0
6000
4000
2000
0
Ciss
*Note:
1. VGS = 0V
2. f = 1MHz
Coss
Crss
*Note: ID = 75A
60 75
0.1
1
10
30
0
15
30
45
90
VDS, Drain-Source Voltage [V]
Qg, Total Gate Charge [nC]
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3
FDP100N10 Rev. A1
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
1.2
1.1
1.0
2.5
2.0
1.5
1.0
0.9
*Notes:
1. VGS = 0V
*Notes:
1. VGS = 10V
0.5
2. ID = 250µA
2. ID = 75A
0.0
-100
0.8
-100
-50
0
50
100
150
200
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
500
20µs
75
50
25
0
100µs
100
1ms
10ms
DC
Operation in This Area
is Limited by R DS(on)
10
1
*Notes:
1. TC = 25oC
2. TJ = 175oC
3. Single Pulse
0.1
1
10
100 200
25
50
75
100
125
150
175
TC, Case Temperature [oC]
VDS, Drain-Source Voltage [V]
Figure 11. Transient Thermal Response Curve
1
0.1
0.5
0.2
0.1
0.05
PDM
0.02
0.01
t1
t2
0.01
*Notes:
Single pulse
1. ZθJC(t) = 0.72oC/W Max.
2. Duty Factor, D=t1/t2
3. TJM - TC = PDM * ZθJC(t)
1E-3
10-5
10-4
10-3
10-2
10-1
100
Rectangular Pulse Duration [sec]
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4
FDP100N10 Rev. A1
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
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5
FDP100N10 Rev. A1
Peak Diode Recovery dv/dt Test Circuit & Waveforms
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6
FDP100N10 Rev. A1
Mechanical Dimensions
TO-220
4.50 ±0.20
9.90 ±0.20
(8.70)
+0.10
–0.05
1.30
ø3.60 ±0.10
1.27 ±0.10
1.52 ±0.10
0.80 ±0.10
+0.10
–0.05
0.50
2.40 ±0.20
2.54TYP
2.54TYP
[2.54 ±0.20]
[2.54 ±0.20]
10.00 ±0.20
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7
FDP100N10 Rev. A1
tm
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THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body or (b) support
or sustain life, and (c) whose failure to perform when properly
used in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a significant
injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system,
or to affect its safety or effectiveness.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
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reserves the right to make changes at any time without notice to
improve design.
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Not In Production
This datasheet contains specifications on a product that has been dis-
continued by Fairchild Semiconductor.The datasheet is printed for refer-
ence information only.
Rev. I29
8
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FDP100N10 Rev. A1
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