FDW264P_NL [FAIRCHILD]
Small Signal Field-Effect Transistor, 9.7A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, TSSOP-8;
| 型号： | FDW264P_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Small Signal Field-Effect Transistor, 9.7A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, TSSOP-8 放大器 光电二极管 晶体管 |
| 文件： | 总5页 (文件大小：153K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 2003
FDW264P
P-Channel 2.5V Specified PowerTrench MOSFET
General Description
Features
This P-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 12V).
•
•
–9.7 A, –20 V. RDS(ON) = 10.0 mΩ @ VGS = –4.5 V
RDS(ON) = 14.5 mΩ @ VGS = –2.5 V
Extended VGSS range (±12V) for battery
applications
Applications
•
•
Low gate charge
•
•
•
•
Load switch
High performance trench technology for extremely
low RDS(ON)
Motor drive
DC/DC conversion
Power management
•
Low profile TSSOP-8 package
5
6
7
8
4
3
2
1
TSSOP-8
Pin 1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
–20
Units
VDSS
Drain-Source Voltage
V
V
A
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
± 12
–9.7
–50
(Note 1)
PD
Power Dissipation
(Note 1a)
(Note 1b)
1.3
0.6
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
96
208
RθJA
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
264P
FDW264P
13’’
16mm
3000 units
FDW264P Rev. C (W)
2003 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–20
V
VGS = 0 V, ID = –250 µA
∆BVDSS
Breakdown Voltage Temperature
–17
ID = –250 µA, Referenced to 25°C
VDS = –16 V, VGS = 0 V
mV/°C
Coefficient
∆TJ
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate–Body Leakage
–1
±100
µA
nA
VGS = ±12 V,
VDS = 0 V
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
–0.6
–50
–0.9
3
–1.5
V
VDS = VGS, ID = –250 µA
ID = –250 µA, Referenced to 25°C
∆VGS(th)
Gate Threshold Voltage
mV/°C
Temperature Coefficient
∆TJ
7.5
9.0
10.5
10
14.5
VGS = –4.5 V,
VGS = –2.5 V,
ID = –9.7 A
ID = –8.4 A
Static Drain–Source
On–Resistance
mΩ
RDS(on)
VGS = –4.5 V, ID = –9.7 A, TJ= 125°C
ID(on)
gFS
On–State Drain Current
Forward Transconductance
VGS = –4.5 V,
VDS = –10 V,
VDS = –5 V
ID = –9.7 A
A
S
71
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
7225
1030
900
10
pF
pF
pF
Ω
V
DS = –10 V,
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1.0 MHz
VGS = 15mV,
f = 1.0 MHz
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
17
17
480
265
95
31
31
770
422
135
ns
ns
ns
VDD = –10 V,
VGS = –4.5 V,
ID = –1 A,
RGEN = 6 Ω
ns
Qg
Qgs
Qgd
nC
nC
nC
VDS = –10 V,
VGS = –5 V
ID = –9.7 A,
13
24
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
–1.1
–1.2
A
V
VSD
VGS = 0 V, IS = –1.1 A (Note 2)
–0.6
Voltage
Reverse Recovery Time
Trr
ns
nC
170
220
IF = –9.7 A,
diF/dt = 100 A/µs
(Note 3)
Qrr
Reverse Recovery Charge
Notes:
1.
RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface
of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA is 96°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
b) RθJA is 208°C/W (steady state) when mounted on a minimum copper pad on FR-4.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDW264P Rev. C (W)
Typical Characteristics
1.6
1.4
1.2
1
50
VGS = -4.5V
-3.0V
-2.0V
VGS = - 2.0V
40
30
20
10
0
-2.5V
-2.5V
-3.0V
-3.5V
-4.0V
-4.5V
-1.5V
1.5
0.8
0
10
20
30
40
50
0
0.5
1
2
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
1.3
1.2
1.1
1
0.03
ID = -9.7A
GS = - 4.5V
ID = -4.85A
V
0.02
0.01
0
TA = 125oC
TA = 25oC
0.9
0.8
0
2
4
6
8
10
-50
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
50
40
30
20
10
0
100
VGS = 0V
VDS = -5V
10
TA = 125oC
1
25oC
0.1
TA = 125oC
-55oC
-55oC
0.01
0.001
25oC
0.0001
0.5
1
1.5
2
2.5
3
0
0.5
1
1.5
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDW264P Rev. C (W)
Typical Characteristics
10
11000
10000
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
f = 1 MHz
VGS = 0 V
ID = -9.7A
VDS = -5V
8
Ciss
-15V
6
-10V
4
2
0
Coss
Crss
0
5
10
15
20
0
40
80
120
160
200
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
50
RDS(ON) LIMIT
SINGLE PULSE
RθJA = 208°C/W
100 s
µ
40
30
20
10
0
T
A = 25°C
1ms
10ms
100ms
1s
10s
DC
10
1
VGS = -4.5V
SINGLE PULSE
RθJA = 208oC/W
0.1
0.01
T
A = 25oC
0.01
0.1
1
10
100
0.0001 0.001
0.01
0.1
1
10
100
1000
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
R
0.2
θJA = 208oC/W
0.1
0.1
0.05
0.02
0.01
t1
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDW264P Rev. C (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
POP™
SuperFET™
ISOPLANAR™
LittleFET™
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MicroFET™
MicroPak™
MICROWIRE™
MSX™
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FACT Quiet Series™
FAST
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ActiveArray™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
Power247™
PowerTrench
QFET
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
QS™
QT Optoelectronics™ TinyLogic
GlobalOptoisolator™
GTO™
Quiet Series™
RapidConfigure™
RapidConnect™
TINYOPTO™
TruTranslation™
UHC™
HiSeC™
I2C™
SILENT SWITCHER UltraFET
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OPTOLOGIC
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PACMAN™
Across the board. Around the world.™
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ProgrammableActive Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I7
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