FI1017M [FAIRCHILD]
Line Driver, 1 Func, 1 Driver, PDSO8, 0.150 INCH, MS-012, SOIC-8;型号: | FI1017M |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Line Driver, 1 Func, 1 Driver, PDSO8, 0.150 INCH, MS-012, SOIC-8 驱动 光电二极管 接口集成电路 驱动器 |
文件: | 总5页 (文件大小:98K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Preliminary
October 2000
Revised December 2000
FI1017
3.3V LVDS Single High Speed Differential Driver
(Preliminary)
General Description
Features
■ Greater than 600Mbs data rate
This single driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350 mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock or data.
■ 3.3V power supply operation
■ 0.5ns maximum differential pulse skew
■ 1.5ns maximum propagation delay
■ Low power dissipation
■ Power OFF protection
The FI1017 can be paired with its companion receiver, the
FI1018, or with any other Fairchild LVDS receiver.
■ Meets or exceeds the TIA/EIA-644 LVDS standard
■ Flow-through pinout simplifies PCB layout
■ 8-Lead SOIC and US8 packages save space
Ordering Code:
Order Number Package Number
Package Description
FI1017M
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
[TUBE]
FI1017MX
FI1017K8X
M08A
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
[TAPE and REEL]
MAB08A
8-Lead US8, 0.7mm x 3.1mm x 2.0mm
[TAPE and REEL]
Connection Diagrams
8-Lead SOIC
Pin Assignment for US-8 Package
Note: Ground pins 4 and 5 for optimum operation.
TOP VIEW
Pin Descriptions
Function Table
Pin Name
DI
Description
Input
DI
Outputs
LVTTL Data Input
Non-inverting Driver Output
Inverting Driver Output
Power Supply
DO+
DO−
H
DO+
L
L
H
L
DO−
H
OPEN
L
VCC
H
H = HIGH Logic Level
L = LOW Logic Level
X = Don’t Care
GND
Ground
© 2000 Fairchild Semiconductor Corporation
DS500500
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Preliminary
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +4.6V
−0.5V to +6V
−0.5V to +4.7V
Continuous
DC Input Voltage (DI)
Supply Voltage (VCC
Input Voltage (VIN
Operating Temperature (TA)
)
3.0V to 3.6V
0 to VCC
DC Output Voltage (DO)
Driver Short Circuit Current (IOSD
)
)
−40°C to +85°C
Storage Temperature Range (TSTG
Max Junction Temperature (TJ)
Lead Temperature (TL)
)
−65°C to +150°C
150°C
Note 1: The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
(Soldering, 10 seconds)
260°C
≥ 2000V
≥ 200V
ESD (Human Body Model)
ESD (Machine Model)
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Min
Typ
(Note 2)
350
Max
Symbol
VOD
Parameter
Test Conditions
Units
mV
mV
V
Output Differential Voltage
VOD Magnitude Change from
Differential LOW-to-HIGH
Offset Voltage
250
450
25
∆VOD
R
L = 100 Ω, See Figure 1
VOS
1.125
1.25
1.375
25
∆VOS
Offset Magnitude Change from
Differential LOW-to-HIGH
Power Off Output Current
Short Circuit Output Current
mV
µA
IOFF
IOS
V
V
V
CC = 0V, VOUT = 0V or 3.6V
±20
−8
OUT = 0V
mA
OD = 0V
±6
VIH
VIL
Input HIGH Voltage
Input LOW Voltage
Input Current
2.0
VCC
0.8
±20
±20
V
V
GND
IIN
V
IN = 0V or VCC
µA
µA
V
II(OFF)
VIK
ICC
Power-off Input Current
Input Clamp Voltage
Power Supply Current
VCC = 0V, VIN = 0V or 3.6V
I
IK = −18 mA
No Load, VIN = 0V or VCC
L = 100 Ω, VIN = 0V or VCC
−1.5
7
mA
mA
pF
pF
R
9.5
CIN
Input Capacitance
Output Capacitance
3
4
COUT
Note 2: All typical values are at TA = 25°C and with VCC = 3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Min
Typ
Max
Symbol
tPLHD
Parameter
Test Conditions
Units
ns
(Note 3)
Differential Propagation Delay
LOW-to-HIGH
0.5
0.5
1.5
1.5
tPHLD
Differential Propagation Delay
HIGH-to-LOW
ns
R
L = 100 Ω, CL = 10pF,
tTLHD
tTHLD
tSK(P)
tSK(PP)
Differential Output Rise Time (20% to 80%) See Figure 2 and Figure 3
Differential Output Fall Time (80% to 20%)
0.4
0.4
1.0
1.0
0.5
1.0
ns
ns
ns
ns
Pulse Skew |tPLH - tPHL
|
Part-to-Part Skew (Note 4)
Note 3: All typical values are at TA = 25°C and with VCC = 3.3V.
Note 4: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
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2
Preliminary
Note A: All input pulses have frequency = 10 MHz, tR or tF = 1 ns
Note B: CL includes all probe and jig capacitances
FIGURE 1. Differential Driver DC Test Circuit
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
FIGURE 3. AC Waveforms
3
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Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M08A
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4
Preliminary
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead US8, 0.7mm x 3.1mm x 2.0mm
Package Number MAB08A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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5
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