FSGL035R3 [FAIRCHILD]
Power Field-Effect Transistor, 12A I(D), 60V, 0.062ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3;
| 型号： | FSGL035R3 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 12A I(D), 60V, 0.062ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FSGL035R
Data Sheet
July 2001
File Number 5013
Radiation Hardened, SEGR Resistant
N-Channel Power MOSFETs
Features
• 12A*, 60V, r
• UIS Rated
• Total Dose
= 0.062Ω
DS(ON)
itle
bjec
tho
Fairchild Star*Power™ Rad Hard
MOSFETs have been specifically
TM
developed for high performance
applications in a commercial or
- Meets Pre-RAD Specifications to 100K RAD (Si)
military space environment.
Star*Power MOSFETs offer the system designer both
• Single Event
- Safe Operating Area Curve for Single Event Effects
extremely low r
and Gate Charge allowing the
DS(ON)
2
- SEE Immunity for LET of 82MeV/mg/cm with
yw
s ()
eato
development of low loss Power Subsystems. Star*Power
Gold FETs combine this electrical capability with total dose
radiation hardness up to 100K RADs while maintaining the
guaranteed performance for Single Event Effects (SEE)
which the Fairchild FS families have always featured.
V
up to 80% of Rated Breakdown
DS
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BV
DSS
- Typically Survives 2E12 if Current Limited to I
AS
OCI
O
mar
• Photo Current
The Fairchild family of Star*Power FETs includes a series of
devices in various voltage, current and package styles. The
portfolio consists of Star*Power and Star*Power Gold
products. Star*Power FETs are optimized for total dose and
- 1.2nA Per-RAD (Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications
for 3E13 Neutrons/cm
r
while exhibiting SEE capability at full rated voltage
2
DS(ON)
up to an LET of 37. Star*Power Gold FETs have been
optimized for SEE and Gate Charge combining SEE
performance to 80% of the rated voltage for an LET of 82
with extremely low gate charge characteristics.
2
- Usable to 3E14 Neutrons/cm
ge
de
eO
Symbol
D
nes
OC
EW
mar
This MOSFET is an enhancement-mode silicon-gate power
field effect transistor of the vertical DMOS (VDMOS)
structure. It is specifically designed and processed to be
radiation tolerant. The MOSFET is well suited for
applications exposed to radiation environments such as
switching regulation, switching converters, power
distribution, motor drives and relay drivers as well as other
power control and conditioning applications. As with
conventional MOSFETs these Radiation Hardened
MOSFETs offer ease of voltage control, fast switching
speeds and ability to parallel switching devices.
G
S
Packaging
TO-205AF
Reliability screening is available as either TXV or Space
equivalent of MIL-PRF-19500.
*Current is limited by the package capability
Formerly available as type TA45224W.
G
D
S
Ordering Information
RAD LEVEL SCREENING LEVEL PART NUMBER/BRAND
10K
Engineering samples FSGL035D1
100K
100K
TXV
FSGL035R3
FSGL035R4
Space
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-1
FSGL035R
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified
C
FSGL035R
UNITS
Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
60
60
V
V
DS
Drain to Gate Voltage (R
= 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
GS
Continuous Drain Current
o
T
T
= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
12 (Note)
10
A
A
A
V
C
D
o
= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
C
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
48
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
±30
GS
Maximum Power Dissipation
o
T
T
= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
25
10
W
W
C
T
o
= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
C
T
o
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.2
W/ C
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . .I
48
A
A
A
AS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
12
S
Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
48
SM
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T
-55 to 150
300
C
J
STG
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
(Distance >0.063in (1.6mm) from Case, 10s Max)
C
L
Weight (Typical)
1.0 (Typical)
g
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
*Current is limited by the package capability
o
Electrical Specifications
T
= 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
BV
TEST CONDITIONS
= 1mA, V = 0V
MIN
TYP
MAX
-
UNITS
V
Drain to Source Breakdown Voltage
Gate Threshold Voltage
I
60
-
DSS
GS(TH)
D
GS
o
V
V
I
= V
DS
,
T
T
T
T
T
T
T
= -55 C
-
-
5.5
4.5
-
V
GS
= 1mA
C
C
C
C
C
C
C
o
D
= 25 C
2.0
-
V
o
= 125 C
1.0
-
-
V
o
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
V
V
= 48V,
DS
= 25 C
-
25
250
100
200
0.756
0.062
0.093
20
65
30
15
28
12
7
µA
µA
nA
nA
V
DSS
= 0V
o
GS
= 125 C
-
-
o
I
V
= ±30V
= 25 C
-
-
GSS
GS
o
= 125 C
-
-
Drain to Source On-State Voltage
Drain to Source On Resistance
V
V
= 12V, I = 12A
-
-
DS(ON)
GS
D
o
r
I
V
= 10A,
T
T
= 25 C
-
0.055
Ω
DS(ON)12
D
C
= 12V
o
GS
= 125 C
-
-
-
Ω
C
Turn-On Delay Time
Rise Time
t
V
R
R
= 30V, I = 12A,
-
ns
ns
ns
ns
nC
nC
nC
nC
nC
V
d(ON)
DD
D
= 2.5Ω, V
= 12V,
L
GS
t
-
-
r
= 7.5Ω
GS
Turn-Off Delay Time
Fall Time
t
-
-
d(OFF)
t
-
-
f
Total Gate Charge
Gate Charge Source
Gate Charge Drain
Gate Charge at 20V
Threshold Gate Charge
Plateau Voltage
Q
V
= 0V to 12V
30V < V
< 48V,
-
24
10
5
g(12)
GS
DD
= 12A
I
D
Q
-
gs
gd
Q
-
Q
V
V
= 0V to 20V
= 0V to 2V
-
56
3
-
g(20)
g(TH)
GS
GS
Q
-
-
V
I
= 12A, V
= 15V
-
6
-
(PLATEAU)
D
DS
= 25V, V = 0V,
GS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
V
-
1550
540
13
-
-
pF
pF
pF
ISS
DS
f = 1MHz
C
C
-
-
OSS
RSS
-
-
o
Thermal Resistance Junction to Case
R
-
5.0
C/W
JC
θ
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-2
FSGL035R
Source to Drain Diode Specifications
PARAMETER
Forward Voltage
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
1.5
100
-
UNITS
V
V
I
I
= 12A
-
-
-
-
-
SD
SD
Reverse Recovery Time
Reverse Recovery Charge
t
= 12A, dI /dt = 100A/µs
ns
rr
SD
SD
Q
0.25
µC
RR
o
Electrical Specifications up to 100K RAD T = 25 C, Unless Otherwise Specified
C
PARAMETER
Drain to Source Breakdown Volts
Gate to Source Threshold Volts
Gate to Body Leakage
SYMBOL
TEST CONDITIONS
= 0, I = 1mA
MIN
MAX
-
UNITS
(Note 3)
BV
V
V
V
V
V
V
60
V
V
DSS
GS
GS
GS
GS
GS
GS
D
(Note 3)
V
= V , I = 1mA
DS
2.0
4.5
GS(TH)
D
(Notes 2, 3)
(Note 3)
I
I
= ±30V, V
= 0V
= 48V
-
-
-
-
100
25
nA
µA
V
GSS
DS
Zero Gate Leakage
= 0, V
DSS
DS
= 12V, I = 12A
Drain to Source On-State Volts
Drain to Source On Resistance
NOTES:
(Notes 1, 3)
(Notes 1, 3)
V
0.756
0.062
DS(ON)
D
r
= 12V, I = 10A
Ω
DS(ON)12
D
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both V
GS
= 12V, V
DS
= 0V and V
= 0V, V
= 80% BV .
DSS
GS
DS
Single Event Effects (SEB, SEGR) Note 4
ENVIRONMENT (NOTE 5)
(Note 6)
(Note 7)
MAXIMUM
APPLIED
TYPICAL LET
(MeV/mg/cm)
TYPICAL RANGE
V
BIAS
V
BIAS
GS
(V)
DS
(V)
TEST
SYMBOL
(µ)
Single Event Effects Safe Operating Area
SEESOA
37
60
60
82
82
36
32
32
28
28
-5
-2
-4
0
60
60
30
48
30
-2
NOTES:
4. Testing conducted at Brookhaven National Labs or Texas A&M.
2
o
5. Fluence = 1E5 ions/cm (typical), T = 25 C.
6. Ion Species: LET = 37, Br or Kr; LET = 60, I or Xe; LET = 82, Au
7. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
Performance Curves Unless Otherwise Specified
2
µ
µ
µ
LET = 37MeV/mg/cm , RANGE = 36
2
LET = 60MeV/mg/cm , RANGE = 32
70
60
50
40
30
20
10
0
2
LET = 82MeV/mg/cm , RANGE = 28
70
60
50
40
30
20
10
0
2
LET = 37
FLUENCE = 1E5 IONS/cm (TYPICAL)
LET = 82
LET = 60
0
5
10
15
20
25
30
35
40
-1
-3
-5
0
-2
-4
-6
NEGATIVE V
BIAS (V)
GS
V
(V)
GS
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
FIGURE 2. TYPICAL SEE SIGNATURE CURVE
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-3
FSGL035R
Performance Curves Unless Otherwise Specified (Continued)
1E-3
14
12
10
8
1E-4
ILM = 10A
30A
1E-5
100A
6
300A
1E-6
4
2
1E-7
0
10
30
100
300
1000
-50
0
50
100
o
150
DRAIN SUPPLY (V)
T
, CASE TEMPERATURE ( C)
C
FIGURE 3. TYPICAL DRAIN INDUCTANCE REQUIRED TO
FIGURE 4. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
LIMIT GAMMA DOT CURRENT TO I
AS
100
10
1
o
T
= 25 C
C
12V
100µs
Q
G
1ms
Q
Q
GD
GS
OPERATION IN THIS
AREA MAY BE
V
G
LIMITED BY r
DS(ON)
10ms
1
10
100
200
CHARGE
FIGURE 6. BASIC GATE CHARGE WAVEFORM
V
, DRAIN-TO-SOURCE VOLTAGE (V)
DS
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
2.5
100
PULSE DURATION = 250ms, V
= 12V, I = 10A
D
GS
V
V
V
V
= 14V
= 12V
= 10V
= 8V
GS
GS
GS
G S
2.0
1.5
1.0
0.5
0
80
60
40
20
0
V
= 6V
GS
-80
-40
0
40
80
120
160
0
2
4
6
8
10
o
T
, JUNCTION TEMPERATURE ( C)
J
V
, D RA IN -TO -SOU R CE VO LTA GE (V)
DS
FIGURE 7. TYPICAL NORMALIZED r
TEMPERATURE
vs JUNCTION
FIGURE 8. TYPICAL OUTPUT CHARACTERISTICS
DS(ON)
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-4
FSGL035R
Performance Curves Unless Otherwise Specified (Continued)
10
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
SINGLE PULSE
0.01
NOTES:
DUTY FACTOR: D = t /t
t
1
2
1
t
PEAK T = P
DM
x Z
+ T
2
J
θJC
C
0.001
-5
-4
-3
10
-2
10
-1
0
1
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
FIGURE 9. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
100
o
STARTING T = 25
C
J
o
STARTING T = 150
J
C
10
IF R = 0
t
= (L) (I ) / (1.3 RATED BV
- V
DD
)
AV
IF R
AS
DSS
≠
0
t
= (L/R) ln [(I *R) / (1.3 RATED BV
- V
) + 1]
DD
AV
AS
DSS
1
.01
1
10
.1
t
, TIME IN AVALANCHE (ms)
AV
FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN I IS REACHED
AS
V
DS
L
BV
+
I
-
DSS
CURRENT
TRANSFORMER
AS
t
P
V
DS
I
AS
V
VARY t TO OBTAIN
DD
P
+
50Ω
REQUIRED PEAK I
AS
V
DD
V
≤ 20V
-
GS
50V-150V
DUT
50Ω
t
P
0V
t
AV
FIGURE 11. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 12. UNCLAMPED ENERGY WAVEFORMS
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-5
FSGL035R
Test Circuits and Waveforms
t
t
ON
OFF
t
d(OFF)
V
DD
t
d(ON)
t
t
f
r
R
L
V
DS
90%
90%
V
DS
V
= 12V
GS
10%
10%
DUT
0V
90%
50%
R
GS
50%
V
GS
10%
PULSE WIDTH
FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 14. RESISTIVE SWITCHING WAVEFORMS
Screening Information
Screening is performed in accordance with the latest revision in effect of MIL-PRF-19500, (Screening Information Table).
o
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) T = 25 C, Unless Otherwise Specified
C
PARAMETER
Gate to Source Leakage Current
Zero Gate Voltage Drain Current
Drain to Source On Resistance
Gate Threshold Voltage
NOTES:
SYMBOL
TEST CONDITIONS
= ±30V
MAX
UNITS
nA
I
V
V
±20 (Note 8)
±25 (Note 8)
±20% (Note 9)
±20% (Note 9)
GSS
GS
I
= 80% Rated Value
o
µA
DSS
DS
r
T
= 25 C at Rated I
D
Ω
DS(ON)
C
V
I
= 1.0mA
V
GS(TH)
D
8. Or 100% of Initial Reading (whichever is greater).
9. Of Initial Reading.
Screening Information
TEST
JANTXV EQUIVALENT
JANS EQUIVALENT
Unclamped Inductive Switching
Thermal Response
Gate Stress
V
= 20V, L = 0.1mH; Limit = 48A
V
= 20V, L = 0.1mH; Limit = 48A
GS(PEAK)
GS(PEAK)
t
= 10ms; V = 25V; I = 1A; LIMIT = 60mV
t
= 10ms; V = 25V; I = 1A; LIMIT = 60mV
H
H
H
H
H
H
V
= 45V, t = 250µs
V
= 45V, t = 250µs
GS
GS
Pind
Optional
Required
MIL-PRF-19500 Group A,
Subgroup 2 (All Static Tests at 25 C)
Pre Burn-In Tests (Note 10)
MIL-PRF-19500 Group A,
Subgroup 2 (All Static Tests at 25 C)
o
o
Steady State Gate
Bias (Gate Stress)
MIL-PRF-750, Method 1042, Condition B
MIL-PRF-750, Method 1042, Condition B
V
= 80% of Rated Value,
V
= 80% of Rated Value,
GS
= 150 C, Time = 48 hours
GS
T = 150 C, Time = 48 hours
A
o
o
T
A
Interim Electrical Tests (Note 10)
All Delta Parameters Listed in the Delta Tests and
Limits Table
All Delta Parameters Listed in the Delta Tests and
Limits Table
Steady State Reverse
Bias (Drain Stress)
MIL-PRF-750, Method 1042, Condition A
MIL-PRF-750, Method 1042, Condition A
V
= 80% of Rated Value,
V
= 80% of Rated Value,
DS
= 150 C, Time = 160 hours
DS
T = 150 C, Time = 240 hours
A
o
o
T
A
PDA
10%
5%
Final Electrical Tests (Note 10
MIL-PRF-19500, Group A, Subgroup 2
MIL-PRF-19500, Group A,
Subgroups 2 and 3
NOTE:
10. Test limits are identical pre and post burn-in.
Additional Tests
PARAMETER
Safe Operating Area
Thermal Impedance
SYMBOL
TEST CONDITIONS
= 48V, t = 10ms
MAX
2.38
230
UNITS
A
SOA
V
DS
= 500ms; V = 25V; I = 1A
∆V
SD
t
mV
H
H
H
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-6
FSGL035R
Rad Hard Data Packages - Fairchild Power Transistors
TXV Equivalent
Class S - Equivalents
1. RAD HARD TXV EQUIVALENT - STANDARD DATA
PACKAGE
1. RAD HARD “S” EQUIVALENT - STANDARD DATA
PACKAGE
A. Certificate of Compliance
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
B. Assembly Flow Chart
C. Preconditioning - Attributes Data Sheet
D. Group A
E. Group B
F. Group C
G. Group D
- Attributes Data Sheet
- Attributes Data Sheet
- Attributes Data Sheet
- Attributes Data Sheet
E. Preconditioning - Attributes Data Sheet
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA
PACKAGE
F. Group A
G. Group B
H. Group C
I. Group D
- Attributes Data Sheet
- Attributes Data Sheet
- Attributes Data Sheet
- Attributes Data Sheet
A. Certificate of Compliance
B. Assembly Flow Chart
C. Preconditioning - Attributes Data Sheet
- Pre and Post Burn-In Read and Record
Data
2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL
DATA PACKAGE
D. Group A
E. Group B
- Attributes Data Sheet
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
- Attributes Data Sheet
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup B3)
- Bond Strength Data (Subgroup B3)
- Pre and Post High Temperature Operating
Life Read and Record Data (Subgroup B6)
E. Preconditioning - Attributes Data Sheet
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
F. Group C
G. Group D
- Attributes Data Sheet
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup C6)
- Bond Strength Data (Subgroup C6)
- X-Ray and X-Ray Report
- Attributes Data Sheet
- Pre and Post RAD Read and Record Data
F. Group A
G. Group B
H. Group C
I. Group D
- Attributes Data Sheet
- Subgroups A2, A3, A4, A5 and A7 Data
- Attributes Data Sheet
- Subgroups B1, B3, B4, B5 and B6 Data
- Attributes Data Sheet
- Subgroups C1, C2, C3 and C6 Data
- Attributes Data Sheet
- Pre and Post Radiation Data
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-7
FSGL035R
TO-205AF
3 LEAD JEDEC TO-205AF HERMETIC METAL CAN PACKAGE
ØD
INCHES
MIN
MILLIMETERS
ØD
1
SYMBOL
MAX
0.180
0.021
0.370
0.335
0.105
0.210
0.105
0.020
0.034
0.045
0.560
-
MIN
4.07
0.41
8.89
8.01
2.42
4.83
2.42
0.26
0.72
0.74
12.70
1.91
MAX
4.57
0.53
9.39
8.50
2.66
5.33
2.66
0.50
0.86
1.14
14.22
-
NOTES
P
A
0.160
0.016
0.350
0.315
0.095
0.190
0.095
0.010
0.028
0.029
0.500
0.075
-
2, 3
-
A
Øb
ØD
SEATING
PLANE
h
ØD
e
-
1
L
Øb
4
4
4
-
e
1
2
e
e
e
1
h
j
-
o
90
2
k
L
P
-
e
2
1
3
3
5
o
45
j
k
NOTES:
1. These dimensions are within allowable dimensions of Rev. E of
JEDEC TO-205AF outline dated 11-82.
2. Lead dimension (without solder).
3. Solder coating may vary along lead length, add typically 0.002
inches (0.05mm) for solder coating.
4. Positionof lead to be measured 0.100inches (2.54mm) from bottom
of seating plane.
5. This zone controlled for automatic handling. The variation in
actual diameter within this zone shall not exceed 0.010 inches
(0.254mm).
6. Lead no. 3 butt welded to stem base.
7. Controlling dimension: Inch.
8. Revision 3 dated 6-94.
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-8
FSGL035R
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OPTOPLANAR™
PACMAN™
POP™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
FASTr™
FRFET™
GlobalOptoisolator™
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Power247™
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®
QFET™
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FACT™
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SILENTSWITCHER
SMART START™
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2
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®
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
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As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
FSGL035R Rev. A1
©2001 Fairchild Semiconductor Corporation
4-9
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