FSUSB11MUX [FAIRCHILD]
Low-Power Full-Speed USB (12Mbps) Switch; 低功耗全速USB （ 12Mbps的）开关
| 型号： | FSUSB11MUX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low-Power Full-Speed USB (12Mbps) Switch |
| 文件： | 总13页 (文件大小：1146K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2006
FSUSB11
Low-Power Full-Speed USB (12Mbps) Switch
Features
Description
■ Space saving MicroPak™ Pb-free packaging
(1.6 x 2.1mm)
■ USB 1.1 signal switching compliant
■ -3db bandwidth: >350MHz
■ Maximum 1.15Ω RON at 4.5V VCC
and 4Ω for 2.7V supply
■ 0.3Ω maximum RON flatness for +5V supply
■ Broad VCC operating range: 1.65V to 5.5V
■ Fast turn-on and turn-off time
The FSUSB11 is a high-performance, dual Single-Pole
Double-Throw (SPDT) switch designed for switching
USB 1.1 signals. The device features ultra-low on resis-
tance (RON) of 1.15Ω maximum at 4.5V VCC and 4.3Ω at
2.7V supply. High bandwidth and ultra low (RON) make
this switch able to pass both USB low- and full-speed
signal with minimum signal distortion. The device is fabri-
cated with sub-micron CMOS technology to achieve fast
switching speeds and designed for break-before-make
operation. The select input is TTL-level compatible.
■ Break-before-make enable circuitry
■ Over-voltage tolerant, TTL-compatible control input
Applications
■ Cell Phone
■ PDS
■ Digital Camera
■ Notebook
Ordering Information
Top
Pb-
Part Number
Package
Mark
Free
Packing Method
5K units on tape and reel
2500 units on tape andreel
FSUSB11L10X 10-Lead MicroPak, 1.6 x 2.1mm
ET
Yes
FSUSB11MTCX 14-Lead Thin Shrink Small Outline Package
(TSSOP), JEDEC MO-153, 4.4mm Wide
FSUSB11 Yes
FSUSB11MUX
(Preliminary)
10-Lead Molded Small Outline Package
(MSOP), JEDEC MO-187, 3.0mm
FSUSB11 Yes
3K units on tape and reel
Pb-Free package per JEDEC J-STD-020B.
Block Diagram
MicroPak™ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
Connection Diagrams
Figure 1. Pin Assingments for TSSOP
(Top View)
Figure 2. Pad Assignments for Micropak
(Top View)
Analog Symbols
D2-
S1
1
2
3
4
5
10
9
D1-
D-
VCC
D+
8
GND
S2
7
D1+
6
D2+
Figure 4. Analog Symbols
(Top Through View)
Figure 3. Pin Assignments for MSOP
(Top Through View)
Truth Table
Control Imputs
Pin Desciption
Function
Pin names
D,D1,D2
S
Function
Data Ports
Low Logic Level
High Logic Level
D1 Connected to D+/D-
D2Connected to D+/D-
Control Imput
© 2005 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
2
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the
conditions for actual device operation.
Symbol
VCC
Parameter
Min.
-0.5
-0.5
-0.5
-50
Max.
+6.0
Unit
V
Supply Voltage(1)
Switch Voltage(1)
Input Voltage
VS
VCC to +0.5
+6.0
V
VIN
V
IIK
Input Diode Current
Switch Current
mA
mA
ISW
200
400
ISWPEAK
Peak Switch Current (Pulsed at 1ms Duration,<10% Duty
Cycle)
TSTG
TJ
Storage Temperature Range
Maximum Junction Temperature
Lead Temperature (Soldering, 10 seconds)
Human Body Model
-65
+150
+150
+260
8000
°C
°C
°C
V
TL
ESD
Notes:
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are
observed.
Recommended Operating Conditions
Symbol
Parameter
Min.
1.65
0
Max.
5.50
VCC
VCC
+85
Unit
V
VCC
Supply Voltage
VIN
Control Input Voltage(2)
Switch Input Voltage
Operating Temperature
VCC
VCC
°C
VSW
TA
0
-40
Notes:
2. Unused inputs must be held HIGH or LOW. They may not float.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB11 Rev. 1.0.2
3
DC Electrical Characteristics
All typical values are at 25°C unless otherwise specified.
T = -40 °C
A
V
T = + 25 C°
to +85 C°
CC
A
Symbol
Parameter
Conditions
(V)
Min. Typ. Max. Min. Max. Units
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
5.5
2.0
VIH
Input Voltage High
V
2.4
0.6
V
VIL
Input Voltage Low
0.8
-1.0
-1.0
1.0
1.0
IIN
Control Input Leakage
VIN = 0V to VCC
µA
I
NO(OFF), Off-Leakage Current of
INC(OFF) Port D1 and D2
A = 1V, 4.5V, B0 or B1 =
1V, 4.5V
-50.0
50.0
50.0 -100
100
nA
nA
On-Leakage Current of
Port D
A = 1V, 4.5V,B0 or B1 =
1V, 4.5V or Floating
5.5
2.7
50.0 -100
4.0
100
4.3
IA(ON)
IOUT = 100mA, D1 or D2
= 1.5V
2.6
Switch On Resistance
MicroPak(3)
IOUT = 100 mA, D1 or D2
= 3.5V
4.50
2.7
0.95 1.15
2.8
1.30
4.5
RON
Ω
Ω
IOUT = 100mA, D1 or D2
= 1.5V
Switch On Resistance
TSSOP(3)
I
OUT = 100mA, D1 or D2
4.5
1.5
3.0
= 3.5V
On Resistance Matching IOUT = 100mA, D1 or D2
4.50
0.06 0.12
0.15
Between Channels
= 3.5V
MicroPak(4)
ΔRON
On Resistance Matching IOUT = 100mA, D1 or D2
4.50
0.07
1.4
0.30
Between Channels
= 3.5V
TSSOP(4)
IOUT = 100mA, D1 or D2
= 0V, 0.75V, 1.5V
2.7
4.5
RFLAT(ON) On Resistance Flatness(5)
Ω
I
OUT = 100mA,
0.2
0.3
0.4
B0 or B1 = 0V, 1V, 2V
VIN = 0V or VCC
IOUT = 0V
,
3.6
5.5
0.1
0.1
0.5
0.5
1.0
1.0
ICC
Quiescent Supply Current
µA
Notes:
3. On resistance is determined by the voltage drop between D and Dn pins at the indicated current through the switch.
4. ΔRON = RONmax - RONmin measured at identical VCC, temperature, and voltage.
5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified
range of conditions.
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
4
AC Electrical Characteristics (Continued)
All typical values are at 25°C unless otherwise specified.
T = -40 C°
A
V
T = +25 C°
to +85 C°
Figure
CC
A
Symbol
Parameter
Conditions
(V)
Min. Typ. Max. Min. Max. Units Number
D1 or D2 = 1.5V, RL = 2.7 to 3.6
50.0
35.0
20.0
15.0
60.0
40.0
30.0
20.0
50Ω, CL = 35 pF
tON
Turn-ON Time
ns
ns
ns
Figure 5
Figure 5
Figure 6
D1 or D2 = 3.0V, RL = 4.5 to 5.5
50Ω, CL = 35 pF
D1 or D2 = 1.5V, RL = 2.7 to 3.6
50Ω, CL = 35 pF
tOFF
Turn-OFF Time
D1 or D2 = 3.0V, RL = 4.5 to 5.5
50Ω, CL = 35 pF
D1 or D2 = 1.5V, RL = 2.7 to 3.6
1.0
1.0
50Ω, CL = 35 pF
Break-Before-Make
Time
tBBM
D1 or D2 = 3.0V, RL = 4.5 to 5.5
20.0
50Ω, CL = 35 pF
CL = 1.0 nF, VGEN = 0V, 2.7 to 3.6
20.0
10.0
-70.0
-70.0
-75.0
-75.0
350
Q
Charge Injection
pC Figure 8
dB Figure 7
dB Figure 7
MHz Figure 10
RGEN = 0Ω
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
OIRR OFF-Isolation
f = 1MHz, RL = 50Ω
f = 1MHz, RL = 50Ω
RL = 50Ω
Xtalk
BW
Crosstalk
-3db Bandwidth
350
USB Related AC Electrical Characteristics
All typical values are at 25°C unless otherwise specified.
V
T = +25° C
Figure
CC
A
Symbol
Parameter
Conditions
(V)
Min. Typ. Min. Units Number
RS = 39, CL = 50 pF,
tR = tF = 12ns at 12Mbps
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
0.15
tSKEW Skew
ns Figure 11
0.15
10.0
Rising/Fall Time Mis-
match
tM
(Duty Cycle = 50%)
%
Figure 12
10.0
1.7
1.6
RS = 39, CL = 50 pF, tR = tF =
12ns at 12Mbps (PRBS = 215 1)
tJ
Total Jitter
ns Figure 11
Capacitance
V
T = +25 C°
Figure
CC
A
Symbol
Parameter
Control Pin Input Capacitance
COFF Dn Port OFF Capacitance
CON D Port ON Capacitance
Conditions
(V) Min. Typ. Max. Units Number
CIN
f = 1MHz
f = 1MHz
f = 1MHz
0.0
4.5
4.5
3.5
pF
pF
pF
Figure 9
Figure 9
Figure 9
12.0
40.0
© 2005 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
5
AC Loading and Waveforms
CL includes Fixture and Stray Capacitance
Logic Input Waveforms Inverted for Switches that
have the Opposite Logic Sense
Figure 5. Turn-On/Turn-Off Timing
CL Includes Fixture and Stray Capacitance
Figure 6. Break-Before-Make Timing
Figure 7. OFF Isolation and Crosstalk
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
6
AC Loading and Waveforms (Continued)
Q = ( ΔVOUT)(CL)
Figure 8. Charge Injection
Figure 10. Bandwidth
Figure 9. ON / OFF Capacitance Measurement Setup
Figure 11. Skew Test
Figure 12. Rise / Fall Time Mismatch Test
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
7
Tape and Reel Specification
Tape Format for Micropak 10
Package
Tape
Section
Number
Cavities
125 (typ)
5000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
L10X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
Reel Dimensions
Dimensions are in inches (millimeters) unless otherwise noted.
Tape Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/-0.000
0.567
(14.40)
W1 +0.078/-0.039
(W1 +2.00/-1.00)
(8mm)
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/-0.00)
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
8
Tape Dimensions for MSOP
Dimensions are in millimeters (inches) unless otherwise specified.
Reel Dimensions for MSOP
Dimensions are in inches (millimeters) unless otherwise specified.
Tape Size
A
B
C
D
N
W1
W2
W3
13
(330)
0.059
(1.5)
0.512
(13)
0.795
(20.2)
7.008
(178)
0.448
(12.4)
0.724
(18.4)
0.468-0.606
(11.9 -15.4)
(12mm)
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
9
Physical Dimension
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 13. Pb-Free 10-Lead MicroPak, 1.6 x 2.1mm
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
10
Physical Dimension (Continued)
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 14. 14-Lead Thin-Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
© 2006 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
11
Physical Dimension (Continued)
Dimensions are in millimeters (inches) unless otherwise noted.
Figure 15. 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB11 Rev. 1.0.2
12
© 2005 Fairchild Semiconductor Corporation
FSUSB11 Rev. 1.0.2
www.fairchildsemi.com
13
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FAIRCHILD
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