SG5842JASZ [FAIRCHILD]
Highly Integrated Green-Mode PWM Controller; 高度集成绿色模式PWM控制器
| 型号： | SG5842JASZ |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Highly Integrated Green-Mode PWM Controller |
| 文件： | 总14页 (文件大小：470K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
To minimize standby power consumption, a proprietary
green-mode function provides off-time modulation to
continuously decrease the switching frequency at
light-load conditions. To avoid acoustic-noise problem,
the minimum PWM frequency set above 22KHz. This
green-mode function enables the power supply to meet
international power conservation requirements. To further
FEATURES
Green-Mode PWM Controller
Low Start-up Current (14µA)
Low Operating Current (4mA)
Programmable PWM Frequency with Hopping
(5842JA)
Peak-Current-Mode Control
Cycle-by-Cycle Current Limiting
Synchronized Slope Compensation
Leading-Edge Blanking
reduce
power
consumption,
SG5842A/JA
is
manufactured using the BiCMOS process. This allows a
low start-up current, around 14µA, and an operating
current of only 4mA. As a result, a large start-up
resistance can be used.
Constant Output Power Limit
Totem Pole Output with Soft Driving
VDD Over-Voltage Protection (OVP)
The SG5842A/JA built-in synchronized slope
compensation achieves stable peak-current-mode control.
Programmable Over-Temperature Protection (OTP)
Internal Latch Circuit (OTP, OVP)
Internal Open-Loop Protection
SG5842JA integrates a frequency hopping function that
helps reduce EMI emission of a power supply with
minimum line filters.
VDD Under-Voltage Lockout (UVLO)
GATE Output Maximum Voltage Clamp (18V)
SG5842A/JA provides many protection functions. In
addition to cycle-by-cycle current limiting, the internal
open-loop protection circuit ensures safety should an open
loop or output short-circuit failure occur. PWM output is
disabled until VDD drops below the UVLO lower limit,
then the controller starts again. As long as VDD exceeds
about 24V, the internal OVP circuit is triggered. An
external NTC thermistor can be applied for
over-temperature protection.
APPLICATIONS
General-purpose switch mode power supplies and flyback
power converters, including:
Notebook Power Adapters
Open-Frame SMPS
DESCRIPTION
SG5842A/JA is available in an 8-pin DIP or SOP package.
The highly integrated SG5842A/JA series of PWM
controllers provides several features to enhance the
performance of flyback converters.
TYPICAL APPLICATION
SG5842A/JA
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 1 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
MARKING DIAGRAMS
PIN CONFIGURATION
H: J = with Frequency Hopping
Null = without Frequency
Hopping
T: D = DIP, S = SOP
P: Z = Lead Free
GND
FB
GATE
VDD
SG5842HATP
XXXXXXXXYWWV
Null = regular package
XXXXXXXX: Wafer Lot
Y: Year; WW: Week
V: Assembly Location
VIN
RI
SENSE
RT
ORDERING INFORMATION
Part Number
OTP Latch OVP Latch Frequency Hopping Pb-Free
Package
SG5842JASZ
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
8-Pin SOP
8-Pin DIP
8-Pin SOP
8-Pin DIP
SG5842JADZ
SG5842ASZ (Preliminary)
SG5842ADZ (Preliminary
No
PIN DESCRIPTIONS
Pin No. Symbol Function
Description
1
GND
Ground
Ground.
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal from this pin and the current-sense signal from Pin 6. If FB
voltage exceeds the threshold, the internal protection circuit disables PWM output after a
predetermined delay time.
2
FB
Feedback
For start-up, this pin is pulled high to the rectified line input via a resistor. Since the start-up
3
4
VIN
RI
Start-up Input current requirement of the SG5842A/JA is very small, a large start-up resistance can be used
to minimize power loss.
A resistor connected from the RI pin to GND pin provides a constant current source. This
determines the center PWM frequency. Increasing the resistance reduces PWM frequency.
Reference
Setting
Using a 26KΩ resistor results in a 65KHz center PWM frequency.
For over-temperature protection. An external NTC thermistor is connected from this pin to the
GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the
RT pin drops below a fixed limit, PWM output is latched off.
Temperature
Detection
5
6
RT
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
SENSE
Current Sense
current limiting.
7
8
VDD
Power Supply Power supply. The internal protection circuit disables PWM output if VDD is over-voltage.
GATE
Driver Output
The totem-pole output driver for the power MOSFET, which is internally clamped below 18V.
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 2 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
BLOCK DIAGRAM
5842JA only
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 3 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
Value
30
Unit
V
VVDD
VVIN
VFB
Supply Voltage
Input Terminal
30
V
Input Voltage to FB Pin
Input Voltage to SENSE Pin
Input Voltage to RT Pin
Input Voltage to RI Pin
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
V
VSENSE
VRT
V
V
VRI
V
DIP
800.0
400.0
PD
Power Dissipation (TA < 50°C )
mW
SOP
DIP
82.5
RΘ JA
Thermal Resistance (Junction-to-Air)
°C/W
SOP
141.0
TJ
Operating Junction Temperature
-40 to +125
-55 to +150
260
°C
°C
°C
KV
V
TSTG
TL
Storage Temperature Range
Lead Temperature (Wave Soldering or Infrared, 10 Seconds)
VESD,HBM Electrostatic Discharge Capability, Human Body Model
VESD,MM Electrostatic Discharge Capability, Machine Model
* All voltage values, except differential voltages, are given with respect to GND pin.
3.0
250
* Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
TA
Operating Ambient Temperature
-20 to +85
°C
* For proper operation.
ELECTRICAL CHARACTERISTICS
VDD = 15v, TA = 25°C, unless otherwise noted.
VDD Section
Symbol
VDD-OP
Parameter
Test Condition
Min.
Typ.
Max.
20
Unit
V
Continuously Operating Voltage
Start Threshold Voltage
Minimum Operation Voltage
Start-up Current
VDD-ON
VDD-OFF
IDD-ST
15.5
9.5
16.5
10.5
14
17.5
11.5
30
V
V
VDD=VDD-ON–0.16V
VDD=15V, RI=26KΩ,
GATE=OPEN
µA
IDD-OP
Operating Supply Current
4
5
mA
VDD-OVP
tD-OVP
IDD-H
VDD Over-Voltage Protection
23.2
40.0
24.2
100
25.2
V
VDD Over-Voltage Protection Debounce Time
Holding Current After OVP/OTP Latch-up
RI=26KΩ
µs
µA
VDD=5V
52.5
65.0
RI Section
Symbol
RINOR
Parameter
RI Operating Range
Test Condition
Min.
15.5
Typ.
Max.
36.0
Unit
KΩ
RIMAX
Maximum RI Value for Protection
Minimum RI Value for Protection
230
10
KΩ
RIMIN
KΩ
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 4 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
Oscillator Section
Symbol
Parameter
Test Condition
RI=26KΩ
Min.
62
Typ.
65
Max.
68
Unit
Center Frequency
Hopping Range
FOSC
Normal PWM Frequency
KHz
RI=26KΩ (5842JA only) ±3.7
RI=26KΩ (5842JA only) 3.9
±4.2
4.4
±4.7
4.9
25
tHOP
FOSC-G
FDV
Hopping Period
ms
KHz
%
Green-Mode Minimum Frequency
RI=26KΩ
18
22
Frequency Variation vs. VDD Deviation
Frequency Variation vs. Temperature Deviation
VDD=11.5V to 20V
TA=-20 to 85°C
5
FDT
5
%
Feedback Input Section
Symbol
AV
Parameter
FB Input to Current Comparator Attenuation
Test Condition
Min.
1/4.5
4
Typ.
1/4.0
Max.
1/3.5
7
Unit
V/V
KΩ
V
ZFB
Input Impedance
VFB-OPEN
VFB-OLP
tD-OLP
Output High Voltage
FB pin open
5.5
5.0
50
FB Open-Loop Trigger Level
FB Open-Loop Protection Delay
Green-Mode Entry FB Voltage
Green-Mode Ending FB Voltage
5.4
62
V
RI=26KΩ
RI=26KΩ
RI=26KΩ
56
ms
V
VFB-N
1.9
2.1
2.3
VFB-G
VFB-N-0.5
V
Current Sense Section
Symbol
ZSENSE
VSTHFL
VSTHVA
DCYSAW
tPD
Parameter
Input Impedance
Test Condition
Min.
Typ.
12
Max.
Unit
KΩ
V
Current Limit Flatten Threshold Voltage
Current Limit Valley Threshold Voltage
Duty Cycle of SAW Limit
0.85
0.90
0.22
45
0.95
VSTHFL–VSTHVA
Maximum Duty Cycle
RI=26KΩ
V
%
Propagation Delay to GATE Output
Leading-Edge Blanking Time
150
270
200
350
ns
ns
tLEB
RI=26KΩ
200
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 5 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
GATE Section
Symbol
DCYMAX
VGATE-L
VGATE-H
tr
Parameter
Test Condition
Min.
60
Typ.
65
Max.
70
Unit
%
Maximum Duty Cycle
Output Voltage Low
Output Voltage High
Rising Time
VDD=15V, IO=50mA
VDD=12.5V, IO=-50mA
VDD=15V, CL=1nF
VDD=15V, CL=1nF
VDD=15V, GATE=6V
VDD=20V
1.5
V
7.5
150
30
V
250
50
350
90
ns
ns
mA
V
tf
Falling Time
IO
Peak Output Current
Gate Output Clamping Voltage
230
VGATE-CLAMP
18
19
RT Section
Symbol
IRT
Parameter
Output Current of RT Pin
Test Condition
RI=26KΩ
Min.
67
Typ.
70
Max.
73
Unit
µA
V
VRTTH
tD-OTP
Over-Temperature Protection Threshold Voltage
Over-Temperature Debounce
1.015
60
1.050
100
1.085
140
RI=26KΩ
µs
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 6 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
TYPICAL CHARACTERISTICS
DD-ST
DD-OP
) vs
Start-up Current (I
) vs Temperature
Operating Supply Current (I
Temperature
30
26
22
18
14
10
5.0
4.5
4.0
3.5
3.0
2.5
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (℃)
Temperature (℃)
Start Threshold Voltage (VDD-ON) vs
Temperature
DD-OP
Operation Current (I
) vs VDD Voltage
15
12
9
17.5
17.0
16.5
16.0
15.5
GATE = 1000pF
6
3
GATE = OPEN
0
-40 -25 -10
5
20
35
50
65
80
95 110 125
12
13
14
15
16
17
18
19
20
21
22
23
24
Temperature (℃)
VDD Voltage (V)
PWM Frequency (Fosc) vs Temperature
Min. Operating Voltage (VDD-OFF) vs Temperature
11.5
68
67
66
65
64
63
62
11.0
10.5
10.0
9.5
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40
-25 -10
5
20
35
50
65
80
95
110 125
Temperature (℃)
Temperature (℃)
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 7 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
Trigger Voltage for Over-temperature Protection
(VRTTH) vs Temperature
Max. Duty Cycle (DCYMAX.) vs Temperature
70
1.085
1.075
1.065
1.055
1.045
1.035
1.025
1.015
68
66
64
62
60
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (℃)
Temperature (℃)
Output Current of RT pin (IRT) vs Temperature
73
72
71
70
69
68
67
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (℃)
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 8 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
OPERATION DESCRIPTION
Start-up Current
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on
spike occurs at the sense-resistor. To avoid premature
termination of the switching pulse, a leading-edge
blanking time is built in. During this blanking period, the
current-limit comparator is disabled and cannot switch off
the gate drive.
The typical start-up current is only 14µA, which allows a
high-resistance, low-wattage start-up resistor to be used to
minimize power loss. A 1.5MΩ, 0.25W, start-up resistor
and a 10µF/25V VDD hold-up capacitor are sufficient for an
AC/DC adapter with a universal input range.
Under-Voltage Lockout (UVLO)
Operating Current
The turn-on/turn-off thresholds are fixed internally at
16.5V/10.5V. To enable a SG5842A/JA controller during
start-up, the hold-up capacitor must first be charged to
16.5V through the start-up resistor.
The required operating current has been reduced to 4mA.
This results in higher efficiency and reduces the VDD
hold-up capacitance requirement.
Green-Mode Operation
The hold-up capacitor continues to supply VDD before
energy can be delivered from the auxiliary winding of the
main transformer. VDD must not drop below 10.5V during
this start-up process. This UVLO hysteresis window
ensures that the hold-up capacitor can adequately supply
The proprietary green-mode function provides off-time
modulation to continuously decrease the PWM frequency
under light-load conditions. To avoid acoustic noise
problems, the minimum PWM frequency is set above
22KHz. This green-mode function dramatically reduces
power consumption under light-load and zero-load
V
DD during start-up.
Gate Output / Soft Driving
conditions. Power supplies using
a SG5842A/JA
controller can meet even the most restrictive international
regulations regarding standby power consumption.
The SG5842A/JA BiCMOS output stage is a fast totem
pole gate driver. Cross-conduction has been avoided to
minimize heat dissipation, increase efficiency, and
enhance reliability. The output driver is clamped by an
internal 18V Zener diode to protect the power MOSFET
transistors from any harmful over-voltage gate signals. A
soft driving waveform is implemented to minimize EMI.
Oscillator Operation
A resistor connected from the RI pin to the GND pin
generates a constant current source for the SG5842A/JA
controller. This current is used to determine the center
PWM frequency. Increasing the resistance reduces PWM
frequency. Using a 26KΩ resistor, RI, results in a
corresponding 65KHz PWM frequency. The relationship
between RI and the switching frequency is:
Slope Compensation
The sensed voltage across the current sense resistor is
used for peak-current-mode control and cycle-by-cycle
current limiting. The built-in slope compensation
function improves power supply stability and prevents
peak-current-mode control from causing sub-harmonic
oscillations. Within every switching cycle, the
SG5842A/JA controller produces a positively sloped,
synchronized ramp signal.
1690
----------------------------
(KHz)
(1)
fPWM =
RI (KΩ)
The range of the PWM oscillation frequency is designed
as 47KHz ~ 109KHz.
SG5842JA also integrates frequency hopping function
internally. The frequency variation ranges from around
62KHz to 68KHz for a center frequency of 65KHz. The
frequency hopping function helps reduce EMI emission
of a power supply with minimum line filters.
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 9 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
Constant Output Power Limit
Protection Latch Circuit
When the SENSE voltage, across the sense resistor RS,
reaches the threshold voltage, around 0.85V, the output
GATE drive is turned off after a small delay tPD. This delay
introduces additional current, proportional to tPD • VIN / LP.
Since the delay is nearly constant regardless of the input
voltage VIN. Higher input voltage results in a larger
additional current and the output power limit is also higher
than under low input line voltage. To compensate this
variation for a wide AC input range, a sawtooth
power-limiter (saw limiter) is designed to solve the unequal
power-limit problem. The saw limiter is designed as a
positive ramp signal (VLIMIT_RAMP) and is fed to the inverting
input of the OCP comparator. This results in a lower current
limit at high-line inputs than at low-line inputs.
For the SG5842A/JA family, the built-in latch function
provides a versatile protection feature that does not
require external components (see ordering information
for a detailed description). To reset the latch circuit,
disconnect the AC line voltage of the power supply.
Thermal Protection
An external NTC thermistor can be connected from the
RT pin to ground. A fixed current, IRT, is sourced from the
RT pin. Because the impedance of the NTC decreases at
high temperatures, when the voltage of the RT pin drops
below 1.05V, PWM output is latched off. The RT pin
output current is related to the PWM frequency
programming resistor RI.
VDD Over-Voltage Protection
Noise Immunity
VDD over-voltage protection has been built in to prevent
damage due to abnormal conditions. Once the VDD
voltage is over than the VDD over-voltage protection
voltage (VDD-OVP) and lasts for tD-OVP, the PWM pulses is
latched off. The PWM pulses stay latched off until the
user unplugs the power supply from the mains outlet.
Noise from the current sense or the control signal may
cause significant pulse width jitter, particularly in
continuous-conduction mode. Slope compensation helps
alleviate this problem. Good placement and layout
practices should be followed. Avoid long PCB traces and
component leads. Compensation and filter components
should be located near the SG5842A/JA. Finally,
increasing the power-MOS gate resistance is advised.
Limited Power Control
The FB voltage increases every time the output of the
power supply is shorted or over loaded. If the FB voltage
remains higher than a built-in threshold longer than tD-OLP
,
PWM output is turned off. As PWM output is turned off,
the supply voltage VDD begins decreasing.
-----------------
(2)
tD - OLP (ms) = 2.154 ×R (KΩ)
I
When VDD goes below the turn-off threshold (eg, 10.5V)
the controller is totally shut down. VDD is charged up to
the turn-on threshold voltage of 16.5V through the
start-up resistor until PWM output is restarted. This
protection feature remains activated as long as the
over-loading condition persists. This prevents the power
supply from overheating due to over loading conditions.
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 10 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
REFERENCE CIRCUIT
Q1
BD1
CN1
1
3
1
2
3
L3
L1
L2
2
1
2
C1
C2
T1
4
1
Vo+
D1
VZ1
TR1
R3
C3
D2
C4
D3
+
C7
+
+C8
C6
R4
C5
R6
R1
R5
D4
R2 R7
Q2
U1
GND GATE
1
2
3
4
8
7
6
5
1
R12
FB
VIN SENSE
RI RT
SG5842A/JA
VDD
R16
R11
R9
R10
C9
+
C11
R8
THER2
U2
R13
R
C10
R14
U3
VO+
R15
BOM
Reference
BD1
C1
Component
BD 4A/600V
Reference
Q2
Component
MOS 7A/600V
XC 0.68µF/300V
XC 0.1µF/300V
CC 0.01µF/500V
EC 120µ/400V
YC 222p/250V
CC 1000pF/100V
EC 1000µF/25V
EC 470µF/25V
EC 10µF/50V
CC 222pF/50V
CC 470pF/50V
LED
R1,R2,R5,R7
R3
R 470Kohm 1/4W
R 100Kohm 1/2W
R 47ohm 1/4W
R 2Kohm 1/8W
R 0.3ohm 2W
C2
C3
R4
C4
R6
C5
R8
C6
R9
R 33Kohm 1/8W
R 4.7Kohm 1/8W
R 470ohm 1/8W
R 0 ohm 1/8W
C7
R10
R11
R12
R13
R14
R15
R16
THER2
T1
C8
C9
C10
C11
D1
R 4.7Kohm 1/8W
R 154Kohm 1/8W 1%
R 39Kohm 1/8W 1%
R 100ohm 1/8W
D2
Diode BYV95C
TVS P6KE16A
Diode FR103
FUSE 4A/250V
Choke (900µH)
Choke (10mH)
Inductor (2µH)
Diode 20A/100V
D3
Thermistor TTC104
D4
Transformer (600µH-PQ2620)
IC SG5842A/JA
IC PC817
F1
U1
L1
U2
L2
U3
IC TL431
L3
VZ1
VZ 9G
Q1
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 11 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
PACKAGE INFORMATION
8PINS-DIP(D)
D
Θ
8
1
5
4
e
B
E
L
b1
b
e
Dimensions
Millimeters
Min.
Inches
Symbol
Typ.
Max.
Min.
Typ.
Max.
A
5.334
0.210
A1
A2
b
0.381
3.175
0.015
0.125
3.302
1.524
0.457
9.271
7.620
6.350
2.540
3.302
9.017
7˚
3.429
0.130
0.060
0.018
0.365
0.300
0.250
0.100
0.130
0.355
7˚
0.135
b1
D
9.017
6.223
10.160
6.477
0.355
0.245
0.400
0.255
E
E1
e
L
2.921
8.509
0˚
3.810
9.525
15˚
0.115
0.335
0˚
0.150
0.375
15˚
eB
θ˚
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 12 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
8PINS-SOP(S)
C
8
5
H
E
F
1
4
b
e
D
Θ
L
A
A1
Dimensions
Millimeter
Min.
1.346
Inch
Symbol
Typ.
Max.
1.752
0.254
Min.
0.053
0.004
Typ.
Max.
0.069
A
A1
b
0.101
0.010
0.406
0.203
0.016
0.008
c
D
E
e
4.648
3.810
1.016
4.978
3.987
1.524
0.183
0.150
0.040
0.196
0.157
0.060
1.270
0.050
F
0.381X45°
0.015X45°
H
L
5.791
0.406
0°
6.197
1.270
8°
0.228
0.016
0°
0.244
0.050
8°
θ˚
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 13 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
Product Specification
Highly Integrated Green-Mode PWM Controller
SG5842A/JA
© System General Corp.
Version 1.4.2 (IAO33.0026.B6)
- 14 -
www.sg.com.tw • www.fairchildsemi.com
October 30, 2007
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