USB1T1103MPX [FAIRCHILD]
Universal Serial Bus Peripheral Transceiver with Voltage Regulator; 通用串行总线外设收发器，稳压器
| 型号： | USB1T1103MPX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Universal Serial Bus Peripheral Transceiver with Voltage Regulator |
| 文件： | 总15页 (文件大小：1297K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2005
Revised May 2005
USB1T1103
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
General Description
Features
■ Complies with Universal Serial Bus Specification 2.0
This chip provides a USB Transceiver functionality with a
voltage regulator that is compliant to USB Specification
Rev 2.0. this integrated 5V to 3.3V regulator allows inter-
facing of USB Application specific devices with supply volt-
ages ranging from 1.65V to 3.6V with the physical layer of
Universal Serial Bus. It is capable of operating at 12Mbits/s
(full speed) data rates and hence is fully compliant to USB
Specification Rev 2.0. The Vbusmon terminal allows for
monitoring the Vbus line.
■ Integrated 5V to 3.3V voltage regulator for powering
VBus
■ Utilizes digital inputs and outputs to transmit and receive
USB cable data
■ Supports full speed (12Mbits/s) data rates
■ Ideal for portable electronic devices
■ MLP technology package (16 terminal) with HBCC
footprint
The USB1T1103 also provides exceptional ESD protection
with 15kV contact HBM on D , D terminals.
■ 15kV contact HBM ESD protection on bus terminals
■ Supports disable mode and is functionally equivalent to
Philips ISP1102
Applications
•
•
•
•
•
•
PDA
PC Peripherals
Cellular Phones
MP3 Players
Digital Still Camera
Information Appliance
Ordering Code:
Package
Order Number
Package Description
Number
USB1T1103MPX
USB1T1103MHX
MLP14D
Pb-Free 14-Terminal Molded Leadless Package (MLP), 2.5mm Square
MLP16HB
Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Pb-Free package per JEDEC J-STD-020B.
© 2005 Fairchild Semiconductor Corporation
DS500905
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Logic Diagram
Connection Diagrams
MLP16 GND Exposed Diepad
MLP14 GND Exposed Diepad
(Bottom View)
(Bottom View)
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2
Terminal Descriptions
Terminal Number
MLP14 MLP16
Terminal
Name
I/O
Terminal Description
1
1
OE
I
Output Enable:
Active LOW enables the transceiver to transmit data on the bus. When not
active the transceiver is in the receive mode (CMOS level is relative to VCCIO
)
2
2
RCV
O
I/O
I/O
I
Receive Data Output:
Non-inverted CMOS level output for USB differential Input (CMOS output level
is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable
and preserved during SE0 condition.
3
4
5
3
4
5
Vp/Vpo
Vm/Vmo
SUSPND
Single-ended D receiver output VP (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Terminal also acts as drive data input Vpo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Single-ended D receiver output Vm (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device;
Terminal also acts as drive data input Vmo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
Suspend:
Enables a low power state (CMOS level is relative to VCCIO). While the
SUSPND terminal is active (HIGH) it will drive the RCV terminal to logic “0”
state.
—
6
7
NC
No Connect
6
VCCIO
Supply Voltage for digital I/O terminals (1.65V to 3.6V):
When not connected the D and D terminals are in 3-STATE. This supply bus
is totally independent of VCC (5V) and VREG (3.3V), and must never exceed the
VREG (3.3) voltage. For VCCIO disconnected the O /O terminals are HIGH
Impedance and the VPU (3.3V) is turned off.
7
8
Vbusmon
D , D
O
Vbus monitor output (CMOS level relative to VCCIO):
When Vbus 4.1V then Vbusmon HIGH and when Vbus 3.6V then
Vbusmon LOW. If SUSPND HIGH then Vbusmon is pulled HIGH.
9, 8
10, 9
AI/O Data , Data :
Differential data bus conforming to the USB standard. Terminals are HIGH
Impedance for bus powered mode when Vbus 3.6V. For ByPass Mode then
HIGH Impedance when VREG/ Vbus VREG minimum.
10
—
11
11
12
13
NC
NC
No Connect
No Connect
VREG (3.3V)
Internal Regulator Option:
Regulated supply output voltage (3.0V to 3.6V) during 5V operation;
decoupling capacitor of at least 0.1 F is required.
Regulator ByPass Option:
Used as supply voltage input for 3.3V operation.
12
13
14
15
VCC (5.0V)
Internal Regulator Option:
Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB
line Vbus.
Regulator ByPass Option:
Connected to VREG (3.3V)
V
PU (3.3V)
Pull-up Supply Voltage (3.3V 10%):
Connect an external 1.5k resistor on D (FS data rate);
Terminal function is controlled by Config input terminal:
Config LOW VPU (3.3V) is floating (HIGH Impedance) for zero pull-up cur-
rent.
Config HIGH VPU (3.3V) 3.3V; internally connected to VREG (3.3V).
VPU is OFF in disable mode.
14
16
Config
GND
I
USB connect or disconnect software control input.
Configures 3.3V to external 1.5k resistor on D when HIGH.
Exposed Exposed
Diepad Diepad
GND GND supply down bonded to exposed diepad to be connected to the PCB GND.
3
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Functional Description
The USB1T1103 transceiver is designed to convert CMOS
data into USB differential bus signal levels and to convert
USB differential bus signal to CMOS data.
rather than discrete input and output terminals. Table 1
describes the specific terminal functionality selection. Table
2 and Table 3 describe the specific Truth Tables for Driver
and Receiver operating functions.
To minimize EMI and noise the outputs are edge rate con-
trolled with the rise and fall times controlled and defined for
full speed data rates only (12Mbits/s). The rise, fall times
are balanced between the differential terminals to minimize
skew.
The USB1T1103 also has the capability of various power
supply configurations, including a disable mode for VCCIO
disconnected, to support mixed voltage supply applications
(see Table 4) and Section 2.1 for detailed descriptions.
The USB1T1103 differs from earlier USB Transceiver in
that the Vp/Vm and Vpo/Vmo terminals are now I/O terminals
Functional Tables
TABLE 1. Function Select
Vp/Vpo
po Input
Vm/Vmo
SUSPND
OE
D , D
RCV
Function
L
L
Driving &
Receiving
Active
V
Vmo Input Normal Driving
(Differential Receiver Active)
L
H
H
H
L
Receiving
(Note 1)
Active
Vp Output Vm Output Receiving
Driving
Inactive
(Note 2)
Vpo Input
Vmo Input Driving during Suspend
(Differential Receiver Inactive)
H
3-STATE
(Note 1)
Inactive
(Note 2)
Vp Output Vm Output Low Power State
Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.
Note 2: For SUSPND HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling (K) is detected via
the single-ended receivers of the V /V and V /V terminals.
p
po
m
mo
TABLE 2. Driver Function (OE L) using Differential Input Interface
V
m/Vmo
Vp/Vpo
Data (D / D )
SE0 (Note 3)
L
L
L
H
L
Differential Logic 1
Differential Logic 0
Illegal State
H
H
H
Note 3: SE0 Single Ended Zero
TABLE 3. Receiver Function (OE H)
Vp/Vpo
Vm/Vmo
D , D
RCV
H
Differential Logic 1
H
L
L
L
H
L
Differential Logic 0
SE0
L
X
X
Don’t Care
RCV(0) denotes the signal level on output RCV just prior to the SE0 or SE1 event. This level is stable during the SE0 or SE1 event period.
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4
Power Supply Configurations and Options
The three modes of power supply operation are:
signals up to 3.6V to share the D and D bus lines.
Internally the circuitry limits leakage from D and D ter-
minals (maximum 10 A) and VCCIO such that device is
•
Normal Mode: Regulated Output and Regulator Bypass
1. Regulated Output: VCCIO is connected and VCC(5.0)
in low power (suspended) state. Terminals Vbusmon
and RCV are forced LOW as an indication of this mode
with Vbusmon being ignored during this state.
is connected to 5V (4.0V to 5.5V) and the internal
voltage regulator then produces 3.3V for the USB
connections.
•
Disable Mode: VCCIO is not connected. VCC is con-
nected, or VCC and VREG are connected. 0V to 3.3V in
this mode D and D are 3-STATE and VPU is HIGH
2. Internal Regulator Bypass Mode: VCCIO is con-
nected and both VCC(5.0) and VREG(3.3) are con-
nected to a 3.3V source (3.0V to 3.6V).
Impedance (switch is turned off). The USB1T1103 allows
external signals up to 3.6V to share the D and D bus
lines. Internally the circuitry limits leakage from D and
In both cases for normal mode the VCCIO is an indepen-
dent voltage source (1.65V to 3.6V) that is a function of
the external circuit configuration.
D
pins (maximum 10 A).
•
Sharing Mode: VCCIO is only supply connected. VCC and
A summary of the Supply Configurations is described in
Table 4.
V
REG are not connected. In this mode the D and D ter-
minals are 3-STATE and the USB1T1103 allows external
TABLE 4. Power Supply Configuration Options
Power Supply Mode Configuration
Terminals
Normal (Regulated
Normal (Regulator
Bypass)
Disable
Sharing
Output)
VCC (5V)
Connected to 5V
source
Not Connected
Connected to 5V
Source
Connected to VREG
(3.3V)
or
3.6V
[Max Drop of 0.3V]
(2.7V to 3.6V)
VREG (3.3V)
VCCIO
3.3V, 300 A
Regulated Output
Not Connected
3.3V, 300
Regulated Output
A
Connected to 3.3V
Source
0.5V
1.65V to 3.6V Source 1.65V to 3.6V Source 1.65V to 3.6V Source
V
PU (3.3V)
3-STATE (off)
3-STATE (Off)
3.3V Available if
Config HIGH
3.3V Available if
Config HIGH
D , D
3-STATE (off)
Invalid [I]
Invalid [I]
Invalid [I]
Hi-Z
3-STATE
Function of
Mode Set Up
Function of
Mode Set Up
Vp/Vpo, Vm/Vmo
RCV
L
L
Function of
Mode Set Up
Function of
Mode Set Up
Function of
Mode Set Up
Function of
Mode Set Up
Vbusmon
L
Function of
Mode Set Up
Function of
Mode Set Up
OE, SUSPND, Config
Hi-Z
Function of
Function of
Mode Set Up
Mode Set Up
Invalid [I] I/O are to be 3-STATE, outputs to be LOW.
5
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Human Body Model
ESD Protection
Figure 1 shows the schematic representation of the Human
Body Model ESD event. Figure 2 is the ideal waveform rep-
resentation of the Human Body Model.
ESD Performance of the USB1T1103
HBM D /D : 15.0kV
HBM, all other terminals (Mil-Std 883E): 6.5kV
IEC 61000-4-2, IEC 60749-26 and IEC 60749-27
The IEC 61000-4-2 standard covers ESD testing and per-
formance of finished equipment, and as such evaluates the
equipment in its entirety for ESD immunity. Fairchild
Semiconductor has evaluated this device using the
IEC 6100-4-2 representative system model depicted in Fig-
ure 3. Under the additional standards set forth by the IEC,
this device is also compliant with IEC 60749-26 (HBM) and
IEC 60749-27 (MM).
ESD Protection: D /D Terminals
Since the differential terminals of a USB transceiver may
be subjected to extreme ESD voltages, additional immunity
has been included in the D and D terminals without com-
promising performance. The USB1T1103 differential termi-
nals have ESD protection to the following limits:
•
•
15kV using the contact Human Body Model
8kV using the Contact Discharge method as specified in
IEC 61000-4-2
Additional ESD Test Conditions
For additional information regarding our product test meth-
odologies and performance levels, please contact Fairchild
Semiconductor.
FIGURE 1. Human Body ESD Test Model
FIGURE 2. HBM Current Waveform
FIGURE 3. IEC 61000-4-2 ESD Test Model
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6
Absolute Maximum Ratings(Note )
Recommended Operating
Conditions
0.5V to 6.0V
Supply Voltage (VCC)(5V)
I/O Supply Voltage (VCCIO
)
0.5V to 4.6V
DC Supply Voltage VCC (5V)
I/O DC Voltage VCCIO
4.0V to 5.5V
Latch-up Current (ILU
VI 1.8V to 5.4V
DC Input Current (IIK
VI
)
1.65V to 3.6V
150 mA
DC Input Voltage Range (VI)
DC Input Range for AI/O (VAI/O
Terminals D and D
0V to VCCIO 5.5V
0V to VCC
)
)
0
18 mA
0V to 3.6V
DC Input Voltage (VI)
(Note )
Operating Ambient Temperature
(TAMB
0.5V to VCCIO 0.5V
18 mA
)
40 C to 85 C
DC Output Diode Current (IOK
VO VCC or VO
)
0
DC Output Voltage (VO)
(Note )
0.5V to VCCIO 0.5V
Output Source or Sink Current (IO)
VO 0 to VCC
Current for D , D Terminals
Current for RCV, Vm/Vp
DC VCC or GND Current
12 mA
12 mA
(ICC, IGND
)
100 mA
ESD Immunity Voltage (VESD);
Contact HBM [3]
Note 4: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristic tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Terminals D , D , ILI 1 A
15kV
6.5kV
All Other Terminals [3] ILI
1 A
Storage Temperature (TSTO
)
40 C to 125 C
Power Dissipation (PTOT
)
Note 5: IO Absolute Maximum Rating must be observed.
Note 6: Per ESD Methodology described in page 5.
ICC (5V)
ICCIO
48 mW
9 mW
DC Electrical Characteristics (Supply Terminals)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC (5V) 4.0V to 5.5V or VREG (3.3V) 3.0V to 3.6V, VCCIO 1.65V to 3.6V
Limits
40 C to 85 C
Typ
Symbol
Parameter
Conditions
Units
Min
Max
V
(3.3V)
Regulated Supply Output
Internal Regulator Option;
3.0
3.3
3.6
REG
V
I
300
A
(Note 7)
(Note 8)
LOAD
I
I
I
Operating Supply Current (V 5.0) Transmitting and Receiving at
4.0
8.0
2.0
300
CC
CC
mA
mA
12 Mbits/s; C
50 pF (D , D )
(Note 9)
1.0
LOAD
I/O Operating Supply Current
Supply Current during
Transmitting and Receiving at
12 Mbits/s
CCIO
(Note 9)
IDLE: V
2.7V, V
D
0.3V;
0.3V
CC (IDLE)
D
A
A
A
FS IDLE and SE0 (V 5.0)
CC
SE0: V
0.3V, V
(Note 10)
20.0
D
D
I
I
I/O Static Supply Current
Disable Supply Current
IDLE, SUSPND or SE0
CCIO (STATIC)
CC(DISABLE)
V
V
0V
Connected
CCIO
CC
25.0
I
Suspend Supply Current
USB1T1103
SUSPND HIGH
OE HIGH
25.0
CC(SUSPND)
(Note 10)
A
V
V
V
V
OPEN
m
p
I
I
I
I
I
I/O Sharing Mode Supply Current
Sharing Mode Load Current on
(5V) Not Connected
(5V) Not Connected
20.0
10.0
A
A
CCIO(SHARING)
CC
CC
D
D
D
D
(SHARING)
D
/D Terminals
Config LOW; V
3.6V
/
D
Disable Mode Load Current on
D /D Terminals
V
CCIO
Not Connected or 0V
(DISABLE)
/
10.0
A
Config
V
3.6V LOW or HIGH
7
D
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DC Electrical Characteristics (Continued)
Limits
40 C to 85 C
Typ
Symbol
Parameter
Conditions
Units
Min
Max
V
V
V
Threshold Detection Voltage
1.65V
V
CCIO
3.6V
CCTH
CC
Supply Lost
3.6
V
mV
V
Supply Present
4.1
V
V
Threshold Detection
V
1.8V
CCHYS
CC
CCIO
70.0
450
Hysteresis Voltage
V
Threshold Detection Voltage 2.7V
V
3.6V
CCIOTH
CCIO
REG
Supply Lost
Supply Present
3.3V
0.5
0.8
1.4
V
V
V
Threshold Detection
V
REG
CCIOHYS
CCIO
mV
Hysteresis Voltage
Regulated Supply Threshold
Detection Voltage
1.65V
2.7V
V
V
REG
REGTH
CCIO
V
3.6V
REG
V
Supply Lost
Supply Present
2.4
(Note 12)
V
Regulated Supply Threshold
Detection Hysteresis Voltage
V
1.8V
REGHYS
CCIO
450
mV
Note 7: I
includes the pull-up resistor current via terminal V
PU
LOAD
Note 8: The minimum voltage in Suspend mode is 2.7V.
Note 9: Not tested in production, value based on characterization.
Note 10: Excludes any current from load and V current to the 1.5k resistor.
PU
Note 11: Includes current between V and the 1.5k internal pull-up resistor.
pu
Note 12: When V
2.7V, minimum value for V
2.0V for supply present condition.
CCIO
REGTH
DC Electrical Characteristics (Digital Terminals – excludes D , D Terminals)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). V
1.65V to 3.6V
Limits
40 C to 85 C
Min Max
CCIO
Symbol
Parameter
Test Conditions
Units
Input Levels
V
V
LOW Level Input Voltage
HIGH Level Input Voltage
OUTPUT LEVELS:
0.3*V
V
V
IL
CCIO
0.6*V
IH
CCIO
V
V
LOW Level Output Voltage
I
I
I
I
2 mA
100
0.4
OL
OL
OL
OH
OH
V
V
A
A
0.15
HIGH Level Output Voltage
2 mA
100
V
CCIO
- 0.4
OH
V
- 0.15
CCIO
Leakage Current
I
Input Leakage Current
V
1.65V to 3.6V
1.0
LI
CCIO
A
(Note 13)
10.0
Capacitance
, C
C
Input Capacitance
Terminal to GND
pF
IN
I/O
Note 13: If V
V
then leakage current will be higher than specified.
CCIO
REG
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8
DC Electrical Characteristics (Analog I/O Terminals – D , D Terminals)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
V
4.0V to 5.5V or VREG 3.0V to 3.6V
CC
Limits
40 C to 85 C
Typ
Symbol Parameter
Test Condition
Units
Min
Max
Input Levels – Differential Receiver
V
V
Differential Input Sensitivity
| V
- V |
I(D )
0.2
0.8
V
V
DI
I(D
)
Differential Common Mode Voltage
2.5
0.8
0.7
CM
INPUT LEVELS – Single-ended Receiver
V
V
V
LOW Level Input Voltage
HIGH Level Input Voltage
Hysteresis Voltage
V
V
V
IL
2.0
IH
0.30
HYS
Output Levels
V
V
LOW Level Output Voltage
HIGH Level Output Voltage
R
R
1.5k to 3.6V
15k to GND
0.3
3.6
V
V
OL
L
2.8
OH
L
(Note 14)
Leakage Current
I
Input Leakage Current Off State
CAPACITANCE
1.0
20.0
44.0
A
OFF
C
I/O Capacitance
Terminal to GND
pF
I/O
Resistance
Z
Driver Output Impedance
34.0
10.0
41.0
(Note 15)
DRV
Z
Driver Input Impedance
Switch Resistance
M
V
IN
R
10.0
3.6
SW
V
Termination Voltage
R
Upstream Port
3.0
(Note 16)
(Note 17)
TERM
PU
Note 14: If V min.
V
- 0.2V.
REG
OH
Note 15: Includes external resistors of 27 on both D and D terminals.
Note 16: This voltage is available at terminal V and V
.
REG
PU
Note 17: Minimum voltage is 2.7V in the suspend mode.
9
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AC Electrical Characteristics (A I/O Terminals Full Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
V
4.0V to 5.5V or VREG 3.0V to 3.6V, VCCIO 1.65V to 3.6V, CL 50 pF; RL 1.5K on D to VPU
CC
Limits
Symbol
Parameter
Test Conditions
40 C to 85 C
Typ
Unit
Min
Max
Driver Characteristics
t
Output Rise Time
C
50 125 pF
4.0
20.0
R
L
10% to 90%
Figures 4, 8
ns
t
Output Fall Time
4.0
20.0
F
t
Rise/Fall Time Match
t / t Excludes First Transition
F R
RFM
90.0
111.1
%
V
from Idle State
V
Output Signal Crossover Voltage
Excludes First Transition from
Idle State see Waveform
CRS
1.3
2.0
(Note 18)
Driver Timing
Propagation Delay
(V /V , V /V to D /D )
t
PLH
Figures 5, 8
Figures 7, 8
Figures 7, 9
18.0
15.0
15.0
ns
ns
ns
t
PHL
p
po
m
mo
t
Driver Disable Delay
(OE to D /D )
PHZ
t
PLZ
t
Driver Enable Delay
(OE to D /D )
PZH
t
PZL
Receiver Timing
t
Propagation Delay (Diff)
PLH
Figures 6, 10
Figures 6, 10
15.0
18.0
ns
ns
t
(D /D to Rev)
PHL
t
Single Ended Receiver Propagation Delay
PLH
t
(D /D to V / V , V /V )
mo
PHL
p
po
m
Note 18: Not production tested, limits guaranteed by design.
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10
Typical Application Configurations
Upstream Connection in Bypass Mode with Differential Outputs
Downstream Connection in Normal Mode with Differential Outputs
11
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AC Waveforms
FIGURE 4. Rise and Fall Times
FIGURE 5. Vpo, Vmo to D /D
FIGURE 6. D /D to RCV, Vpo/Vp and Vmo/Vm
FIGURE 7. OE to D /D
Test Circuits and Waveforms
V
V
0 for t
, t
C
C
50 pF Full Speed Propagation Delays
125 pF Edge Rates only
PZH PHZ
L
L
V
for t
PZL
REG
FIGURE 9. Load for Enable and Disable Times
FIGURE 8. Load for D /D
FIGURE 10. Load for Vm/Vmo, Vp/Vpo and RCV
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12
Tape and Reel Specification
Tape Format for MHBCC and MLP
Package
Tape
Number
Cavities
125 (typ)
2500/3000
75 (typ)
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Carrier
Sealed
MHX/MPX
Sealed
Trailer (Hub End)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
REEL DIMENSIONS inches (millimeters)
Tape Size
A
B
C
D
N
W1
W2
13.0
330
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
7.008
(178)
0.488
(12.4)
0.724
(18.4)
12 mm
13
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Physical Dimensions inches (millimeters) unless otherwise noted
Pb-Free 14-Terminal Molded Leadless Package (MLP), 2.5mm Square
Package Number MLP14D
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14
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
Package Number MLP16HB
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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15
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相关型号：
USB1T11ABQX_NL
Bus Transceiver, USB Series, 1-Func, 1-Bit, True Output, 3 X 3 MM, LEAD FREE, MO-220, MLP-16
FAIRCHILD
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