AOT7S65 [FREESCALE]
650V 7A a MOS TM Power Transistor; 650V 7A的MOS TM功率晶体管型号: | AOT7S65 |
厂家: | Freescale |
描述: | 650V 7A a MOS TM Power Transistor |
文件: | 总7页 (文件大小:702K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
General Description
fabricated using the advanced αMOSTM high voltage process that is designed to deliver high levels of
The AOT7S65 & AOB7S65 & AOTF7S65 have been
performance and robustness in switching applications. By providing low RDS(on), Qg and EOSS along with guaranteed avalanche capability these parts can be
adopted quickly into new and existing offline power supply
designs.
Features
VDS @ Tj,max
IDM
RDS(ON),max
Qg,typ
oss @ 400V
750V
30A
0.65Ω
9.2nC
2µJ
E
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
AOT7S65/AOB7S65
AOTF7S65
AOTF7S65L
Units
Drain-Source Voltage
VDS
650
V
Gate-Source Voltage
VGS
±30
7*
V
A
TC=25°C
7
5
7*
5*
Continuous Drain
Current
ID
TC=100°C
5*
Pulsed Drain Current C
Avalanche Current C
IDM
IAR
30
1.7
43
86
35
A
Repetitive avalanche energy C
Single pulsed avalanche energy G
TC=25°C
EAR
EAS
mJ
mJ
W
104
0.8
27
PD
Power Dissipation B
Derate above 25oC
0.3
100
0.2
W/ o
C
MOSFET dv/dt ruggedness
Peak diode recovery dv/dt H
dv/dt
V/ns
°C
20
Junction and Storage Temperature Range
TJ, TSTG
-55 to 150
Maximum lead temperature for soldering
purpose, 1/8" from case for 5 seconds J
Thermal Characteristics
TL
300
°C
Parameter
Symbol
AOT7S65/AOB7S65
AOTF7S65
AOTF7S65L
Units
Maximum Junction-to-Ambient A,D
RθJA
65
65
65
°C/W
Maximum Case-to-sink A
RθCS
RθJC
0.5
1.2
--
--
°C/W
°C/W
Maximum Junction-to-Case
3.6
4.7
* Drain current limited by maximum junction temperature.
1/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
-
STATIC PARAMETERS
ID=250µA, VGS=0V, TJ=25°C
ID=250µA, VGS=0V, TJ=150°C
VDS=650V, VGS=0V
650
-
750
-
BVDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
700
-
1
V
-
IDSS
µA
VDS=520V, TJ=150°C
-
10
-
-
IGSS
VDS=0V, VGS=±30V
Gate-Body leakage current
Gate Threshold Voltage
-
±100
4
nΑ
V
VGS(th)
VDS=5V,ID=250µA
2.6
3.3
0.54
1.48
0.82
-
VGS=10V, ID=3.5A, TJ=25°C
VGS=10V, ID=3.5A, TJ=150°C
IS=3.5A,VGS=0V, TJ=25°C
-
-
-
-
-
0.65
1.64
-
Ω
Ω
V
RDS(ON)
Static Drain-Source On-Resistance
VSD
IS
Diode Forward Voltage
Maximum Body-Diode Continuous Current
Maximum Body-Diode Pulsed CurrentC
7
A
ISM
-
30
A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Output Capacitance
-
-
434
30
-
-
pF
pF
VGS=0V, VDS=100V, f=1MHz
Coss
Effective output capacitance, energy
related H
Co(er)
Co(tr)
-
-
23
80
-
-
pF
pF
VGS=0V, VDS=0 to 480V, f=1MHz
Effective output capacitance, time
related I
VGS=0V, VDS=100V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
Crss
Rg
Reverse Transfer Capacitance
Gate resistance
-
-
1
-
-
pF
17.5
Ω
SWITCHING PARAMETERS
Qg
Qgs
Qgd
tD(on)
tr
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
-
-
-
-
-
-
-
-
-
-
9.2
2.5
2.7
21
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
ns
ns
ns
ns
VGS=10V, VDS=480V, ID=3.5A
VGS=10V, VDS=400V, ID=3.5A,
14
RG=25Ω
tD(off)
tf
55
15
trr
IF=3.5A,dI/dt=100A/µs,VDS=400V
IF=3.5A,dI/dt=100A/µs,VDS=400V
IF=3.5A,dI/dt=100A/µs,VDS=400V
224
19
Body Diode Reverse Recovery Time
Peak Reverse Recovery Current
ns
A
Irm
Qrr
2.8
µC
Body Diode Reverse Recovery Charge
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C
H. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS.
I. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS.
J. Wavesoldering only allowed at leads.
2/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
12
10
8
14
12
10
8
7V
10V
7V
10V
6V
6V
5.5V
5V
6
5.5V
6
4
5V
4
VGS=4.5V
2
2
VGS=4.5V
0
0
0
5
10
15
20
0
5
10
DS (Volts)
15
20
VDS (Volts)
V
Figure 2: On-Region Characteristics@125°C
Figure 1: On-Region Characteristics@25°C
100
10
1.5
-55°C
VDS=20V
1.2
0.9
0.6
0.3
0.0
125°C
VGS=10V
1
0.1
0.01
25°C
0
3
6
9
12
15
2
4
6
8
10
VGS(Volts)
ID (A)
Figure 3: Transfer Characteristics
Figure 4: On-Resistance vs. Drain Current and
Gate Voltage
1.2
1.1
1
3
2.5
2
VGS=10V
ID=3.5A
1.5
1
0.9
0.5
0
0.8
-100
-50
0
50
100
150
200
-100
-50
0
50
Temperature (°C)
Figure 5: On-Resistance vs. Junction Temperature
100
150
200
TJ (oC)
Figure 6: Break Down vs. Junction Temperature
3/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
12
9
1.0E+02
1.0E+01
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
VDS=480V
ID=3.5A
125°C
25°C
6
3
0
0.0
0.2
0.4
0.6
0.8
1.0
0
3
6
9
12
15
VSD (Volts)
Qg (nC)
Figure 7: Body-Diode Characteristics (Note E)
Figure 8: Gate-Charge Characteristics
10000
1000
100
10
5
4
3
2
1
0
Ciss
Eoss
Coss
Crss
1
0
0
0
100
200
300
VDS (Volts)
400
500
600
100
200
300
DS (Volts)
400
500
600
V
Figure 10: Coss stored Energy
Figure 9: Capacitance Characteristics
100
10
100
10
1
10µs
RDS(ON)
RDS(ON)
limited
10µs
limited
100µs
100µs
1
1ms
1ms
DC
DC
10ms
0.1s
1s
10ms
0.1
0.1
0.01
TJ(Max)=150°C
TC=25°C
TJ(Max)=150°C
TC=25°C
0.01
1
10
100
1000
1
10
100
1000
VDS (Volts)
VDS (Volts)
Figure 12: Maximum Forward Biased Safe
Figure 11: Maximum Forward Biased Safe
Operating Area for AOTF7S65 (Note F)
Operating Area for AOT(B)7S65 (Note F)
4/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
100
80
60
40
20
0
10µs
100µs
1ms
RDS(ON)
limited
10
1
DC
10ms
0.1s
1s
0.1
0.01
TJ(Max)=150°C
TC=25°C
1
10
100
1000
25
50
75
100
125
150
175
VDS (Volts)
TCASE (°C)
Figure 13: Maximum Forward Biased Safe
Operating Area for AOTF7S65L (Note F)
Figure 14: Avalanche energy
8
6
4
2
0
0
25
50
75
100
125
150
TCASE (°C)
Figure 15: Current De-rating (Note B)
5/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
1
R
θJC=1.2°C/W
0.1
PD
0.01
0.001
Single Pulse
0.0001
Ton
T
0.00001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance for AOT(B)7S65 (Note F)
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
θJC=3.6°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
R
PD
0.01
Ton
T
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 17: Normalized Maximum Transient Thermal Impedance for AOTF7S65 (Note F)
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
θJC=4.7°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
R
PD
0.01
0.001
Ton
T
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 18: Normalized Maximum Transient Thermal Impedance for AOTF7S65L (Note F)
6/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A
α
MOS TM Power Transistor
Gate Charge Test Circuit &Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Vds
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
t d(on)
t
r
t d(off)
t
f
t on
toff
Unclamped Inductive Switching (UIS) Test Circuit& Waveforms
L
2
EAR=1/2LI
AR
BVDSS
Vds
Id
Vds
+
Vgs
Vdd
IAR
Vgs
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode RecoveryTest Circuit &Waveforms
Qrr =- Idt
Vds +
Vds -
Ig
DUT
Vgs
Isd
trr
L
IF
Isd
dI/dt
+
IRM
Vdd
Vgs
VDC
Vdd
-
Vds
7/7
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