MB39C007 [FUJITSU]
2 ch DC/DC Converter IC Built-in Switching FET & voltage detection function, PFM/PWM Synchronous Rectification, and Down Conversion Support; 2通道DC / DC转换器IC内置开关FET和电压检测功能, PFM / PWM同步整流降压转换支持型号: | MB39C007 |
厂家: | FUJITSU |
描述: | 2 ch DC/DC Converter IC Built-in Switching FET & voltage detection function, PFM/PWM Synchronous Rectification, and Down Conversion Support |
文件: | 总52页 (文件大小:846K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU MICROELECTRONICS
DATA SHEET
DS04-27246-2E
ASSP for Power Management Applications
2 ch DC/DC Converter IC Built-in Switching FET &
voltagedetectionfunction,PFM/PWMSynchronous
Rectification, and Down Conversion Support
MB39C007
■ DESCRIPTION
The MB39C007 is a current mode type 2-channel DC/DC converter IC built-in voltage detection, synchronous
rectifier, and down conversion support. The device is integrated with a switching FET, oscillator, error amplifier,
PFM/PWM control circuit, reference voltage source, and voltage detection circuit.
External inductor and decoupling capacitor are needed only for the external component.
MB39C007 is small, achieve a highly effective DC/DC converter in the full load range, this is suitable as the built-
in power supply for handheld equipment such as mobile phone/PDA, DVDs, and HDDs.
■ FEATURES
• High efficiency
• Low current consumption
• Output current
: 96% (Max)
: 30 μA (At PFM/ch)
: 800 mA/ch (Max)
: 2.5 V to 5.5 V
: 2.0 MHz (Typ)
• Input voltage range
• Operating frequency
• Built-in PWM operation fixed function
• No flyback diode needed
• Low dropout operation
• Built-in high-precision reference voltage generator : 1.30 V 2%
• Consumption current in shutdown mode
• Built-in switching FET
: For 100% on duty
: 1 μA or less
: P-ch MOS 0.3 Ω (Typ) , N-ch MOS 0.2 Ω (Typ)
• High speed for input and load transient response in the current mode
• Over temperature protection
• Packaged in a compact package
: QFN-24
■ APPLICATIONS
• Flash ROMs
• MP3 players
• Electronic dictionary devices
• Surveillance cameras
• Portable GPS navigators
• DVD drives
• IP phones
• Network hubs
• Mobile phones
etc.
Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.9
MB39C007
■ PIN ASSIGNMENT
(Top View)
LX2 DGND2 DGND2 DGND1 DGND1 LX1
18
17
16
15
14
13
DVDD2
DVDD1
DVDD1
OUT1
12
11
10
9
19
20
21
22
23
24
DVDD2
OUT2
MODE2
MODE1
VREFIN2
VREFIN1
8
7
XPOR
VDET
1
2
3
4
5
6
CTLP CTL2 CTL1 AGND AVDD VREF
(LCC-24P-M09)
2
DS04-27246-2E
MB39C007
■ PIN DESCRIPTIONS
Pin No.
Pin Name
I/O
Description
Voltage detection circuit block control input pin.
(L : Voltage detection function stop / H : Normal operation)
1
CTLP
I
DC/DC converter block control input pins.
(L : Shut down / H : Normal operation)
2, 3
CTL2, CTL1
I
4
5
AGND
AVDD
⎯
⎯
O
I
Control block ground pin.
Control block power supply pin.
Reference voltage output pin.
6
VREF
7
VDET
Voltage detection input pin.
8, 23
VREFIN1, VREFIN2
I
Error amplifier (Error Amp) non-inverted input pins.
Operation mode switch pins.
(L : PFM/PWM mode / OPEN : PWM mode)
9, 22
MODE1, MODE2
I
I
10, 21
11, 12
19, 20
OUT1, OUT2
DVDD1
Output voltage feedback pins.
⎯
O
Drive block power supply pins.
DVDD2
Inductor connection output pins.
High impedance during shut down.
13, 18
LX1, LX2
14, 15
16, 17
DGND1
DGND2
⎯
O
Drive block ground pins.
VDET circuit output pin.
Connected to an N-ch MOS open drain circuit.
24
XPOR
DS04-27246-2E
3
MB39C007
■ I/O PIN EQUIVALENT CIRCUIT DIAGRAM
VDD
VDD
∗
∗
LX1, LX2
VREF
GND
VDD
GND
∗
∗
∗
∗
VREFIN1
VREFIN2
VDET
,
,
OUT1
,
OUT2
GND
VDD
CTL1, CTL2, CTLP
∗
GND
VDD
XPOR
∗
∗
∗
MODE1
MODE2
,
GND
* : ESD Protection device
GND
4
DS04-27246-2E
MB39C007
■ BLOCK DIAGRAM
VIN
AVDD
DVDD1
DVDD2
5
11, 12 19, 20
CTL1
3
ON/OFF
OUT1
10
×3
Error Amp
DVDD1
−
+
IOUT
Comp.
VREFIN1
8
9
DAC
PFM/PWM
Logic
LX1
L:PFM/PWM
OPEN:PWM
VOUT1
13
Control
MODE1
Mode
Control
VIN
VIN
CTLP
VDET
1
7
ON/OFF
24
−
+
XPOR
1.30 V
VREF
VREF
CTL2
6
2
ON/OFF
OUT2
×3
DVDD2
Error Amp
21
−
+
I
OUT
Comp.
VREFIN2
23
PFM/PWM
Logic
L:PFM/PWM
OPEN:PWM
LX2
VOUT2
18
Control
MODE2
22
Mode
Control
4
16, 17
DGND2
14, 15
DGND1
AGND
DS04-27246-2E
5
MB39C007
• Current mode
• Original voltage mode type :
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Reference triangular wave (VTRI)
• Current mode type :
Instead of the triangular wave (VTRI), the voltage (VIDET) obtained through I-V conversion of the sum of currents
that flow in the oscillator (rectangular wave generation circuit) and SW FET is used.
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Voltage (VIDET) obtained through I-V conversion of the sum of current that flow in the oscillator (rectangular
wave generation circuit) and SW FET
Voltage mode type model
Current mode type model
VIN
VIN
Oscillator
−
S
Vc
+
Vc
Q
R
+
VTRI
VIDET
−
SR-FF
Vc
VIDET
Vc
VTRI
ton
toff
toff
ton
Note : The above models illustrate the general operation and an actual operation will be preferred in the IC.
6
DS04-27246-2E
MB39C007
■ FUNCTION OF EACH BLOCK
• PFM/PWM Logic control circuit
In normal operation, frequency (2.0 MHz) which is set by the built-in oscillator (square wave oscillation circuit)
controls the built-in P-ch MOS FET and N-ch MOS FET for the synchronous rectification operation. In the light
load mode, the intermittent (PFM) operation is executed.
This circuit protects against pass-through current caused by synchronous rectification and against reverse
current caused in a non-successive operation mode.
• IOUT Comparator circuit
This circuit detects the current (ILX) which flows to the external inductor from the built-in P-ch MOS FET.
By comparing VIDET obtained through I-V conversion of peak current IPK of ILX with the Error Amp output, the built-
in P-ch MOS FET is turned off via the PFM/PWM Logic Control circuit.
• Error Amp phase compensation circuit
This circuit compares the output voltage to reference voltages such as VREF. This IC has a built-in phase
compensation circuit that is designed to optimize the operation of this IC.
This needs neither to be considered nor addition of a phase compensation circuit and an external phase
compensation device.
• VREF circuit
A high accuracy reference voltage is generated with BGR (bandgap reference) circuit. The output voltage is
1.30 V (Typ).
• Voltage Detection (VDET) circuit
The voltage detection circuit monitors the VDET pin voltage. Normally, use the XPOR pin through pull-up with
an external resistor. When the VDET pin voltage reaches 0.6 V, it reaches the H level.
Timing chart example : (XPOR pin pulled up to VIN)
VIN
VUVLO
CTLP
VTHHPR
VTHLPR
VDET
XPOR
VUVLO : UVLO threshold voltage
VTHHPR, VTHLPR : XPOR threshold voltage
• Protection circuit
This IC has a built-in over-temperature protection circuit.
The over-temperature protection circuit turns off both N-ch and P-ch switching FETs when the junction
temperature reaches + 135 °C. When the junction temperature comes down to + 110 °C, the switching FET is
returned to the normal operation. Since the PFM/PWM control circuit of this IC is in the control method in current
mode, the current peak value is also monitored and controlled as required.
DS04-27246-2E
7
MB39C007
• Function table
Input
Output
VDET
CH1
function
CH2
function
VREF
CTL1
CTL2
CTLP MODE
Switching operation
function
function
L
L
*
Stopped
H
L
Operation
Stopped
Stopped
H
L
Operation
Stopped
H
L
Operation
Stopped
L
PFM/PWM mode
H
L
L
H
H
L
H
Operation
Stopped
Operation
Operation
Stopped
Operation
Stopped
1.3 V
output
H
L
Operation
Stopped
H
L
Operation
Stopped
H
L
Operation
Stopped
Open
H
PWM fixed mode
H
L
L
H
H
Operation
Stopped
Stopped
Operation
Operation
Operation
* : Don't care
8
DS04-27246-2E
MB39C007
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Condition
Unit
Max
Min
−0.3
−0.3
Power supply voltage
VDD
AVDD = DVDD1 = DVDD2
+6.0
V
OUT1, OUT2 pins
VDD + 0.3
CTLP, CTL1, CTL2,
MODE1, MODE2 pins
−0.3
VDD + 0.3
Signal input voltage
VISIG
V
VREFIN1, VREFIN2 pins
VDET pin
−0.3
−0.3
−0.3
−0.3
VDD + 0.3
VDD + 0.3
+6.0
XPOR pull-up voltage
LX voltage
VIXPOR
VLX
XPOR pin
V
V
LX1, LX2 pins
VDD + 0.3
The upper limit value of ILX1
and ILX2
LX Peak current
IPK
⎯
1.8
A
⎯
⎯
⎯
⎯
3125*1, *2, *3
1563*1, *2, *4
1250*1, *2, *3
625*1, *2, *4
Ta ≤ +25 °C
Ta = +85 °C
mW
Power dissipation
PD
mW
Operating ambient
temperature
Ta
⎯
⎯
−40
−55
+85
°C
°C
Storage temperature
TSTG
+125
*1 : See the diagram of “■ EXAMPLE OF STANDARD OPERATION CHARACTERISTICS. Power dissipation vs.
Operating ambient temperature” for the package power dissipation of Ta from + 25 °C to + 85 °C.
*2 : When mounted on a four-layer epoxy board of 11.7 cm × 8.4 cm
*3 : IC is mounted on a four-layer epoxy board, which has thermal via, and the IC's thermal pad is connected to the
epoxy board (Thermal via is 9 holes).
*4 : IC is mounted on a four-layer epoxy board, which has no thermal via, and the IC's thermal pad is connected
to the epoxy board.
Notes: • The use of negative voltages below − 0.3 V to the AGND, DGND1, and DGND2 pin may create parasitic
transistors on LSI lines, which can cause abnormal operation.
• This device can be damaged if the LX pins are short-circuited to AVDD and DVDD1/DVDD2, or AGND and
DGND1/DGND2.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS04-27246-2E
9
MB39C007
■ RECOMMENDED OPERATING CONDITIONS
Value
Typ
3.7
⎯
Parameter
Symbol
Condition
Unit
Min
2.5
0.15
0
Max
5.5
Power supply voltage
VREFIN voltage
CTL voltage
VDD
VREFIN
VCTL
ILX
AVDD = DVDD1 = DVDD2
V
V
⎯
CTLP, CTL1, CTL2 pins
ILX1, ILX2
1.30
5.0
⎯
V
LX current
⎯
⎯
800
mA
2.5 V ≤ AVDD = DVDD1 =
⎯
⎯
⎯
⎯
0.5
1
DVDD2 < 3.0 V
VREF output current
IROUT
mA
3.0 V ≤ AVDD = DVDD1 =
DVDD2 ≤ 5.5 V
XPOR current
Inductor value
IPOR
L
⎯
⎯
⎯
⎯
⎯
1
mA
2.2
⎯
μH
Note : Theoutputcurrentfromthisdevicehasasituationtodecreaseifthepowersupplyvoltage(VIN)andtheDC/DC
converter output voltage (VOUT) differ only by a small amount. This is a result of slope compensation and will
not damage this device.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
10
DS04-27246-2E
MB39C007
■ ELECTRICAL CHARACTERISTICS
(Ta = +25 °C, AVDD = DVDD1 = DVDD2 = 3.7 V, VOUT1/VOUT2 setting value = 2.5 V, MODE1/MODE2 = 0 V)
Value
Typ
0
Sym-
bol
Parameter
Input current
Pin No.
Condition
Unit
Min
Max
+ 100 nA
IREFIN
VOUT
8, 23 VREFIN = 0.15 V to 1.3 V
− 100
VREFIN = 0.833 V,
OUT = −100 mA
Output voltage
2.45
2.50
2.55
V
2.5 V ≤ AVDD = DVDD1 =
Input stability
Load stability
LINE
LOAD
ROUT
IPK
⎯
⎯
⎯
⎯
10
10
mV
mV
MΩ
A
DVDD2 ≤ 5.5 V*1
10, 21
−100 mA ≥ OUT ≥ −800 mA
OUT pin input
impedance
OUT = 2.0 V
0.6
0.9
⎯
1.0
1.2
30
1.5
1.7
⎯
LX Peak current
Output shorted to GND
PFM/PWM
switch current
IMSW
⎯
mA
13, 18
DC/DC
converter
block
Oscillation
frequency
fosc
tPG
⎯
1.6
⎯
⎯
⎯
⎯
2.0
45
2.4
80
MHz
μs
2, 3, C1/C2 = 4.7 μF, OUT = 0 A,
10, 21 OUT1/OUT2 : 0 → 90% VOUT
Rise delay time
SW NMOS-FET
OFF voltage
VNOFF
RONP
RONN
⎯
− 10*
0.30
0.20
⎯
mV
Ω
SW PMOS-FET
ON resistance
LX1/LX2 = −100 mA
0.48
13, 18
SW NMOS-FET
ON resistance
LX1/LX2 = −100 mA
0.42
Ω
ILEAKM
ILEAKH
TOTPH
TOTPL
0 ≤ LX ≤ VDD*2
VDD = 5.5 V, 0 ≤ LX ≤ VDD*2
− 1.0
− 2.0
⎯
⎯
+ 8.0
μA
LX leak current
+ 16.0 μA
Overheating
protection
(Junction Temp.)
+ 120* + 135* + 160* °C
⎯
⎯
+ 95*
+ 110* + 125* °C
Protection
circuit
block
VTHHUV
VTHLUV
2.17
2.03
2.30
2.15
2.43
2.27
V
V
UVLO threshold
voltage
⎯
⎯
⎯
⎯
5, 11,
12, 19,
20
UVLO
hysteresis width
VHYSUV
0.08
0.15
0.25
V
VTHHPR
VTHLPR
575
558
600
583
625
608
mV
mV
XPOR threshold
voltage
7
Voltage
XPOR
VHYSPR
VOL
⎯
⎯
⎯
17
⎯
⎯
⎯
mV
V
detection hysteresis width
circuit
block
XPOR output
voltage
XPOR = 25 μA
XPOR = 5.5 V
0.1
1.0
24
XPOR output
current
IOH
μA
* : This value is not be specified. This should be used as a reference to support designing the circuits.
(Continued)
DS04-27246-2E
11
MB39C007
(Continued)
(Ta = +25 °C, AVDD = DVDD1 = DVDD2 = 3.7 V, VOUT1/VOUT2 setting value = 2.5 V, MODE1/MODE2 = 0 V)
Value
Parameter
Symbol Pin No.
Condition
Unit
Min
0.55
0.40
Typ
0.95
0.80
Max
1.45
1.30
VTHHCT
⎯
⎯
V
V
CTL threshold
voltage
Control
block
VTHLCT
1, 2, 3
CTL pin
input current
0 V ≤ CTLP/CTL1/CTL2 ≤
IICTL
⎯
⎯
1.0
μA
V
3.7 V
VREF voltage
VREF
VREF = 0 A
1.274 1.300 1.326
Reference
voltage
block
6
VREF Load
stability
LOADREF
VREF = −1.0 mA
⎯
⎯
⎯
⎯
20
mV
CTLP/CTL1/CTL2 = 0 V,
IVDD1
1.0
μA
μA
State of all circuits OFF*3
Shut down
power supply
current
CTLP/CTL1/CTL2 = 0 V,
VDD = 5.5 V,
IVDD1H
⎯
⎯
1.0
State of all circuits OFF*3
1. CTLP = 0 V,CTL1 = 3.7 V,
CTL2 = 0 V
2. CTLP = 0 V, CTL1 = 0 V,
CTL2 = 3.7 V, OUT = 0 A
Power supply
current at DC/DC
operation 1
IVDD21
⎯
⎯
30
50
48
80
μA
μA
(PFM mode)
CTLP = 0 V, CTL1/CTL2 =
3.7 V, OUT = 0 A
IVDD22
1. CTLP = 0 V, CTL1 = 3.7 V,
CTL2 = 0 V, MODE1/
MODE2 = OPEN
5, 11,
12, 19,
20
IVDD31
2. CTLP = 0 V, CTL1 = 0 V,
CTL2 = 3.7 V, MODE1/
MODE2 = OPEN,
⎯
3.5
10.0 mA
General
Power supply
current at DC/DC
operation 2
OUT = 0 A
(PWM mode)
CTLP = 0 V, CTL1/CTL2 =
3.7 V,
IVDD32
IVDD5
IVDD
⎯
⎯
⎯
7.0
15
20.0 mA
MODE1/MODE2 = OPEN,
OUT = 0 A
Power supply
current
(voltagedetection
mode)
CTLP = 3.7 V,
CTL1/CTL2 = 0 V
24
μA
1. CTL1 = 3.7 V, CTL2 = 0 V
2. CTL1 = 0 V, CTL2 = 3.7 V,
VOUT1/VOUT2 = 90%,
OUT = 0 A*4
Power-on
invalid current
1000 2000 μA
*1 : The minimum value of AVDD = DVDD1 = DVDD2 is the 2.5 V or VOUT setting value + 0.6 V, whichever is higher.
*2 : The + leak at the LX pin includes the current of the internal circuit.
*3 : Sum of the current flowing into the AVDD, the DVDD1, and the DVDD2 pins.
*4 : Currentconsumptionbasedon100%ON-duty(HighsideFETinfullONstate). TheSWFETgatedrivecurrentis
not included because the device is in full ON state (no switching operation). Also the load current is not included.
12
DS04-27246-2E
MB39C007
■ TEST CIRCUIT FOR MEASURING TYPICAL OPERATING CHARACTERISTICS
MB39C007
VDD
VDD
SW
DVDD1/DVDD2
CTL1/CTL2
VIN
R1
1 MΩ
C2
4.7 µF
SW
AVDD
C3
0.1 µF
MODE1/MODE2
L1
2.2 µH
VOUT1/
VOUT2
LX1/LX2
VREF
VDET
R5
R3-1
20 kΩ
510 kΩ
OUT1/OUT2
R6
100 kΩ
IOUT
C1
R3-2
150 kΩ
DGND1/DGND2
VREFIN1/VREFIN2
4.7µF
AGND
GND
R4
300 kΩ
C6
0.1 µF
VOUT = 2.97 × VREFIN
Component
Specification
Vendor
Part Number
Remarks
R1
1 MΩ
KOA
RK73G1JTTD D 1 MΩ
R3-1
R3-2
20 kΩ
SSM
SSM
RR0816-203-D
RR0816-154-D
VOUT1/VOUT2 = 2.5 V
150 kΩ
Setting
R4
R5
R6
C1
C2
C3
C6
L1
300 kΩ
510 kΩ
100 kΩ
4.7 μF
4.7 μF
0.1 μF
0.1 μF
2.2 μH
SSM
KOA
SSM
TDK
TDK
TDK
TDK
TDK
RR0816-304-D
RK73G1JTTD D 510 kΩ
RR0816-104-D
C2012JB1A475K
C2012JB1A475K
C1608JB1E104K
C1608JB1H104K
VLF4012AT-2R2M
For adjusting slow start time
Note : These components are recommended based on the operating tests authorized.
TDK : TDK Corporation
SSM : SUSUMU Co., Ltd
KOA : KOA Corporation
DS04-27246-2E
13
MB39C007
■ APPLICATION NOTES
[1] Selection of components
• Selection of an external inductor
Basically it dose not need to design inductor. This IC is designed to operate efficiently with a 2.2 μH external
inductor.
The inductor should be rated for a saturation current higher than the LX peak current value during normal
operating conditions, and should have a minimal DC resistance. (100 mΩ or less is recommended.)
LX peak current value IPK is obtained by the following formula.
VIN − VOUT
D
1
2
(VIN − VOUT) × VOUT
2 × L × fosc × VIN
IPK = IOUT +
×
×
= IOUT +
L
fosc
L
: External inductor value
: Load current
IOUT
VIN
: Power supply voltage
VOUT : Output setting voltage
: ON-duty to be switched ( = VOUT/VIN)
fosc : Switching frequency (2 MHz)
D
ex) When VIN = 3.7 V, VOUT = 2.5 V, IOUT = 0.8 A, L = 2.2 μH, fosc = 2.0 MHz
The maximum peak current value IPK is obtained by the following formula.
(VIN − VOUT) × VOUT
(3.7 V − 2.5 V) × 2.5 V
IPK = IOUT +
= 0.8 A +
=: 0.89 A
2 × L × fosc × VIN
2 × 2.2 μH × 2.0 MHz × 3.7 V
• I/O capacitor selection
• Select a low equivalent series resistance (ESR) for the VDD input capacitor to suppress dissipation from ripple
currents.
• Also select a low equivalent series resistance (ESR) for the output capacitor. The variation in the inductor
current causes ripple currents on the output capacitor which, in turn, causes ripple voltages an output equal
to the amount of variation multiplied by the ESR value. The output capacitor value has a significant impact on
the operating stability of the device when used as a DC/DC converter. Therefore, FUJITSU MICROELEC-
TRONICS generally recommends a 4.7 μF capacitor, or a larger capacitor value can be used if ripple voltages
are not suitable. If the VIN/VOUT voltage difference is within 0.6 V, the use of a 10 μF output capacitor value is
recommended.
• Types of capacitors
Ceramic capacitors are effective for reducing the ESR and afford smaller DC/DC converter circuit. However,
power supply functions as a heat generator, therefore avoid to use capacitor with the F-temperature rating
( − 80% to + 20%) . FUJITSU MICROELECTRONICS recommends capacitors with the B-temperature rating
(
10% to 20%).
Normal electrolytic capacitors are not recommended due to their high ESR.
Tantalum capacitor will reduce ESR, however, it is dangerous to use because it turns into short mode when
damaged. If you insist on using a tantalum capacitor, FUJITSU MICROELECTRONICS recommends the type
with an internal fuse.
14
DS04-27246-2E
MB39C007
[2] Output voltage setting
The output voltage VOUT (VOUT1 or VOUT2) of this IC is defined by the voltage input to VREFIN (VREFIN1 or
VREFIN2) . Supply the voltage for inputting to VREFIN from an external power supply, or set the VREF output
by dividing it with resistors.
The output voltage when the VREFIN voltage is set by dividing the VREF voltage with resistors is obtained by
the following formula.
R2
VOUT = 2.97 × VREFIN, VREFIN =
× VREF
R1 + R2
(VREF = 1.30 V)
MB39C007
VREF
VREF
R1
VREFIN
VREFIN
R2
Note : Refer to “■ APPLICATION CIRCUIT EXAMPLES” for the an example of this circuit.
Although the output voltage is defined according to the dividing ratio of resistance, select the resistance value
so that the current flowing through the resistance does not exceed the VREF current rating (1 mA) .
DS04-27246-2E
15
MB39C007
[3] About conversion efficiency
The conversion efficiency can be improved by reducing the loss of the DC/DC converter circuit.
The total loss (PLOSS) of the DC/DC converter is roughly divided as follows :
PLOSS = PCONT + PSW + PC
PCONT : Control system circuit loss (The power used for this IC to operate, including the gate driving power for
internal SW FETs)
PSW
PC
: Switching loss (The loss caused during switching of the IC's internal SW FETs)
: Continuity loss (The loss caused when currents flow through the IC's internal SW FETs and external
circuits )
The IC's control circuit loss (PCONT) is extremely small, less than 100 mW* (with no load).
As the IC contains FETs which can switch faster with less power, the continuity loss (PC) is more predominant
as the loss during heavy-load operation than the control circuit loss (PCONT) and switching loss (PSW) .
Furthermore, the continuity loss (PC) is divided roughly into the loss by internal SW FET ON-resistance and by
external inductor series resistance.
2
PC = IOUT × (RDC + D × RONP + (1 − D) × RONN)
D
: Switching ON-duty cycle ( = VOUT / VIN)
: Internal P-ch SW FET ON resistance
: Internal N-ch SW FET ON resistance
: External inductor series resistance
: Load current
RONP
RONN
RDC
IOUT
The above formula indicates that it is important to reduce RDC as much as possible to improve efficiency by
selecting components.
* : The loss in the successive operation mode. This IC suppresses the loss in order to execute the PFM operation
in the low load mode (less than 100 μA in no load mode). Mode is changed by the current peak value IPK which
flows into switching FET. The threshold value is about 30 mA.
16
DS04-27246-2E
MB39C007
[4] Power dissipation and heat considerations
The IC is so efficient that no consideration is required in most cases. However, if the IC is used at a low power
supply voltage, heavy load, high output voltage, or high temperature, it requires further consideration for higher
efficiency.
The internal loss (P) is roughly obtained from the following formula :
2
P = IOUT × (D × RONP + (1 − D) × RONN)
D
: Switching ON-duty cycle ( = VOUT / VIN)
: Internal P-ch SW FET ON resistance
: Internal N-ch SW FET ON resistance
: Output current
RONP
RONN
IOUT
The loss expressed by the above formula is mainly continuity loss. The internal loss includes the switching loss
and the control circuit loss as well but they are so small compared to the continuity loss they can be ignored.
In this IC with RONP greater than RONN, the larger the on-duty cycle, the greater the loss.
When assuming VIN = 3.7 V, Ta = + 70 °C, for example, RONP = 0.36 Ω and RONN = 0.30 Ω according to the
graph “MOS FET ON resistance vs. Operating ambient temperature”. The IC's internal loss P is 123 mW at
VOUT = 2.5 V and IOUT = 0.6 A. According to the graph “Power dissipation vs. Operating ambient temperature”,
the power dissipation at an operating ambient temperature Ta of + 70 °C is 300 mW and the internal loss is
smaller than the power dissipation.
DS04-27246-2E
17
MB39C007
[5] XPOR threshold voltage setting [VPORH, VPORL]
Set the detection voltage by applying voltage to the VDET pin via an external resistor calculated according to
this formula.
R3 + R4
VPORH =
× VTHHPR
× VTHLPR
R4
R3 + R4
R4
VPORL =
VTHHPR = 0.600 V
VTHLPR = 0.583 V
Example for setting detection voltage to 3.7 V
R3 = 510 kΩ
R4 = 100 kΩ
510 kΩ + 100 kΩ
VPORH =
× 0.600 = 3.66=: 3.7 [V]
100 kΩ
510 kΩ + 100 kΩ
100 kΩ
VPORL =
× 0.583 = 3.56=: 3.6 [V]
VIN
MB39C007
AVDD
R3
1 MΩ
VDET
XPOR
R4
XPOR
18
DS04-27246-2E
MB39C007
[6] Transient response
Normally, IOUT is suddenly changed while VIN and VOUT are maintained constant, responsiveness including the
response time and overshoot/undershoot voltage is checked. As this IC has built-in Error Amp with an optimized
design, it shows good transient response characteristics. However, if ringing upon sudden change of the load
is high due to the operating conditions, add capacitor C6 (e.g. 0.1 μF). (Since this capacitor C6 changes the
start time, check the start waveform as well.) This action is not required for DAC input.
MB39C007
VREF
VREF
R1
VREFIN
VREFIN1/
VREFIN2
R2
C6
DS04-27246-2E
19
MB39C007
[7] Board layout, design example
The board layout needs to be designed to ensure the stable operation of this IC.
Follow the procedure below for designing the layout.
• Arrange the input capacitor (Cin) as close as possible to both the VDD and GND pins. Make a through-hole
(TH) near the pins of this capacitor if the board has planes for power and GND.
• Large AC currents flow between this IC and the input capacitor (Cin), output capacitor (Co), and external
inductor (L). Group these components as close as possible to this IC to reduce the overall loop area occupied
by this group. Also try to mount these components on the same surface and arrange wiring without through-
hole wiring. Use thick, short, and straight routes to wire the net (The layout by planes is recommended.).
• Arrange a bypass capacitor for AVDD as close as possible to both the ADVV and AGND pins. Make a
through-hole (TH) near the pins of this capacitor if the board has planes for power and GND.
• The feedback wiring to the OUT should be wired from the voltage output pin closest to the output capacitor
(Co). The OUT pin is extremely sensitive and should thus be kept wired away from the LX pin of this IC as far
as possible.
• If applying voltage to the VREFIN1/VREFIN2 pins through dividing resistors, arrange the resistors so that the
wiring can be kept as short as possible. Also arrange them so that the GND pin of VREFIN1/VREFIN2 resistor
is close to the IC's AGND pin. Further, provide a GND exclusively for the control line so that the resistor can
be connected via a path that does not carry current. If installing a bypass capacitor for the VREFIN, put it close
to the VREFIN pin.
• If applying voltage to the VDET pin through dividing resistors, arrange the resistors so that the wiring can be
kept as short as possible. Also arrange so that the GND pin of the VDET resistor is close to the IC's AGND
pin. Further, provide a GND exclusively for the control line so that the resistor can be connected via a path
that does not carry current.
• Try to make a GND plane on the surface to which this IC will be mounted. For efficient heat dissipation when
using the QFN-24 package, FUJITSU MICROELECTRONICS recommends providing a thermal via in the
footprint of the thermal pad.
• Example of arranging IC SW system parts
Co
Co
L
L
GND
Cin
Cin
VIN
VIN
Feedback line
Feedback line
1pin
GND
VIN
AVDD bypass capacitor
20
DS04-27246-2E
MB39C007
• Notes for circuit design
The switching operation of this IC works by monitoring and controlling the peak current which, incidentally,
serves as a form of short-circuit protection. However, do not leave the output short-circuited for long periods of
time. If the output is short-circuited where VIN < 2.9 V, the current limit value (peak current to the inductor) tends
to rise. Leaving in the short-circuit state, the temperature of this IC will continue rising and activate the thermal
protection.
Once the thermal protection stops the output, the temperature of the IC will go down and operation will be
restarted, after which the output will repeat the starting and stopping.
Although this effect will not destroy the IC, the thermal exposure to the IC over prolonged hours may affect the
peripherals surrounding it.
DS04-27246-2E
21
MB39C007
■ EXAMPLE OF STANDARD OPERATION CHARACTERISTICS
(Shown below is an example of characteristics for connection according to “■ TEST CIRCUIT FOR MEASURING
TYPICAL OPERATING CHARACTERISTICS”.)
• Characteristics CH1
Conversion efficiency vs. Load current
Conversion efficiency vs. Load current
(PFM/PWM mode)
(PFM/PWM mode)
100
100
90
80
70
60
50
VIN = 3.7 V
VIN = 3.7 V
VIN = 3.0 V
90
VIN = 3.0 V
80
VIN = 4.2 V
VIN = 5.0 V
70
60
50
V
IN = 4.2 V
Ta = +25°C
Ta = +25°C
OUT = 1.2 V
VOUT = 2.5 V
MODE = L
V
VIN = 5.0 V
MODE = L
1
10
100
1000
1
10
100
1000
Load current IOUT (mA)
Load current IOUT (mA)
Conversion efficiency vs. Load current
(PFM/PWM mode)
Conversion efficiency vs. Load current
(PFM/PWM mode)
100
90
80
70
60
50
100
90
80
70
60
50
V
IN = 3.7 V
V
IN = 3.7 V
V
IN = 3.0 V
V
IN = 4.2 V
V
V
IN = 4.2 V
IN = 5.0 V
V
IN = 5.0 V
Ta = +25°C
Ta = +25°C
OUT = 3.3 V
MODE = L
V
OUT = 1.8 V
V
1
10
100
1000
1
10
100
1000
Load current IOUT (mA)
Load current IOUT (mA)
(Continued)
22
DS04-27246-2E
MB39C007
Conversion efficiency vs. Load current
Conversion efficiency vs. Load current
(PWM fixed mode)
(PWM fixed mode)
100
100
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
V
IN = 3.0 V
V
IN = 3.7 V
V
IN = 3.0 V
V
IN = 3.7 V
V
IN = 4.2 V
V
IN = 4.2 V
V
IN = 5.0 V
V
IN = 5.0 V
Ta = +25°C
OUT = 1.2 V
Ta = +25°C
OUT = 2.5 V
MODE = OPEN
V
V
MODE = OPEN
1
10
100
1000
1
10
100
1000
Load current IOUT (mA)
Load current IOUT (mA)
Conversion efficiency vs. Load current
(PWM fixed mode)
Conversion efficiency vs. Load current
(PWM fixed mode)
100
100
V
IN = 3.7 V
V
IN = 3.7 V
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
V
IN = 3.0 V
V
IN = 4.2 V
V
IN = 4.2 V
V
IN = 5.0 V
V
IN = 5.0 V
Ta = +25°C
VOUT = 3.3 V
MODE = OPEN
Ta = +25°C
OUT = 1.8 V
MODE = OPEN
V
1
10
100
1000
1
10
100
1000
Load current IOUT (mA)
Load current IOUT (mA)
(Continued)
DS04-27246-2E
23
MB39C007
Output voltage vs. Input voltage
(PFM/PWM mode)
Output voltage vs. Input voltage
(PWM fixed mode)
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
Ta = +25°C
Ta = +25°C
OUT = 2.5 V
MODE = L
V
OUT = 2.5 V
V
MODE = OPEN
I
OUT = 0 A
I
OUT = 0 A
I
OUT = -100 mA
I
OUT = -100 mA
2.0
3.0
4.0
5.0
6.0
2.0
3.0
4.0
5.0
6.0
Input voltage VIN (V)
Input voltage VIN (V)
Output voltage vs. Load current
(PWM fixed mode)
Output voltage vs. Load current
(PFM/PWM mode)
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
Ta = +25°C
VIN = 3.7 V
VOUT = 2.5 V
MODE = OPEN
Ta = +25°C
V
V
IN = 3.7 V
OUT = 2.5 V
MODE = L
0
200
400
600
800
0
200
400
600
800
Load current IOUT (mA)
Load current IOUT (mA)
(Continued)
24
DS04-27246-2E
MB39C007
Reference voltage vs.
Operating ambient temperature
Reference voltage vs. Input voltage
1.40
1.38
1.36
1.34
1.32
1.30
1.28
1.26
1.24
1.22
1.20
1.40
1.38
1.36
1.34
1.32
1.30
1.28
1.26
1.24
1.22
1.20
Ta = +25°C
V
V
IN = 3.7 V
OUT = 2.5 V
V
OUT = 2.5 V
I
OUT = 0 A
I
I
OUT = 0 A
OUT = -100 mA
2.0
3.0
4.0
5.0
6.0
-50
0
+50
+100
Input voltage VIN (V)
Operating ambient temperature Ta ( °C)
Input current vs. Input voltage
(PWM fixed mode)
Input current vs. Input voltage
(PFM/PWM mode)
10
50
45
40
35
30
25
20
15
10
5
9
8
7
6
5
4
3
2
1
0
Ta = +25°C
Ta = +25°C
OUT = 2.5 V
MODE = OPEN
V
OUT = 2.5 V
V
MODE = L
0
2.0
3.0
4.0
5.0
6.0
2.0
3.0
4.0
5.0
6.0
Input voltage VIN (V)
Input voltage VIN (V)
(Continued)
DS04-27246-2E
25
MB39C007
Input current vs. Operating ambient temperature
(PFM/PWM mode)
Input current vs. Operating ambient temperature
(PWM fixed mode)
50
45
40
35
30
25
20
10
9
8
7
6
5
4
V
IN = 3.7 V
15
10
5
3
2
1
0
V
V
IN = 3.7 V
OUT = 2.5 V
VOUT = 2.5 V
MODE = L
MODE = OPEN
0
-50
0
+50
+100
+100
-50
0 +50
Operating ambient temperature Ta ( °C)
Operating ambient temperature Ta ( °C)
Oscillation frequency vs.
Operating ambient temperature
Oscillation frequency vs.
Power supply voltage
2.4
2.4
V
IN = 3.7 V
Ta = +25°C
OUT = 1.8 V
OUT = -100 mA
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
VOUT = 2.5 V
V
I
I
OUT = -100 mA
-50
0
+50
+100
2.0
3.0
4.0
5.0
6.0
Operating ambient temperature Ta ( °C)
Power supply voltage VIN (V)
(Continued)
26
DS04-27246-2E
MB39C007
P-ch MOS FET ON resistor vs.
Operating ambient temperature
MOS FET ON resistor vs. Input voltage
0.6
0.6
0.5
0.4
0.3
0.2
0.1
0
V
IN = 3.7 V
0.5
0.4
0.3
0.2
0.1
0
P-ch
V
IN = 5.5 V
N-ch
Ta = +25°C
5.0
-50
0
+50
+100
2.0
3.0
4.0
6.0
Input voltage VIN (V)
Operating ambient temperature Ta ( °C)
N-ch MOS FET
ON resistor vs. Operating ambient temperature
0.6
0.5
V
IN = 3.7 V
0.4
0.3
0.2
0.1
0
V
IN = 5.5 V
-50
0
+50
+100
Operating ambient temperature Ta ( °C)
(Continued)
DS04-27246-2E
27
MB39C007
MODE VTH vs. Input voltage
CTL VTH vs. Input voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V
THHCT
V
THLCT
V
THMMD
Ta = +25°C
OUT = 2.5 V
V
Ta = +25°C
VTHHCT : Circuit OFF→ON
VTHLCT : Circuit ON→OFF
VTHLMD
V
OUT = 2.5 V
2.0
3.0
4.0
5.0
6.0
6.0
2.0
3.0
4.0
5.0
Input voltage VIN (V)
Input voltage VIN (V)
VXPOR vs. Input voltage
6.0
5.0
4.0
3.0
2.0
1.0
0.0
Ta = +25°C
VPORL
VPORH
2.0
3.0
4.0
5.0
6.0
Input voltage VIN (V)
(Continued)
28
DS04-27246-2E
MB39C007
(Continued)
Power dissipation vs.
Operating ambient temperature
(with thermal via)
Power dissipation vs.
Operating ambient temperature
(without thermal via)
3500
3500
3000
2500
2000
1500
1000
500
3125
3000
2500
2000
1500
1000
500
1563
1250
625
0
0
+85
+85
-50
0
+50
+100
-50
0
+50
+100
Operating ambient temperature Ta ( °C)
Operating ambient temperature Ta ( °C)
DS04-27246-2E
29
MB39C007
• Switching waveform
PFM/PWM operation
2 μs/div
2 μs/div
VO2 : 20 mV/div (AC)
VO1 : 20 mV/div (AC)
1
1
V
LX2 : 2.0 V/div
V
LX1 : 2.0 V/div
2
2
lLX2 : 500 mA/div
lLX1 : 500 mA/div
4
4
VIN = 3.7 V, IO1 = −5 mA, VO1 = 2.5 V, MODE = L ,Ta = +25 °C
VIN = 3.7 V, IO2 = −5 mA, VO2 = 1.8 V, MODE = L ,Ta = +25 °C
PWM operation
2 μs/div
2 μs/div
VO1 : 20 mV/div (AC)
VO2 : 20 mV/div(AC)
1
1
VLX1 : 2.0 V/div
VLX2 : 2.0 V/div
2
2
lLX1 : 500 mA/div
lLX2 : 500 mA/div
4
4
V
IN = 3.7 V, VO1 = 2.5 V, IO1 = −800 mA, MODE = L ,Ta = +25 °C
VIN = 3.7 V, VO2 = 1.8 V, IO2 = −800 mA, MODE = L ,Ta = +25 °C
30
DS04-27246-2E
MB39C007
• Output waveforms at sudden load changes
0 A ←→ − 800 mA
100 μs/div
100 μs/div
VO1 : 200 mV/div
VO2 : 200 mV/div
1
1
2
V
LX1 : 2.0 V/div
2
V
LX2 : 2.0 V/div
−800 mA
−800 mA
lO2 : 1 A/div
lO1 : 1 A/div
4
4
0 A
IN = 3.7 V, VO2 = 1.8 V, MODE = L ,Ta = +25 °C
0 A
IN = 3.7 V, VO1 = 2.5 V, MODE = L ,Ta = +25 °C
V
V
− 20 mA ←→ − 800 mA
100 μs/div
100 μs/div
V
O1 : 200 mV/div
V
O2 : 200 mV/div
1
1
2
V
LX1 : 2.0 V/div
2
V
LX2 : 2.0 V/div
800 mA
800 mA
lO2 : 1 A/div
lO1 : 1 A/div
4
4
20 mA
IN = 3.7 V, VO2 = 1.8 V, MODE = L ,Ta = +25 °C
20 mA
IN = 3.7 V, VO1 = 2.5 V, MODE = L ,Ta = +25 °C
V
V
− 100 mA ←→ − 800 mA
100 μs/div
V
O1 : 200 mV/div
100 µs/div
VO2 : 200 mV/div
1
1
2
V
LX1 : 2.0 V/div
2
VLX2 : 2.0 V/div
lO2 : 1 A/div
lO1 : 1 A/div
800 mA
800 mA
4
4
100 mA
100 mA
VIN = 3.7 V, VO2 = 1.8 V, MODE = L ,Ta = +25 °C
V
IN = 3.7 V, VO1 = 2.5 V, MODE = L ,Ta = +25 °C
DS04-27246-2E
31
MB39C007
• CTL start-up waveform
No load, No VREFIN capacitor
10 μs/div
10 μs/div
1
3
CTL2 : 5 V/div
CTL1 : 5 V/div
VO2 : 1 V/div
VO1 : 1 V/div
2
3
1
2
VLX2 : 5 V/div
VLX1 : 5 V/div
I
LX1 : 1 A/div
ILX2 : 1 A/div
4
4
VIN = 3.7 V, VO2 = 1.8 V, MODE = L, Ta = + 25 °C
V
IN = 3.7 V, VO1 = 2.5 V, MODE = L, Ta = + 25 °C
Maximum load, No VREFIN capacitor
10 μs/div
10 μs/div
1
3
CTL1 : 5 V/div
CTL2 : 5 V/div
VO2 : 1 V/div
VO1 : 1 V/div
1
2
3
VLX2 : 5 V/div
VLX1 : 5 V/div
2
ILX1 : 1 A/div
ILX2 : 1 A/div
4
4
VIN = 3.7 V, VO2 = 1.8 V, IO2 = −800 mA, MODE = L, Ta = + 25 °C
VIN = 3.7 V, VO1 = 2.5 V, IO1 = −800 mA, MODE = L, Ta = + 25 °C
(Continued)
32
DS04-27246-2E
MB39C007
(Continued)
No load, VREFIN capacitor = 0.1 μF
1 ms/div
1 ms/div
1
1
CTL2 : 5 V/div
CTL1 : 5 V/div
V
O2 : 1 V/div
2
3
VO1 : 1 V/div
VLX1 : 5 V/div
V
LX2 : 5 V/div
2
3
ILX1 : 1 A/div
I
LX2 : 1 A/div
4
4
VIN = 3.7 V, VO1 = 2.5 V
,
MODE = L, Ta = + 25 °C
V
IN = 3.7 V, VO2 = 1.8 V
,
MODE = L, Ta = + 25 °C
Maximum load, VREFIN capacitor = 0.1 μF
1 ms/div
1 ms/div
1
1
CTL2 : 5 V/div
CTL1 : 5 V/div
VO1 : 1 V/div
2
3
4
VLX1 : 5 V/div
VO2 : 1 V/div
V
LX2 : 5 V/div
2
3
I
LX1 : 1 A/div
I
LX2 : 1 A/div
4
VIN = 3.7 V, VO1 = 2.5 V, IO1 = −800 mA, MODE = L, Ta = + 25 °C
V
IN = 3.7 V, VO2 = 1.8 V, IO2 = −800 mA, MODE = L, Ta = + 25 °C
• CTL stop waveform
Maximum load, VREFIN capacitor = 0.1 μF
10 μs/div
10 μs/div
CTL2 : 5 V/div
CTL1 : 5 V/div
1
1
VO1 : 1 V/div
V
O2 : 1 V/div
2
3
2
3
VLX1 : 5 V/div
V
LX2 : 5 V/div
ILX1 : 1 A/div
ILX2 : 1 A/div
4
4
VIN = 3.7 V, VO1 = 2.5 V, IO1 = −800 mA, MODE = L, Ta = + 25 °C
V
IN = 3.7 V, VO2 = 1.8 V, IO2 = −800 mA, MODE = L, Ta = + 25 °C
DS04-27246-2E
33
MB39C007
• Current limitation waveform
100 μs/div
100 μs/div
VO1 : 1 V/div
VO2 : 1 V/div
1
1
1.5 A
1.5 A
ILX1 : 1 A/div
ILX2 : 1 A/div
600 mA
600 mA
4
4
V
IN = 3.7 V
,
V
O1 = 2.5 V
,
MODE = OPEN
,
Ta = +25 °C
V
IN = 3.7 V
,
V
O2 = 1.8 V
,
MODE = OPEN
,
Ta = +25 °C
• Voltage detection waveform
1 ms/div
1
VIN : 3 V/div
2
VVDET : 1 V/div
VXPOR : 3 V/div
3
VIN = 3.7 V
Pull-up XPOR to VIN at 1 kΩ.
, CTLP = VIN, Ta = +25 °C
• Waveform of dynamic output voltage transition (VO1 1.8 V←→2.5 V)
10 μs/div
VO1 : 200 mV/div
2.5 V
1.8 V
1
V
VREFIN1 : 200 mV/div
840 mV
3
610 mV
V
IN = 3.7 V
,
l
O1 = −800 mA
, −576 mA ( 3.125 Ω),
MODE = L
,
Ta = +25 °C No VREFIN capacitor
,
34
DS04-27246-2E
MB39C007
■ APPLICATION CIRCUIT EXAMPLES
• APPLICATION CIRCUIT EXAMPLE 1
• An external voltage is input to the reference voltage external input (VREFIN1, VREFIN2) , and the VOUT voltage
is set to 2.97 times the VOUT setting gain.
MB39C007
C3
VIN
4.7 μF
11
12
DVDD1
3
CTL1
CPU
R7
DGND1 14
15
1 MΩ
C4
4.7 μF
19
20
DVDD2
DGND2
8
2
16
17
VREFIN1
CTL2
DAC1
5
4
AVDD
AGND
C5
0.1 μF
R8
1 MΩ
L1
2.2 μH
23
VREFIN2
DAC2
VOUT1
13
10
LX1
C1
4.7 μF
OUT1
APLI1
9
MODE1
MODE2
L = PFM/PWM
OPEN = PWM
L2
2.2 μH
22
VOUT2
18
21
LX2
C2
6
VREF
4.7 μF
OUT2
APLI2
7
1
VDET
CTLP
24
XPOR
VOUT = 2.97 × VREFIN
DS04-27246-2E
35
MB39C007
• APPLICATION CIRCUIT EXAMPLE 2
• The voltage of VREF pin is input to the reference voltage external input (VREFIN1, VREFIN2) by dividing
resistors. The VOUT1 voltage is set to 2.5 V and VOUT2 voltage is set to 1.8 V.
MB39C0007
C3
VIN
4.7 μF
11
12
DVDD1
3
CTL1
CPU
R7
DGND1 14
15
1 MΩ
C4
4.7 μF
19
20
DVDD2
DGND2
R1 163 kΩ
( 13 kΩ + 150 kΩ )
16
17
8
2
VREFIN1
R2
300 kΩ
5
4
AVDD
AGND
C5
0.1 μF
CTL2
R8
1 MΩ
L1
2.2 μH
VOUT1
13
10
LX1
R5 343 kΩ
( 13 kΩ + 330 kΩ )
C1
23
VREFIN2
4.7 μF
OUT1
R6
APLI1
300 kΩ
6
9
VREF
L2
2.2 μH
VOUT2
18
21
LX2
MODE1
L = PFM/PWM
OPEN = PWM
C2
4.7 μF
22
7
MODE2
VDET
OUT2
APLI2
1
CTLP
XPOR 24
VOUT1 = 2.97 × VREFIN1
R2
VREFIN1 =
× VREF
R1 + R2
(VREF = 1.30 V)
300 kΩ
163 kΩ + 300 kΩ
VOUT1 = 2.97 ×
× 1.30 V = 2.5 V
× 1.30 V = 1.8 V
300 kΩ
343 kΩ + 300 kΩ
VOUT2 = 2.97 ×
36
DS04-27246-2E
MB39C007
• APPLICATION CIRCUIT EXAMPLE COMPONENTS LIST
Component
Item
Part Number
VLF4012AT-2R2M
MIPW3226D2R2M
VLF4012AT-2R2M
MIPW3226D2R2M
C2012JB1A475K
C2012JB1A475K
C2012JB1A475K
C2012JB1A475K
C1608JB1E104K
Specification
2.2 μH, RDC = 76 mΩ
2.2 μH, RDC = 100 mΩ
2.2 μH, RDC = 76 mΩ
2.2 μH, RDC = 100 mΩ
4.7 μF (10 V)
Package Vendor
SMD
SMD
SMD
SMD
2012
2012
2012
2012
2012
TDK
FDK
TDK
FDK
TDK
TDK
TDK
TDK
TDK
L1
Inductor
Inductor
L2
C1
C2
C3
C4
C5
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
4.7 μF (10 V)
4.7 μF (10 V)
4.7 μF (10 V)
0.1 μF (50 V)
RK73G1JTTD D 13 kΩ 13 kΩ
RK73G1JTTD D 150 kΩ 150 kΩ
1608
1608
KOA
KOA
R1
R2
R5
Resistor
Resistor
Resistor
RK73G1JTTD D 300 kΩ 300 kΩ
1608
KOA
RK73G1JTTD D 13 kΩ 13 kΩ
RK73G1JTTD D 330 kΩ 330 kΩ
1608
1608
KOA
KOA
R6
R7
R8
Resistor
Resistor
Resistor
RK73G1JTTD D 300 kΩ 300 kΩ
1608
1608
1608
KOA
KOA
KOA
RK73G1JTTD D 1 MΩ 1 MΩ 0.5%
RK73G1JTTD D 1 MΩ 1 MΩ 0.5%
TDK : TDK Corporation
FDK : FDK Corporation
KOA : KOA Corporation
DS04-27246-2E
37
MB39C007
■ USAGE PRECAUTIONS
1. Do not configure the IC over the maximum ratings
If the lC is used over the maximum ratings, the LSl may be permanently damaged.
It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of
these conditions adversely affect the reliability of the LSI.
2. Use the devices within recommended operating conditions
The recommended operating conditions are the conditions under which the LSl is guaranteed to operate.
The electrical ratings are guaranteed when the device is used within the recommended operating conditions
and under the conditions stated for each item.
3. Printed circuit board ground lines should be set up with consideration for common
impedance
4. Take appropriate static electricity measures
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
5. Do not apply negative voltages
The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
Package
Remarks
24-pin plastic QFN
(LCC-24P-M09)
MB39C007QN
■ RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LSI products of FUJITSU MICROELECTRONICS with “E1” are compliant with RoHS Directive, and has
observed the standard of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (PBB) , and
polybrominated diphenyl ethers (PBDE).
A product whose part number has trailing characters “E1” is RoHS compliant.
38
DS04-27246-2E
MB39C007
■ MARKING FORMAT (LEAD FREE VERSION)
Lead-free version
X
XXXXX
INDEX
DS04-27246-2E
39
MB39C007
■ LABELING SAMPLE (LEAD FREE VERSION)
Lead-free mark
JEITA logo JEDEC logo
MB123456P - 789 - GE1
(3N) 1MB123456P-789-GE1 1000
G
Pb
(3N)2 1561190005 107210
QC PASS
PCS
1,000
MB123456P - 789 - GE1
ASSEMBLED IN JAPAN
2006/03/01
MB123456P - 789 - GE1
1/1
1561190005
0605 - Z01A 1000
“ASSEMBLED IN CHINA” is printed on the label
of a product assembled in China.
The part number of a lead-free product has
the trailing characters “E1”.
40
DS04-27246-2E
MB39C007
■ RECOMMENDED MOUNTING CONDITIONS OF MB39C007QN
[FUJITSU MICROELECTRONICS Recommended Mounting Conditions]
Item
Condition
IR (infrared reflow), warm air reflow
2 times
Mounting Method
Mounting times
Before opening
Please use it within two years after
manufacture.
Storage period
From opening to the 2nd
reflow
Storage conditions
5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
[Parameters for Each Mounting Method]
IR (infrared reflow)
260 °C
255 °C
170 °C
to
190 °C
(b)
(c)
(d)
(e)
RT
(a)
(d')
H rank : 260 °C Max
(a) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(d) Actual heating
: Temperature 260 °C Max; 255 °C or more, 10s or less
(d’)
: Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling
: Natural cooling or forced cooling
Note : Temperature : the top of the package body
DS04-27246-2E
41
MB39C007
■ EVALUATION BOARD SPECIFICATION
The MB39C007 Evaluation Board provides the proper for evaluating the efficiency and other characteristics of
the MB39C007.
• Terminal information
Symbol
Functions
Power supply terminal
In standard condition 3.1 V to 5.5 V*
VIN
* : When the VIN/VOUT difference is to be held within 0.6 V or less, such as for devices
with a standard output voltage (VOUT1 = 2.5 V) when VIN < 3.1 V, FUJITSU MICRO-
ELECTRONICS recommends changing the output capacity (C1, C2) to 10 μF.
Output terminals
(VOUT1: CH1, VOUT2: CH2)
VOUT1, VOUT2
VCTL
Power supply terminal for setting the CTL1, CTL2 and CTLP terminals.
Use by connecting with VIN (When SW is mounted).
Direct supply terminal of CTL (CTL1 : for CH1, CTL2 : for CH2)
CTL1, CTL2
CTL1, CTL2 = 0 V to 0.8 V (Typ.)
: Shutdown
CTL1, CTL2 = 0.95 V (Typ.) to VIN (5 V Max) : Normal operation
Direct supply terminal of MODE (CH1 : for MODE1, CH2 : for MODE2)
MODE1, MODE2
VREF
MODE1, MODE2 = 0 V to 0.4 V(Max)
: PFM/PWM mode
MODE1, MODE2 = OPEN(Remove R1 and R4) : PWM mode
Reference voltage output terminal
VREF = 1.30 V (Typ.)
External reference voltage input terminals
(VREFIN1 : for CH1, VREFIN2 : for CH2)
When an external reference voltage is supplied, connect it to the terminal for each chan-
nel.
VREFIN1, VREFIN2
VDET
CTLP
Voltage input terminal for voltage detection
Voltage detection circuit block control terminal
CTLP = L : Voltage detection circuit block stop
CTLP = H : Normal operation
Voltage detection circuit output terminal
The N-ch MOS open drain circuit is connected.
XPOR
VXPOR
Pull-up voltage terminal for the XPOR terminal
Ground terminal
Connect power supply GND to the PGND terminal next to the VIN terminal.
Connect output (load) GND to the PGND terminal between the VOUT1 terminal and the
VOUT2 terminal.
PGND
AGND
Ground terminal
42
DS04-27246-2E
MB39C007
• Startup terminal information
Terminal name
Condition
Functions
ON/OFF switch for CH1
L : Shutdown
H : Normal operation.
L : Open
H : Connect to VIN
CTL1
ON/OFF switch for CH2
L : Shutdown
H : Normal operation.
L : Open
H : Connect to VIN
CTL2
CTLP
ON/OFF switch for the voltage detection block
L: Stops the voltage detection circuit
H: Normal operation.
L : Open
H : Connect to VIN
• Jumper information
JP
Functions
Short-circuited in the layout pattern of the board (normally used shorted).
Short-circuited in the layout pattern of the board (normally used shorted).
Not mounted
JP1
JP2
JP3
JP6
Normally used shorted (0 Ω)
• Setup and checkup
(1) Setup
1. Connect the CTL1 terminal and the CTL2 terminal to the VIN terminal.
2. Put it into “L” state by connecting the CTLP terminal to the AGND pad.
3. Connect the power supply terminal to the VIN terminal, and the power supply GND terminal to the PGND
terminal. Make sure PGND is connected to the PGND terminal next to the VIN terminal.
(Example of setting power-supply voltage : 3.7 V)
(2) Checkup
Supply power to VIN. The IC is operating normally if VOUT1 = 2.5 V (Typ) and VOUT2 = 1.8 V (Typ).
DS04-27246-2E
43
MB39C007
• Component layout on the evaluation board (Top View)
MB39C007EVB-06Rev. 2.0
VOUT2
VOUT1
PGMD
M1
C2
C1
MODE2
VREFIN2
XPOR
MODE1
VIN
R1
L2
L1
R4
R9
C3
VREFIN1
C4
C6
C7
R5
R2
C5
R4-1
O F F
R4-2
R7
VREF
R6-2
R6-1
R3
VDET
JP3
VXPOR
1
4
SW1
VCTL
AGND
CTL2
CTL1
CTLP
R8
R10
44
DS04-27246-2E
MB39C007
• Evaluation board layout (Top View)
Top Side (Layer1)
Inside GND (Layer2)
Inside VIN & GND
(Layer3)
Bottom Side (Layer4)
DS04-27246-2E
45
MB39C007
• Connection diagram
IIN
VIN
MB39C007
JP3
SW1
11
12
DVDD1
3
VCTL
CTL1
CTL1
R8
DVDD1
C3
4.7 μF
1 MΩ
14
15
DGND1
DGND1
MODE1
MODE1
9
PGND
R1
0 Ω
DVDD2 19
VREF
20
DVDD2
R6-1
13 kΩ
R6-2
C4
4.7 μF
150 kΩ
8
VREFIN1
VREFIN1
C6
0.1 µF
16
17
DGND2
DGND2
R7
300 kΩ
JP6
SW1
5
4
AVDD
AGND
2
CTL2
C5
0.1 μF
R9
1 MΩ
AGND
CTL2
MODE2
MODE2
22
L1
2.2 μH
IOUT
R4
0 Ω
13
VOUT1
LX1
VREF
C1
4.7 μF
JP1
R4-1
13 kΩ
R4-2
10
OUT1
330 kΩ
23
VREFIN2
VREFIN2
VREF
C7
0.1 µF
R5
300 kΩ
L2
2.2 μH
IOUT
18
VOUT2
LX2
C2
4.7 μF
6
VREF
JP2
VREF
OUT2 21
R1-1
0 Ω
R1-2
300 kΩ
VXPOR
XPOR
VDET
CTLP
7
1
VDET
CTLP
R2
75 kΩ
R3
1MΩ
SW1
24
XPOR
R10
1 MΩ
*
Not mounted
46
DS04-27246-2E
MB39C007
• Component list
Compo-
nent
Part Name
Model Number
Specification
Package Vendor
Remark
M1
IC
Inductor
MB39C007QN
VLF4012AT-2R2M
VLF4012AT-2R2M
C2012JB1A475K
C2012JB1A475K
C2012JB1A475K
C2012JB1A475K
C1608JB1E104K
C1608JB1H104K
C1608JB1H104K
RK73Z1J
⎯
QFN-24
SMD
SMD
2012
2012
2012
2012
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
1608
FML
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
KOA
KOA
SSM
SSM
KOA
KOA
SSM
SSM
SSM
SSM
SSM
SSM
KOA
KOA
KOA
L1
2.2 μH, RDC=76 mΩ
2.2 μH, RDC=76 mΩ
4.7 μF(10 V)
4.7 μF(10 V)
4.7 μF(10 V)
4.7 μF(10 V)
0.1 μF(50 V)
0.1 μF(50 V)
0.1 μF(50 V)
0 Ω, 1 A
L2
Inductor
C1
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Ceramic capacitor
Resistor
C2
C3
C4
C5
C6
C7
R1
R1-1
R1-2
R2
Resistor
RK73Z1J
0 Ω, 1 A
Resistor
RR0816P-304-D
RR0816P-753-D
RK73G1JTTD D 1MΩ
RK73Z1J
300 kΩ 0.5%
75 kΩ 0.5%
1 MΩ 0.5%
0 Ω, 1 A
Resistor
R3
Resistor
R4
Resistor
R4-1
R4-2
R5
Resistor
RR0816P-133-D
RR0816P-334-D
RR0816P-304-D
RR0816P-133-D
RR0816P-154-D
RR0816P-304-D
RK73G1JTTD D 1MΩ
RK73G1JTTD D 1MΩ
RK73G1JTTD D 1MΩ
13 kΩ 0.5%
330 kΩ 0.5%
300 kΩ 0.5%
13 kΩ 0.5%
150 kΩ 0.5%
300 kΩ 0.5%
1 MΩ 0.5%
1 MΩ 0.5%
1 MΩ 0.5%
Resistor
Resistor
R6-1
R6-2
R7
Resistor
Resistor
Resistor
R8
Resistor
R9
Resistor
R10
Resistor
Not
mounted
SW1
JP1
JP2
DIP switch
Jumper
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Pattern-
shorted
Pattern-
shorted
Jumper
Not
mounted
JP3
JP6
Jumper
Jumper
⎯
⎯
⎯
⎯
RK73Z1J
0 Ω, 1A
1608
KOA
Note : These components are recommended based on the operating tests authorized.
FML : FUJITSU MICROELECTRONICS LIMITED
TDK : TDK Corporation
KOA : KOA Corporation
SSM : SUSUMU Co., Ltd
DS04-27246-2E
47
MB39C007
■ EV BOARD ORDERING INFORMATION
EV Board Part No.
EV Board Version No.
MB39C007EVB-06 Rev.2.0
Remarks
MB39C007EVB-06
QFN-24
48
DS04-27246-2E
MB39C007
■ PACKAGE DIMENSION
24-pin plastic QFN
Lead pitch
0.50 mm
Sealing method
Plastic mold
(LCC-24P-M09)
24-pin plastic QFN
(LCC-24P-M09)
2.70±0.10
4.00±0.10
(.157±.004)
(.106±.004)
2.70±0.10
(.106±.004)
4.00±0.10
(.157±.004)
0.25±0.05
INDEX AREA
(.010±.002)
3-R0.20
(3-R.008)
0.40±0.10
(.016±.004)
0.50(.020)
TYP
1PIN CORNER
(C0.25(C.010))
0.85(.033)
MAX
0.08(.003)
0.20(.008)
0.00(.000)
MIN
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2006-2008 FUJITSU MICROELECTRONICS LIMITED C24059S-c-2-3
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
DS04-27246-2E
49
MB39C007
■ CONTENTS
page
- DESCRIPTION .................................................................................................................................................... 1
- FEATURES .......................................................................................................................................................... 1
- APPLICATIONS .................................................................................................................................................. 1
- PIN ASSIGNMENT ............................................................................................................................................. 2
- PIN DESCRIPTIONS .......................................................................................................................................... 3
- I/O PIN EQUIVALENT CIRCUIT DIAGRAM ................................................................................................... 4
- BLOCK DIAGRAM .............................................................................................................................................. 5
- FUNCTION OF EACH BLOCK ......................................................................................................................... 7
- ABSOLUTE MAXIMUM RATINGS ................................................................................................................... 9
- RECOMMENDED OPERATING CONDITIONS ............................................................................................ 10
- ELECTRICAL CHARACTERISTICS ................................................................................................................ 11
- TEST CIRCUIT FOR MEASURING TYPICAL OPERATING CHARACTERISTICS ................................ 13
- APPLICATION NOTES ...................................................................................................................................... 14
- EXAMPLE OF STANDARD OPERATION CHARACTERISTICS ............................................................... 22
- APPLICATION CIRCUIT EXAMPLES ............................................................................................................. 35
- USAGE PRECAUTIONS ................................................................................................................................... 38
- ORDERING INFORMATION ............................................................................................................................. 38
- RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION .................................................. 38
- MARKING FORMAT (LEAD FREE VERSION) .............................................................................................. 39
- LABELING SAMPLE (LEAD FREE VERSION) ............................................................................................. 40
- RECOMMENDED MOUNTING CONDITIONS OF MB39C007QN ............................................................ 41
- EVALUATION BOARD SPECIFICATION ....................................................................................................... 42
- EV BOARD ORDERING INFORMATION ....................................................................................................... 48
- PACKAGE DIMENSION .................................................................................................................................... 49
50
DS04-27246-2E
MB39C007
MEMO
DS04-27246-2E
51
MB39C007
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3329
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
Asia Pacific
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
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facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
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levels and other abnormal operating conditions.
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Edited: Sales Promotion Department
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