MB86061PFQ [FUJITSU]

D/A Converter, 1 Func, Parallel, Word Input Loading, 0.006us Settling Time, PQFP64, PLASTIC, QFP-64;


型号：	MB86061PFQ
厂家：	FUJITSU
描述：	D/A Converter, 1 Func, Parallel, Word Input Loading, 0.006us Settling Time, PQFP64, PLASTIC, QFP-64 转换器
文件：	总4页 (文件大小：55K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Product Flyer

January 2000

Version 1.1

MB86061

12-Bit 400MSa/s Digital to Analog Converter

FME/MS/SFDAC1E/FL_1/4269

The Fujitsu MB86061 is a high performance 12-bit 400MSa/s

digital to analog converter (DAC). Use of novel techniques for the

converter architecture delivers high speed operation consistent

with BiCMOS or bipolar devices but at the low power of CMOS.

Fujitsu’s proprietary architecture is the subject of several patent

applications. Excellent SFDR performance coupled with high

speed conversion rate and low power make this device particularly

suitable for high performance communication systems, graphics

and test/instrumentation equipment applications.

PLASTIC PACKAGE

QFP-64

Features

• 12-bit 400MSa/s Digital to Analog converter

• True ECL digital interface (-2V supply)

• 85dBc SFDR @ 10MHz, 200MSa/s (Shuffle On)

(FPT-64P-M09)

• Low power, +3.3V and -2V operation

(308mW @ 300MSa/s)

• 0.35µm CMOS technology with Triple Well

• Industrial temperature range (-40 °C / +85 °C)

• Plastic Package 64-pin QFP

Ordering Information

Applications

• Test & Instrumentation equipment

Order

Number

Part

• Communications systems

• High performance graphics

MB86061 Datasheet

MB86061 DAC

Contact Sales

MB86061PFQ

MB86061Development DK86061-3

Kit

MB86061Development Contact Sales

Kit User Manual

This product has Patents applied for in the US and elsewhere including GB2333191A, EP0935345A, JP11-274934A, GB2333171A, EP0930717A, JP11-274935A,

GB2333190A, EP0929158A, JP11-243339A, GB2335097A, EP0940923A, JP11-317667A, GB2335076A, EP0940852A, JP11-251530A.

Page 1 of 4

January 2000 Version 1.1

FME/MS/SFDAC1E/FL_1/4269

MB86061 12-Bit 400MSa/s Digital to Analog Converter

Functional Description

The MB86061 is a high performance 12-bit 400MSa/s digital to analog converter. Versatile interfacing via the

12-bit true ECL data input allows existing system requirements to be accommodated, using either offset binary

or 2’s complement data formats. The device requires an external clock.

A 1.25V bandgap reference is provided on-chip, which may be overdriven where an external reference is to be

used. A power-down mode is enabled during device reset, with the current output drive and reference circuitry

disabled.

The device is manufactured in a 0.35µm advanced CMOS process with Triple Well extension giving improved

isolation between analog blocks and digital-analog.

Clock Buffer

CLK

CLKB

DAC

Output

DAC

ECL Data In

ECL Threshold

Shuffle

Control

Data Format

Reset

Bandgap

Reference

RRef

FML Mixed Signal

Bandgap

VRef

MB86061 Functional Block Diagram

Converter Architecture

The DAC core incorporates a number of novel design aspects that are subject to patent applications. Key to its

operation are the current sources where segmented, common centroid, interleaved techniques for the most

significant bits, as well as load matching ensure good linearity and low distortion to at least the 12-bit level. In

the switch elements tracking capacitance is minimised to improve settling, while controlled rise and fall times

improve SFDR performance. Finally the digital decoding uses a 3-dimensional addressing approach to minimise

propagation delays from latch to element.

Page 2 of 4

January 2000 Version 1.1

FME/MS/SFDAC1E/FL_1/4269

MB86061 12-Bit 400MSa/s Digital to Analog Converter

Segment Shuffling

The DAC core incorporates a proprietary segment shuffling capability which is provided to further improve

linearity, and hence improve SFDR. This feature reduces any signal level dependent effects on linearity as the

same code can be generated by the same number of MSB cells but taken from any quarter of the MSB

segments. Segment shuffling can be selected to operate every 4, 8 or 16 updates of the DAC output using a

random shuffle sequence between the four

segments.

The effect of segment shuffling is to produce a

spread noise spectrum, raising the overall noise

Shuffle On

200MSa/s DAC Rate

Amplitude = -1dBFS

floor, but reducing the distortion. For minimum

distortion when generating low frequency signals,

Shuffle Off

it is recommended that the shuffling clock rate is

no more than 25MHz (DAC Rate / Segment

Shuffling Setting). However, low shuffle clock

rates give reduced spreading out of distortion

components.

Single Tone SFDR Performance

Generated Frequency

(MHz)

Spurious Free Dynamic Range (SFDR)

Spurious Free Dynamic Range (SFDR) is defined as the highest spurious product (harmonic or non-

harmonically related) within a defined bandwidth while generating a test tone or tones. SFDR varies with

amplitude and frequency of the test tone(s) and is either quoted as the difference between the tone and highest

spurious component (dBc) or referenced to full scale (dBFS). The measurement bandwidth is typically regarded

as DC to Nyquist but occasionally systems will specify an appropriate narrow band.

Development Kit

A development kit, reference DK86061, is available for the MB86061 12-Bit 400MSa/s Digital to Analog

Converter. The kit includes an evaluation board that enables simple and effective evaluation of the device.

The board provides a complete evaluation environment for the DAC. A transformer coupled differential output

interface is provided to simplify integration into target

applications and development environments. An RF clock

source can be connected via the transformer coupled input,

and 12-bit data via a 40-way IDC header.

The development kit includes,

•

Evaluation board with MB86061 device fitted

Spare MB86061 for customer development

User Manual

Page 3 of 4

January 2000 Version 1.1

FME/MS/SFDAC1E/FL_1/4269

MB86061 12-Bit 400MSa/s Digital to Analog Converter

Worldwide Headquarters

Fujitsu Limited

Fujitsu Microelectronics Asia

Pte Limited

Japan

Asia

Tel: +81 44 754 3753

Tel:

Fax:

+65 281 0770

+65 281 0220

1015 Kamikodanaka 4-1-1

Nakahara-ku

Kawasaki-shi

151 Lorong Chuan

#05-08 New Tech Park

Singapore 556741

Fax:

+81 44 754 3329

Kanagawa-ken 211-88

Japan

http://www.fujitsu.co.jp/

http://www.fmap.com.sg/

Fujitsu Microelectronics Inc

Fujitsu Microlectronics Europe

GmbH

USA

Europe

Tel: +1 408 922 9000

Tel: +49 6103 6900

3545 North First Street

San Jose CA 95134-1804

USA

Am Siebenstein 6-10

D-63303 Dreieich-Buchschlag

Germany

Fax:

+1 408 922 9179

+49 6103 690122

Tel: +1 800 866 8608

Fax:

http://www.fujitsu-fme.com/

Customer Response Center

Mon-Fri: 7am-5pm (PST)

+1 408 922 9179

http://www.fujitsumicro.com/

he contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales

representatives before ordering.

The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended

to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or

other rights of third parties arising from the use of this information or circuit diagrams.

FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment,

industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the

use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury

or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea

floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales

representatives before such use. The company will not be responsible for damages arising from such use without prior approval.

Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures

by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention ofover-

current levels and other abnormal operating conditions.

If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign

Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of

those products from Japan.

FME/MS/SFDAC1E/FL_1/4269 - 1.1

Page 4 of 4

MB86061PFQ [FUJITSU]

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