ICS85357AG-01T [ICSI]
4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER; 4 ：1或2 ： 1差分至3.3V LVPECL / ECL时钟多路复用器
| 型号： | ICS85357AG-01T |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER |
| 文件： | 总12页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
GENERAL DESCRIPTION
FEATURES
The ICS85357-01 is a 4:1 or 2:1 Differential-to- • High speed differential multiplexer. The device can be
3.3V LVPECL / ECL clock multiplexer which can
operate up to 750MHz and is a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS85357-01 has 4
configured as either a 4:1 or 2:1 multiplexer
• 1 differential 3.3V LVPECLoutput
• 4 selectable CLK, nCLK inputs
HiPerClockS™
selectable clock inputs. The CLK, nCLK pair can accept most
standard differential input levels. The device can operate
using a 3.3V LVPECL (VEE = 0V, VCC = 3.135V to 3.465V) or
3.3V ECL (VCC = 0V, VEE = -3.135V to -3.465V). The fully dif-
ferential architecture and low propagation delay make it
ideal for use in clock distribution circuits. The select pins have
internal pulldown resistors. Leaving one input unconnected
(pulled to logic low by the internal resistor) will transform
the device into a 2:1 multiplexer. The SEL1 pin is the most
significant bit and the binary number applied to the select pins
will select the same numbered data input (i.e., 00
selects CLK0, nCLK0).
• CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency up to 750MHz
• Translates any single ended input signal to 3.3V LVPECL
levels with resistor bias on nCLKx input
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.5ns (maximum)
• LVPECLmode operating voltage supply range:
VCC = 3.135V to 3.465V, VEE = 0V
• ECL mode operating voltage supply range:
VCC = 0V, VEE = -3.135V to -3.465V
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
VCC
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
VEE
1
2
3
4
5
6
20
19
18
17
16
15
14
13
12
11
VCC
SEL1
SEL0
VCC
Q0
CLK0
00
nCLK0
CLK1
01
nCLK1
Q0
nQ0
nQ0
VCC
nc
nc
VEE
CLK2
10
7
8
9
10
nCLK2
CLK3
11
nCLK3
ICS85357-01
20-Lead TSSOP
4ꢀ40mm x 6ꢀ50mm x 0ꢀ90mm body package
G Package
SEL0
SEL1
Top View
85357AG-01
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REV. A JULY 16, 2001
1
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 14,
17, 20
VCC
Power
Positive supply pins. Connect to 3.3V.
2
CLK0
nCLK0
CLK1
nCLK1
CLK2
nCLK2
CLK3
nCLK3
VEE
Input
Input
Pulldown Non-inverting differential clock input.
Pullup Inverting differential clock input.
Pulldown Non-inverting differential clock input.
Pullup Inverting differential clock input.
Pulldown Non-inverting differential clock input.
Pullup Inverting differential clock input.
Pulldown Non-inverting differential clock input.
3
4
Input
5
Input
6
7
Input
Input
8
Input
9
Input
Pullup
Inverting differential clock input.
Negative supply pins. Connect to ground.
No connect.
10, 11
12, 13
15, 16
18
Power
Unused
Output
Input
nc
nQ0, Q0
SEL0
SEL1
Differential output pairs. LVPECL interface levels.
Pulldown Clock select input. LVCMOS / LVTTL interface levels.
Pulldown Clock select input. LVCMOS / LVTTL interface levels.
19
Input
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
CLK, nCLK,
CLK1, nCLK1,
CLK2, nCLK2,
CLK3, nCLK3
4
4
pF
CIN
Input Capacitance
Input Pullup Resistor
SEL0, SEL1
pF
KΩ
KΩ
RPULLUP
51
51
RPULLDOWN
Input Pulldown Resistor
TABLE 3. CONTROL INPUT FUNCTION TABLE
Inputs
Clock Out
CLK
SEL1
SEL0
0
0
1
1
0
1
0
1
CLK0, nCLK0
CLK1, nCLK1
CLK2, nCLK2
CLK3, nCLK3
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC
Inputs, VI
4.6V
-0.5V to VCC + 0.5V
-0.5V to VCC + 0.5V
Outputs, VO
Package Thermal Impedance, θJA
Storage Temperature, TSTG
73.2°C/W (0lfpm)
-65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended peri-
ods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C
Symbol
VCC
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Positive Supply Voltage
Power Supply Current
3.135
3.3
3.465
35
V
IEE
mA
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
VIH
VIL
IIH
Input High Voltage SEL0, SEL1
Input Low Voltage SEL0, SEL1
Input High Current SEL0, SEL1
Input Low Current SEL0, SEL1
2
3.765
0.8
V
V
-0.3
VCC = VIN = 3.465V
150
µA
µA
IIL
VCC = 3.465V, VIN = 0V
-5
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
CLK0, CLK1,
CLK2, CLK3
VCC = VIN = 3.465V
150
5
µA
IIH
Input High Current
nCLK0, nCLK1,
nCLK2, nCLK3
VCC = VIN = 3.465V
µA
µA
CLK0, CLK1,
CLK2, CLK3
nCLK0, nCLK1,
nCLK2, nCLK3
VCC = 3.465V, VIN = 0V
-5
IIL
Input Low Current
V
CC = 3.465V, VIN = 0V
-150
0.15
µA
V
VPP
Peak-to-Peak Voltage
1.3
Common Mode Input Voltage;
NOTE 1, 2
VCMR
VEE + 0.5
VCC - 0.85
V
NOTE 1: Common mode input voltage is defined as VIH.
NOTE 2: For single ended applications, the maximum input voltage for CLKx, nCLKx is VCC + 0.3V.
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
TABLE 4D. LVPECL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C
Symbol
VOH
Parameter
Test Conditions
Minimum
VCC - 1.4
VCC - 2.0
0.6
Typical
Maximum Units
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
VCC - 1.0
VCC -1.7
0.85
V
V
V
VOL
VSWING
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 5. AC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C
Symbol Parameter Test Conditions
fMAX Maximum Output Frequency
tPD
Minimum
Typical
Maximum Units
750
1.5
MHz
ns
Propagation Delay; NOTE 1
Part-to-Part Skew; NOTE 2, 3
Output Rise Time
IJ 750MHz
1
1.2
tsk(pp)
tR
150
700
700
53
ps
20% to 80% @50MHz
20% to 80% @50MHz
300
300
47
400
400
ps
tF
Output Fall Time
ps
odc
Output Duty Cycle
%
All parameters measured at 500MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
85357AG-01
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REV. A JULY 16, 2001
4
ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
PARAMETER MEASUREMENT INFORMATION
VCC
SCOPE
Q0
LVPECL
VCC = 2.0V
nQ0
VEE = -1.3V ± 0.135V
FIGURE 1 - OUTPUT LOAD TEST CIRCUIT
VCC
CLKx
VPP
VCMR
Cross Points
nCLKx
VEE
FIGURE 2 - DIFFERENTIAL INPUT LEVEL
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
Q0
PART1
nQ0
Q0
PART2
nQ0
tsk(pp)
FIGURE 3- PART-TO-PART SKEW
80%
80%
VSWING
20%
20%
Clock Inputs
and Outputs
tR
tF
FIGURE 4 - INPUT AND OUTPUT RISE AND FALL TIME
CLKx
nCLKx
Q0
nQ0
tPD
FIGURE 5 - PROPAGATION DELAY
CLKx, Q0
nCLKx, nQ0
Pulse Width
tPERIOD
tPW
odc =
tPERIOD
FIGURE 6 - odc & tPERIOD
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
APPLICATION INFORMATION
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
Figure 7 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ VCC/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and VCC = 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
VCC
R1
1K
CLK_IN
+
V_REF
-
C1
0.1uF
R2
1K
FIGURE 7 - SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85357-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85357-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 35mA = 121.3mW
Power (outputs)MAX = 30.2mW/Loaded Output pair
If all outputs are loaded, the total power is 1 * 30.2mW = 30.2mW
Total Power_MAX (3.465V, with all outputs switching) = 173.25mW + 120.8mW = 151.5mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = junction-to-ambient thermal resistance
Pd_total = Total device power dissipation (example calculation is in section 1 above)
TA =Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.151W * 66.6°C/W = 80.06°C. This is well below the limit of 125°C
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
Table 6. Thermal Resistance qJA for 20-pin TSSOP, Forced Convection
qJA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W
98.0°C/W
88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
66.6°C/W
63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 8.
VCC
Q1
VOUT
RL
50
VCC - 2V
Figure 8 - LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
Pd_L = [(V
– (V
- 2V))/R ] * (V
- V
)
OH_MAX
CC_MAX
CC_MAX
OH_MAX
L
– (V
- 2V))/R ] * (V
- V
)
OL_MAX
CC_MAX
CC_MAX
OL_MAX
L
•
•
For logic high, V = V
= V
– 1.0V
OUT
OH_MAX
CC_MAX
Using V
= 3.465, this results in V
= 2.465V
= 1.765V
CC_MAX
OH_MAX
For logic low, V = V
= V
– 1.7V
OUT
OL_MAX
CC_MAX
Using V
= 3.465, this results in V
OL_MAX
CC_MAX
Pd_H = [(2.465V - (3.465V - 2V))/50Ω] * (3.465V - 2.465V) = 20mW
Pd_L = [(1.765V - (3.465V - 2V))/50Ω] * (3.465V - 1.765V) = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE
qJA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W
98.0°C/W
88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W
66.6°C/W
63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS85357-01 is: 400
85357AG-01
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
PACKAGE OUTLINE - G SUFFIX
TABLE 8. PACKAGE DIMENSIONS
Millimeters
SYMBOL
MIN
MAX
N
A
20
--
1.20
0.15
1.05
0.30
0.20
6.60
A1
A2
b
0.05
0.80
0.19
0.09
6.40
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
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REV. A JULY 16, 2001
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ICS85357-01
4:1 OR 2:1
DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Incꢀ
TABLE 9. ORDERING INFORMATION
Part/Order Number
ICS85357AG-01
Marking
Package
Count
74 per tube
2500
Temperature
0°C to 70°C
0°C to 70°C
ICS85357AG-01
ICS85357AG-01
20 lead TSSOP
ICS85357AG-01T
20 lead TSSOP on Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
85357AG-01
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REV. A JULY 16, 2001
12
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