ICS9169CM-22LF [IDT]
Processor Specific Clock Generator, 100MHz, PDSO32, SOIC-32;
| 型号： | ICS9169CM-22LF |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Processor Specific Clock Generator, 100MHz, PDSO32, SOIC-32 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总5页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS9169C-22
Integrated
Circuit
Systems, Inc.
Preliminary Product Preview
Frequency Generator for Pentium Based Systems
General Description
Features
•
•
•
•
•
Seven selectable CPU clocks operate up to 83.3MHz
Maximum CPU jitter of ±200ps
TheICS9169C-22 isalow-costfrequencygeneratordesigned
specifically for Pentium-based chip set systems. The
integrated buffer minimizes skew and provides all the clocks
required. A 14.318 MHz XTAL oscillator provides the
reference clock to generate standard Pentium frequencies.
The CPU clock makes gradual frequency transitions without
violating the PLL timing of internal microprocessor clock
multipliers.
Six BUS clocks support sync or async bus operation
500ps skew window for all synchronous clock edges
CPU clocks to BUS clocks in sync mode skew 1-4 ns
(CPU early)
Integrated buffer outputs drive up to 30pF loads
3.0V - 3.7Vsupply range
32-pin SOIC package
48 MHz clock for USB support and 24 MHz clock
forFD
•
•
•
•
Either synchronous (CPU/2) or asynchronous (32 MHz) PCI
bus operation can be selected.
Pin Configuration
Block Diagram
32-Pin SOIC
Functionality
3.3V±10%, 0-70°C
Crystal (X1, X2) = 14.31818 MHz
CPU
BUS
REF
(1:3)
BSEL FS2
FS1 FS0
(1:7)
MHz
55
80
100
75
50
66.6
60
(1:6) 48 MHz 24 MHz
MHz
27.5
40
50
37.5
25
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
48
48
48
48
48
48
48
24
24
24
24
24
24
24
14.318
14.318
14.318
14.318
14.318
14.318
14.318
33.3
30.0
Tristate Tristate Tristate Tristate Tristate
48 24 14.318
select select select as above 32.0
Pentium is a trademark on Intel Corporation.
9169-22RevC03/17/00
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
ICS169C-22
Preliminary Product Preview
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2XCPUCLK
4X Input
2X Input
3X Input
8X Input
.5X Input
.75X Input
5X Input
7X Input
64MHz
2X Input
3X Input
8X Input*
.5X Input
.25X Input
5X Input
7X Input
CPUCLK
40MHz
33.33 MHz
25 MHz
20 MHz
50 MHz*
16.7 MHz
FIN
< 20
MHz
32 MHz
Input
1.5X Input
4X Input*
.25X Input
.125X Input
FIN
2.0
MHz
Pin Descriptions
PIN NUMBER
PIN NAME
VDD
TYPE
DESCRIPTION
1,7,23,29
PWR
Power for logic, PLL and output buffers.
XTAL or external reference frequency input. This input
includes XTAL load capacitance and feedback bias for a
12-16 MHz crystal, nominally 14.31818 Mhz.
2
X1
IN
3
X2
OUT
PWR
XTAL output which includes XTAL load capacitance.
Ground for logic, PLL and output buffers.
4,10,20,26
GND
Processor clock outputs which are a multiple of the input
reference frequency as shown in the table above.
5,6,8,9,11,12,13
CPU(1:7)
OUT
Frequency multiplier select pins. See table above. These
inputs have internal pull up devices.
14,15,16
17
FS(0:2)
BSEL
IN
IN
Selector for synchronous or asynchronous bus operation.
18,19,21,22,24,25
BUS(0:5) (1:6)
48MHz
OUT
OUT
OUT
Bus clock outputs.
27
28
Fixed 48 MHz clock (with 14.318 MHz input).
Fixed 24 MHz clock (with 14.318 MHz input).
24MHz
REF is a buffered copy of the crystal oscillator or
reference input clock, nominally 14.31818 MHz.
30,31,32
REF(0:2) (1:3)
OUT
2
ICS169C-22
Preliminary Product Preview
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics at 3.3V
VDD = 3.0 – 3.7V, TA = 0 –70°C unless otherwise stad
DC Characteristics
SYMBOL TEST CONDITIONS
PARAMETER
MIN
-
TYP
MAX
UNITS
V
VIL
VIH
IIL
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
-
0.2VDD
0.7VDD
-28.0
-5.0
-
-10.5
-
-
-
V
VIN=0V
µA
IIH
VIN=VDD
5.0
µA
Output Low
Current1
IOL
VOL=0.8V; for CPU & BUS
VOL=2.0V; for CPU & BUS
VOL=0.8V; for fixed CLKs
VOL=2.0V; for fixed CLKs
IOL=15mA; for CPU & BUS
IOH=-30mA; for CPU & BUS
IOL=12.5mA; for fixed CLKs
30.0
47.0
-66.0
38.0
-47.0
0.3
-
-42.0
-
mA
mA
mA
mA
V
Output High
Current1
IOH
IOL
-
Output Low
Current1
25.0
Output High
Current1
IOH
-
-
-30.0
0.4
-
Output Low
Voltage1
VOL
VOH
VOL
VOH
IDD
Output High
Voltage1
2.4
-
2.8
V
Output Low
Voltage1
0.3
0.4
V
Output High
Voltage1
IOH=-20mA; for fixed CLKs
2.4
-
2.8
55
-
V
Supply Current
@66.6 MHz; all outputs unloaded
110
mA
Note 1: Parameter is guaraneed y design and characterization. Not 100% tested in production.
3
ICS169C-22
Preliminary Product Preview
Electrical Characteristics at 3.3V
VDD = 3.0 – 3.7V, TA = 0 –70°C unless otherwise stated
AC Characteristics
SYMBOL TEST CONDITIONS
PARAMETER
Rise Time1
MIN
-
TYP
0.9
MAX
1.5
UNITS
ns
Tr1
Tf1
Tr2
Tf2
20pF load, 0.8 to 2.0V
CPU & BUS
20pF load, 2.0 to 0.8V
Fall Time1
Rise Time1
-
-
0.8
1.5
1.4
2.5
ns
ns
CPU & BUS
20pF load, 20% to 80%
CPU & BUS
20pF load, 80% to 20%
Fall Time1
-
45
-
1.4
50
50
2.4
55
ns
%
ps
CPU & BUS
Duty Cycle1
20pF load @ VOUT=1.4V
Dt
Tj1s1
CPU & BUS Clocks; Load=20pF,
FOUT>25 Mhz
CPU & BUS Clocks; Load=20pF,
Jitter, One Sigma1
150
Tjab1
Jitter, Absolute1
-200
-
200
ps
FOUT>25 Mhz
Jitter, One Sigma1
Jitter, Absolute1
Input Frequency1
Fixed CLK; Load=20pF
Fixed CLK; Load=20pF
-
-5
1
3
5
%
%
Tj1s2
Tjab2
Fi
2
14.318
5
12.0
-
16.0
-
MHz
pF
Logic Input Capacitance1
Crystal Oscillator
Logic input pins
X1, X2 pins
CIN
CINX
-
18
-
pF
Capacitance1
ton
ts
From VDD=1.6V to 1st crossing
of 66.6 Mhz VDD supply ramp <
40ms
From 1st crossing of acquisition
to
< 1% settling
Power-on Time1
-
2.5
4.5
ms
Frequency Settling Time1
-
2.0
4.0
ms
Tsk1
Tsk
CPU & BUS; Load=20pF;
@1.4V
Clock Skew1
Clock Skew1
Clock Skew1
-
150
300
2.6
250
500
4
ps
ps
ns
BUS to BUS; Load=20pF;
@1.4V
CPU & BUS; Load=20pF;
-
Tsk3
1
@1.4V
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
4
ICS169C-22
Preliminary Product Preview
LEAD COUNT
DIMENSONL
32L
.804
SOIC Package
Ordering Information
ICS9169CM-22
Example:
ICS XXXX M - PPP
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
M=SOIC
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
5
相关型号：
ICS9169CM-23LF
Processor Specific Clock Generator, 83.3MHz, PDSO28, 0.300 INCH, ROHS COMPLIANT, MS-013, MO-119, SOIC-28
IDT
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