MPC9819SD [IDT]

Processor Specific Clock Generator, 133.33MHz, CMOS, PDSO20, 0.150 INCH, 0.025 INCH PITCH, SSOP-20;
MPC9819SD
型号: MPC9819SD
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

Processor Specific Clock Generator, 133.33MHz, CMOS, PDSO20, 0.150 INCH, 0.025 INCH PITCH, SSOP-20

时钟 光电二极管 外围集成电路 晶体
文件: 总10页 (文件大小:279K)
中文:  中文翻译
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Clock Generator for PowerQUICC and PowerPC MPC9819  
Microprocessors and Microcontrollers  
DATA SHEET  
NRND  
The MPC9819 is a PLL-based clock generator specifically designed for Freescale  
Microprocessor and Microcontroller applications including the PowerPC and PowerQUICC.  
This device generates the microprocessor input clock and other microprocessor system and  
bus clocks at any one of four output frequencies. These frequencies include the popular 66-  
and 133-MHz PCI/X bus frequencies. The device offers five low-skew clock outputs plus three  
reference outputs. The clock input reference is 25 MHz and may be derived from an external  
source or by the addition of a 25-MHz crystal to the on-chip crystal oscillator. The extended  
temperature range of the MPC9819 supports telecommunication and networking requirements.  
MICROPROCESSOR  
CLOCK GENERATOR  
Features  
5 LVCMOS outputs for processor and other system circuitry  
3 Buffered 25-MHz reference clock outputs  
Crystal oscillator or external reference input  
25-MHz input reference frequency  
SD SUFFIX  
20 SSOP PACKAGE  
CASE 1461-02  
Selectable output frequencies include: 66, 100, 125, or 133 MHz  
Low cycle-to-cycle and period jitter  
Package: 20-lead SSOP  
3.3-V supply  
Supports computing, networking, and telecommunications applications  
Ambient temperature range: –40°C to +85°C  
NOT RECOMMENDED FOR NEW DESIGNS  
EN SUFFIX  
20 SSOP PACKAGE  
Pb-FREE PACKAGE  
CASE 1461-02  
Functional Description  
The MPC9819 uses a PLL with a 25-MHz input reference frequency to generate a single  
bank of five configurable LVCMOS output clocks. The output frequency of this bank is  
configurable to either 66, 100, 125, or 133 MHz by two FSEL pins. The 25-MHz reference may  
be either an external frequency source or a 25-MHz crystal. The 25-MHz crystal is directly connected to the XTAL_IN and XTAL_OUT pins with  
no additional components required. An external reference may be applied to the XTAL_IN pin with the XTAL_OUT pin left floating. The input  
reference, whether provided by a crystal or an external input, is also directly buffered to a second bank of three LVCMOS outputs. These outputs  
may be used as the clock source for processor I/O applications such as an Ethernet PHY.  
The MPC9819 is packaged in a 20-lead SSOP package.  
MPC9819 REVISION 4 AUGUST 16, 2012  
1
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
QA0  
XTAL_IN  
Ref  
OSC  
QA1  
XTAL_OUT  
PLL  
400 or 500 MHz  
66,100,125,133  
MHz  
QA2  
QA3  
FSEL0  
FSEL1  
QA4  
Data  
Generator  
25 MHz  
QREF0  
QREF1  
QREF2  
MR/OE  
Figure 1. MPC9819 Logic Diagram  
Table 1. Pin Configurations  
Pin  
QA0, QA1, QA2, QA3, QA4  
QREF0, QREF1, QREF2  
XTAL_IN  
I/O  
Output  
Output  
Input  
Output  
Input  
Input  
Type  
Function  
LVCMOS  
LVCMOS  
LVCMOS  
LVCMOS  
LVCMOS  
LVCMOS  
Clock Outputs  
Reference Output (25 MHz)  
Crystal Oscillator Input Pin  
Crystal Oscillator Output Pin  
XTAL_OUT  
FSEL0, FSEL1  
MR/OE  
Configures Bank A Clock Output Frequency (pull-up)  
Enables All Outputs (pull-down)  
3.3-V Supply  
VDD  
GND  
Ground  
Table 2. Function Table  
Control  
FSEL0, FSEL1  
Default  
00  
66 MHz  
01  
10  
11  
11  
125 MHz  
100 MHz  
133 MHz  
MPC9819 REVISION 4 AUGUST 16, 2012  
2
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
XTAL_IN  
XTAL_OUT  
FSEL0  
VDD  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VDD  
2
QA4  
QA3  
GND  
QA2  
QA1  
VDD  
3
4
FSEL1  
QREF2  
GND  
5
6
7
QREF1  
QREF0  
VDD  
8
QA0  
MR/OE  
GND  
9
10  
Figure 2. MPC9819 20-Lead SSOP Package Pinout (Top View)  
MPC9819 OPERATION  
Crystal Oscillator  
20 pF may be used, however, the reference frequency may be  
higher than the specified 25 MHz. Externally supplied capacitors on  
both the XTAL_IN and XTAL_OUT pins may be used to trim the  
frequency as desired.  
The crystal should be located as close to the MPC9819 XTAL_IN  
and XTAL_OUT pins as possible to avoid any board level parasitic.  
The MPC9819 features a fully integrated Pierce oscillator to  
minimize system implementation costs. Other than the addition of a  
25-MHz crystal, no external components are required.The crystal  
selection should be: 25 MHz, parallel resonant type with a load  
specification of CL = 10 pF. Crystals with a load specification of CL =  
Table 3. Crystal Specifications  
Parameter  
Crystal Cut  
Value  
Fundamental AT Cut  
Parallel Resonance  
5–7 pF  
Resonance  
Shunt Capacitance (CO)  
Load Capacitance (CL)  
10 pF  
Equivalent Series Resistance (ESR) 20–60  
Power Supply Bypassing  
External Clock Source  
The MPC9819 should have all VDD pins bypassed with  
0.01 capacitors and a minimum of one 1.0 capacitor for the overall  
package. All capacitors should be located as close to the SSOP pins  
as possible.  
An external reference source of 25 MHz may be applied to the  
XTAL_IN pin. In this mode of operation, the XTAL_OUT pin should  
be left floating.  
MPC9819 REVISION 4 AUGUST 16, 2012  
3
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
Table 4. Absolute Maximum Ratings(1)  
Symbol  
VDD  
IIN  
Characteristics  
Min  
–0.3  
Max  
3.8  
Unit  
V
Condition  
Supply Voltage  
DC Input Current  
DC Output Current  
Storage Temperature  
±20  
±75  
125  
mA  
mA  
°C  
IOUT  
TS  
–65  
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these  
conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated  
conditions is not implied.  
Table 5. General Specifications  
Symbol  
VTT  
MM  
HBM  
LU  
Characteristics  
Output Termination Voltage  
Min  
Typ  
VDD ÷ 2  
Max  
Unit  
V
Condition  
ESD Protection (machine model)  
ESD Protection (human body model)  
Latch-Up Immunity  
200  
2000  
200  
V
V
mA  
pF  
pF  
°C/W  
°C  
CIN  
Input Capacitance  
4
Inputs  
Cpd  
Power Dissipation Capacitance  
Thermal Resistance (junction-to-ambient)  
Ambient Temperature  
8.5  
JA  
80.8  
TC  
–40  
85  
Table 6. DC Characteristics (VDD = 3.3 V ± 5%, TA = –40° to +85°C)  
Symbol  
VIH  
Characteristics  
Input High Voltage (XTAL_IN)  
Min  
2.4  
2.0  
Typ  
Max  
VDD + 0.3  
VDD + 0.3  
0.8  
Unit  
V
Condition  
Input threshold = VDD/2  
VIH  
Input High Voltage  
Input Low Voltage  
Input Current(1)  
V
VIL  
V
LVCMOS  
IIN  
150  
A  
V
VIN = VDDL or GND  
VOH  
VOL  
ZOUT  
IDD  
Output High Voltage  
Output Low Voltage  
Output Impedance  
Maximum Supply Current  
2.4  
IOH = –12 mA  
IOL = 12 mA  
0.4  
V
14  
fA = 66 MHz  
fA = 133 MHz  
23  
32  
40  
50  
mA  
25 MHz reference  
frequency  
IDDBASE Base Supply Current(2)  
(for dynamic power dissipation calculation)  
14  
mA  
1. Inputs have pull-down resistors affecting the input current.  
2. PD = (VDD * IDDBASE) + 5 (VDD2) * Cpd * fA.  
MPC9819 REVISION 4 AUGUST 16, 2012  
4
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
Table 7. AC Characteristics(1) (2) (VDD = 3.3 V ± 5%, TA = –40° to +85°C)  
Symbol  
Characteristics  
Min  
Typ  
Max  
Unit  
Condition  
Input and Output Timing Specification  
fref  
Input Reference Frequency  
VCO Frequency Range  
Output Frequency (QAx)  
25 MHz Input  
XTAL Input  
25  
25  
MHz  
MHz  
fVCO  
fMCX  
FSEL0, FSEL1 = 00,01,11  
FSEL0, FSEL1 = 10  
400  
500  
MHz  
MHz  
FSEL0, FSEL1 = 00  
FSEL0, FSEL1 = 10  
FSEL0, FSEL1 = 01  
FSEL0, FSEL1 = 11  
66.66  
100  
125  
133.33  
25  
MHz  
MHz  
MHz  
MHz  
MHz  
PLL locked  
Output Frequency (QREFx)  
Reference Input Pulse Width  
Output Duty Cycle  
frefPW  
DC  
10  
45  
ns  
%
@ 25 MHz  
50  
55  
fout  
Output Frequency Accuracy  
Crystal(3)  
External Reference  
100  
0
ppm  
ppm  
With recommended crystal  
see Table 3  
PLL Specifications  
BW  
PLL Closed Loop Bandwidth(4)  
500  
kHz  
ms  
tLOCK  
Maximum PLL Lock Time  
10  
Skew and Jitter Specifications  
tsk(O)  
Output-to-Output Skew (within a bank)  
75  
ps  
ps  
tJIT(CC) Cycle-to-Cycle Jitter  
150  
@ 25 MHz Input Reference  
Q
A output  
@ 25 MHz Input Reference  
A output  
tJIT(PER) Period Jitter  
100  
1
ps  
ns  
Q
tr, tf  
Output Rise/Fall Time  
20% to 80%  
1. AC characteristics are design targets and pending characterization.  
2. AC characteristics apply for parallel output termination of 50 to VTT  
.
3. Based upon recommended crystal specifications as outlined in operation section.  
4. –3 dB point of PLL transfer characteristics.  
Z = 50  
Z = 50  
Pulse  
Generator  
Z = 50   
RT = 50  
RT = 50  
DUT MPC9819  
VTT  
VTT  
Figure 3. MPC9819 AC Test Reference (LVCMOS Outputs)  
MPC9819 REVISION 4 AUGUST 16, 2012  
5
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
Table 8. MPC9819 Pin List  
Pin  
1
Description  
XTAL_IN  
Pin  
11  
12  
13  
14  
Description  
GND  
2
XTAL_OUT  
FSEL0  
VDD  
MR/OE  
QA0  
3
4
VDD  
5
6
FSEL1  
QREF2  
GND  
15  
16  
17  
18  
19  
20  
QA1  
QA2  
GND  
QA3  
QA4  
VDD  
7
8
QREF1  
QREF0  
VDD  
9
10  
MPC9819 REVISION 4 AUGUST 16, 2012  
6
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
PACKAGE DIMENSIONS  
PAGE 1 OF 3  
CASE 1461-02  
ISSUE A  
20 SSOP PACKAGE  
MPC9819 REVISION 4 AUGUST 16, 2012  
7
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
PACKAGE DIMENSIONS  
PAGE 2 OF 3  
CASE 1461-02  
ISSUE A  
20 SSOP PACKAGE  
MPC9819 REVISION 4 AUGUST 16, 2012  
8
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
PACKAGE DIMENSIONS  
PAGE 3 OF 3  
CASE 1461-02  
ISSUE A  
20 SSOP PACKAGE  
MPC9819 REVISION 4 AUGUST 16, 2012  
9
©2009 Integrated Device Technology, Inc.  
MPC9819 Data Sheet  
CLOCK GENERATOR FOR POWERQUICC AND POWERPC MICROPROCESSORS AND MICROCONTROLLERS  
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Technical Support  
800-345-7015 (inside USA)  
netcom@idt.com  
San Jose, California 95138  
+408-284-8200 (outside USA) +480-763-2056  
Fax: 408-284-2775  
www.IDT.com/go/contactIDT  
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document,  
including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not  
guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the  
suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any  
license under intellectual property rights of IDT or any third parties.  
IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT  
product in such a manner does so at their own risk, absent an express, written agreement by IDT.  
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third  
party owners.  
Copyright 2009. All rights reserved.  

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