AUIRLR3636TRL_技术文档

AUTOMOTIVEGRADE

AUIRLR3636

Features

HEXFET^®Power MOSFET

l

Advanced Process Technology

D

S

V_DSS

R_DS(on)typ.

max.

I_{D (Silicon Limited)}

I_{D (Package Limited)}

60V

5.4m

6.8m

99A

Ultra Low On-Resistance

Logic Level Gate Drive

Advanced Process Technology

175°C Operating Temperature

Fast Switching

Repetitive Avalanche Allowed up to Tjmax

Lead-Free, RoHS Compliant

Automotive Qualified *

G

50A

D

Description

Specifically designed for Automotive applications, this HEXFET^®

PowerMOSFETutilizesthelatestprocessingtechniquestoachieve

extremely low on-resistance per silicon area. Additional features of

thisdesign area175°Cjunctionoperatingtemperature,fastswitching

speed and improved repetitive avalanche rating . These features

combinetomakethisdesignanextremelyefficientandreliabledevice

foruseinAutomotiveapplicationsandawidevarietyofotherapplications.

S

G

D-Pak

AUIRLR3636

G

D

S

Gate

Drain

Source

Standard Pack

Form

Base Part Number

Package Type

Orderable Part Number

Quantity

75

2000

3000

Tube

AUIRLR3636

AUIRLR3636TR

AUIRLR3636TRL

AUIRLR3636TRR

Tape and Reel

Tape and Reel Left

Tape and Reel Right

AUIRLR3636

D-pak

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and

functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-

maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under

board mounted and still air conditions. Ambient temperature (T_A) is 25°C, unless otherwise specified.

Symbol

I_D@ T_C= 25°C

Parameter

Continuous Drain Current, V_GS@ 10V (Silicon Limited)

Continuous Drain Current, V_GS@ 10V (Package Limited)

Pulsed Drain Current

Max.

99

Units

I_D@ T_C= 100°C

I_D@ T_C= 25°C

I_DM

70

A

50

396

143

0.95

±16

170

P_D@T_C= 25°C

W

Maximum Power Dissipation

Linear Derating Factor

W/°C

V

V_GS

E_AS

I_AR

Gate-to-Source Voltage

mJ

A

Single Pulse Avalanche Energy (Thermally Limited)

Avalanche Current

See Fig.14, 15, 22a, 22b

Repetitive Avalanche Energy

E_AR

mJ

22

-55 to + 175

300

Peak Diode Recovery

dv/dt

T_J

V/ns

Operating Junction and

T_STG

°C

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

Thermal Resistance

Symbol

Parameter

Typ.

–––

Max.

1.05

50

Units

R_θJC

Junction-to-Case

R_θJA

Junction-to-Ambient (PCB Mount)

Junction-to-Ambient

°C/W

110

HEXFET^®is a registered trademark of International Rectifier.

*Qualification standards can be found at http://www.irf.com/

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AUIRLR3636

Static Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol

V_(BR)DSS

Parameter

Drain-to-Source Breakdown Voltage

Min. Typ. Max. Units

60 ––– –––

––– 0.07 ––– V/°C Reference to 25°C, I_D= 5mA

Conditions

V_GS= 0V, I_D= 250μA

V

/ T

_(BR)DSSΔ

Δ

Breakdown Voltage Temp. Coefficient

J

–––

1.0

31

5.4

6.6

–––

6.8

8.3

2.5

V_GS= 10V, I_D= 50A

R_DS(on)

Static Drain-to-Source On-Resistance

mΩ

V

_GS= 4.5V, I_D= 50A

V_GS(th)

Gate Threshold Voltage

V

S

Ω

V_DS= V_GS, I_D= 100μA

gfs

Forward Transconductance

––– –––

V_DS= 25V, I_D= 50A

R_G(int)

I_DSS

Internal Gate Resistance

Drain-to-Source Leakage Current

–––

0.6

–––

20

––– –––

V_DS= 60V, V_GS= 0V

μA

––– ––– 250

––– ––– 100

––– ––– -100

V_DS= 60V, V_GS= 0V, T_J= 125°C

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

V

_GS= 16V

nA

V_GS= -16V

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol

Parameter

Min. Typ. Max. Units

Conditions

Q_g

Total Gate Charge

–––

33

11

15

18

45

49

I_D= 50A

Q_gs

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Total Gate Charge Sync. (Q_g- Q_gd)

Turn-On Delay Time

Rise Time

–––

V_DS= 30V

V_GS= 4.5V

nC

ns

Q_gd

Q_sync

I_D= 50A, V_DS=0V, V_GS= 4.5V

V_DD= 39V

t_d(on)

t_r

––– 216 –––

I_D= 50A

t_d(off)

Turn-Off Delay Time

Fall Time

–––

43

69

–––

R_G= 7.5 Ω

V_GS= 4.5V

t_f

C_iss

Input Capacitance

––– 3779 –––

––– 332 –––

––– 163 –––

––– 437 –––

––– 636 –––

V_GS= 0V

C_oss

Output Capacitance

Reverse Transfer Capacitance

V_DS= 50V

C_rss

ƒ = 1.0MHz

pF

C_osseff. (ER)

C_osseff. (TR)

V_GS= 0V, V_DS= 0V to 48V ,See Fig.11

V_GS= 0V, V_DS= 0V to 48V

Effective Output Capacitance (Energy Related)

Effective Output Capacitance (Time Related)

Diode Characteristics

Symbol

Parameter

Min. Typ. Max. Units

Conditions

I_S

D

Continuous Source Current

MOSFET symbol

––– ––– 99

A

(Body Diode)

Pulsed Source Current

(Body Diode)

showing the

integral reverse

G

I_SM

––– ––– 396

S

p-n junction diode.

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

––– –––

1.3

–––

V

T_J= 25°C, I_S= 50A, V_GS= 0V

T_J= 25°C

T_J= 125°C

T_J= 25°C

T_J= 125°C

T_J= 25°C

V_R= 51V,

–––

27

32

31

43

2.1

ns

I_F= 50A

di/dt = 100A/μs

Q_rr

Reverse Recovery Charge

nC

A

I_RRM

t_on

Reverse Recovery Current

Forward Turn-On Time

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.

C_osseff. (TR) is a fixed capacitance that gives the same charging time

Calcuted continuous current based on maximum allowable junction

temperature Bond wire current limit is 50A. Note that current

limitation arising from heating of the device leds may occur with

some lead mounting arrangements.

Repetitive rating; pulse width limited by max. junction

temperature.

Limited by T_Jmax, starting T_J= 25°C, L = 0.136 mH

R_G= 25Ω, I_AS= 50A, V_GS=10V. Part not recommended for use

above this value .

as C_osswhile V_DSis rising from 0 to 80% V_DSS

C_osseff. (ER) is a fixed capacitance that gives the same energy as

C_osswhile V_DSis rising from 0 to 80% V_DSS

When mounted on 1" square PCB (FR-4 or G-10 Material). For

recommended footprint and soldering techniquea refer to applocation

note # AN- 994 echniques refer to application note #AN-994.

R_θis measured at T_Japproximately 90°C.

.

I_SD≤ 50A, di/dt ≤ 1109 A/μs, V_DD≤ V_(BR)DSS, T_J≤ 175°C.

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AUIRLR3636

1000

100

10

1000

100

10

VGS

15V

10V

4.5V

4.0V

3.5V

3.3V

3.0V

2.7V

VGS

15V

10V

4.5V

4.0V

3.5V

3.3V

3.0V

2.7V

TOP

BOTTOM

2.7V

60μs PULSE WIDTH

1

60μs PULSE WIDTH

Tj = 175°C

≤

Tj = 25°C

1

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

1000

100

10

2.5

2.0

1.5

1.0

0.5

I

= 50A

D

V

= 10V

GS

T

= 175°C

J

T

= 25°C

J

1

V

= 25V

DS

≤

60μs PULSE WIDTH

0.1

1

2

3

4

5

6

7

-60 -40 -20 0 20 40 60 80 100120140160180

, Junction Temperature (°C)

T

J

V

, Gate-to-Source Voltage (V)

GS

Fig 4. Normalized On-Resistance vs. Temperature

Fig 3. Typical Transfer Characteristics

5.0

100000

10000

1000

V

= 0V,

= C

f = 1 MHZ

GS

I = 50A

D

V

= 48V

C

+ C , C

SHORTED

ds

DS

VDS= 30V

= 12V

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

iss

gs

gd

= C

rss

oss

gd

V

DS

= C + C

ds

gd

C

iss

C

oss

C

rss

100

0

5

10 15 20 25 30 35 40

Q , Total Gate Charge (nC)

1

10

, Drain-to-Source Voltage (V)

100

V

G

DS

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage

Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage

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AUIRLR3636

1000

100

10

1000

100

10

OPERATION IN THIS AREA LIMITED BY R (on)

DS

T

= 175°C

J

100μsec

T

= 25°C

LIMITED BY PACKAGE

J

1msec

10msec

1

DC

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

1.6

GS

0.1

1

10

100

0.1

0.4

V

0.7

1

1.3

1.9

V

, Drain-to-Source Voltage (V)

, Source-to-Drain Voltage (V)

DS

SD

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

Forward Voltage

80

75

70

65

60

55

50

110

Id = 5mA

100

90

80

70

60

50

40

30

20

10

0

Limited By Package

-60 -40 -20 0 20 40 60 80 100120140160180

25

50

75

100

125

150

175

T

, Temperature ( °C )

T

, Case Temperature (°C)

J

C

Fig 9. Maximum Drain Current vs.

Fig 10. Drain-to-Source Breakdown Voltage

Case Temperature

0.8

800

I

D

5.69A

10.64A

700

600

500

400

300

200

100

0

TOP

0.6

0.4

0.2

0.0

BOTTOM 50A

0

5 10 15 20 25 30 35 40 45 50 55 60 65

Drain-to-Source Voltage (V)

25

50

75

100

125

150

175

Starting T , Junction Temperature (°C)

J

V

DS,

Fig 11. Typical C_OSSStored Energy

Fig 12. Maximum Avalanche Energy vs. DrainCurrent

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AUIRLR3636

10

1

D = 0.50

0.20

0.10

0.05

R₁

R₂

R₃

R₄

Ri (°C/W) τi (sec)

0.1

0.02028

0.29406

0.49179

0.24336

0.000011

0.000158

0.001393

0.00725

τ

^Jτ_J

τ

^Cτ

0.02

0.01

¹τ₁

Ci= τi/Ri

τ

²τ₂

³τ₃

⁴τ₄

0.01

0.001

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

10

Duty Cycle = Single Pulse

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔTj = 150°C and

Tstart =25°C (Single Pulse)

0.01

0.05

0.10

1

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔΤj = 25°C and

Tstart = 150°C.

0.1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

200

150

100

50

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in

excess of T_jmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

TOP

BOTTOM 1.0% Duty Cycle

= 50A

Single Pulse

I

D

6. I_av= Allowable avalanche current.

7. ΔT = Allowable rise in junction temperature, not to exceed T_jmax(assumed as

25°C in Figure 14, 15).

t_{av =}Average time in avalanche.

D = Duty cycle in avalanche = t_av·f

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

0

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

25

50

75

100

125

150

175

I_av= 2DT/ [1.3·BV·Z_th]

E_{AS (AR)}= P_{D (ave)}·t_av

Starting T , Junction Temperature (°C)

J

Fig 15. Maximum Avalanche Energy vs. Temperature

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AUIRLR3636

3.0

2.5

2.0

1.5

1.0

0.5

0.0

14

12

10

8

I = 20A

F

V

= 51V

R

T = 25°C

J

T = 125°C

J

6

I

= 100μA

D

ID = 250μA

I

= 1.0mA

4

D

ID = 1.0A

2

0

-75 -50 -25

0

25 50 75 100 125 150 175

0

200

400

600

800

1000

T

, Temperature ( °C )

di /dt (A/μs)

J

F

Fig. 17 - Typical Recovery Current vs. di_f/dt

Fig 16. Threshold Voltage vs. Temperature

350

300

250

200

150

100

50

16

I

= 20A

= 51V

I = 30A

F

14

12

10

8

V

= 51V

R

T = 25°C

J

T = 125°C

J

T = 125°C

J

6

4

2

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 18 - Typical Recovery Current vs. di_f/dt

Fig. 19 - Typical Stored Charge vs. di_f/dt

350

I

= 30A

= 51V

F

300

250

200

150

100

50

V

R

T = 25°C

J

T = 125°C

J

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 20 - Typical Stored Charge vs. di_f/dt

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AUIRLR3636

Driver Gate Drive

P.W.

Period

D.U.T

Period

D =

+

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

-

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

•

dv/dt controlled by R_G

• Driver same type as D.U.T.

R_G

+

-

Body Diode

Inductor Current

Forward Drop

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Curent

I

SD

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

V

20V

GS

Ω

0.01

t

p

I

AS

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

R_D

V_DS

V

DS

90%

V_GS

D.U.T.

R_G

+

V_DD

-

10V

V_GS

10%

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

V

GS

t

r

t

f

d(on)

d(off)

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Id

Current Regulator

Same Type as D.U.T.

Vds

Vgs

50KΩ

.2μF

12V

.3μF

+

V

DS

D.U.T.

-

Vgs(th)

V

GS

3mA

I

D

G

Qgs1

Qgs2

Qgd

Qgodr

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

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AUIRLR3636

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information

PartNumber

AULR3636

Date Code

Y= Year

WW= Work Week

A= Automotive, LeadFree

IR Logo

YWWA

XX or XX

Lot Code

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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AUIRLR3636

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TR

TRL

TRR

16.3 ( .641 )

15.7 ( .619 )

16.3 ( .641 )

15.7 ( .619 )

12.1 ( .476 )

11.9 ( .469 )

8.1 ( .318 )

7.9 ( .312 )

FEED DIRECTION

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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AUIRLR3636

Qualification Information^†

Automotive

††

(per AEC-Q101)

Qualification Level

Comments: This part number(s) passed Automotive qualification.

IR’s Industrial and Consumer qualification level is granted by

extension of the higher Automotive level.

Moisture Sensitivity Level

D-PAK

MSL1

Class M4 (+/- 600V)^†††

Machine Model

AEC-Q101-002

Class H1C (+/- 2000V)^†††

AEC-Q101-001

Human Body Model

ESD

Class C5 (+/- 2000V)^†††

AEC-Q101-005

Charged Device

Model

RoHS Compliant

Yes

Qualification standards can be found at International Rectifiers web site: http//www.irf.com/

Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.

Highest passing voltage.

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AUIRLR3636

IMPORTANTNOTICE

Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to

make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to

discontinueanyproductorserviceswithoutnotice. Partnumbersdesignatedwiththe“AU”prefixfollowautomotiveindustryand /orcustomer

specific requirements with regards to product discontinuance and process change notification. All products are sold subject to IR’s terms

and conditions of sale supplied at the time of order acknowledgment.

IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard

warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications

using IR components. To minimize the risks with customer products and applications, customers should provide adequate design and

operating safeguards.

Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and is accompanied

by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alterations is an unfair and deceptive

business practice. IR is not responsible or liable for such altered documentation. Information of third parties may be subject to additional

restrictions.

Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that product or service voids all

express and any implied warranties for the associated IR product or service and is an unfair and deceptive business practice. IR is not

responsible or liable for any such statements.

IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or in

other applications intended to support or sustain life, or in any other application in which the failure of the IR product could create a situation

where personal injury or death may occur. Should Buyer purchase or use IR products for any such unintended or unauthorized application,

Buyer shall indemnify and hold International Rectifier and its officers, employees, subsidiaries, affiliates, and distributors harmless against

all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or

death associated with such unintended or unauthorized use, even if such claim alleges that IR was negligent regarding the design or

manufacture of the product.

IR products are neither designed nor intended for use in military/aerospace applications or environments unless the IR products are

specifically designated by IR as military-grade or “enhanced plastic.” Only products designated by IR as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of IR products which IR has not designated as military-grade is solely

at the Buyer’s risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such

use.

IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR products are

designatedbyIRascompliantwithISO/TS16949requirementsandbearapartnumberincludingthedesignation“AU”. Buyersacknowledge

and agree that, if they use any non-designated products in automotive applications, IR will not be responsible for any failure to meet such

requirements.

For technical support, please contact IR’s Technical Assistance Center

http://www.irf.com/technical-info/

WORLD HEADQUARTERS:

233 Kansas St., El Segundo, California 90245

Tel:(310)252-7105

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AUIRLR3636

Revision History

Date

Comments

•

Added "Logic Level Gate Drive" bullet in the features section on page 1

Updated data sheet with new IR corporate template

Updated package outline on page 8.

3/18/2014

4/9/2014

Updated typo on the fig.19 and fig.20, unit of y-axis from "A" to "nC" on page 6.

12

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型号：	AUIRLR3636TRL
厂家：	Infineon
描述：	Power Field-Effect Transistor, 50A I(D), 60V, 0.0083ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3 开关脉冲晶体管
文件：	总12页 (文件大小：263K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AUIRLR3636TRL [INFINEON]

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AUIRLR3705ZTR

AUIRLR3705ZTRL

AUIRLR3705ZTRR

AUIRLR3915

AUIRLR3915TR

AUIRLR3915TRL

AUIRLR3915TRR

AUIRLS3034

AUIRLS3034-7P

AUIRLS3034-7TRL