BGSA143GL10 [INFINEON]
天线相关器件;
| 型号： | BGSA143GL10 |
| 厂家： | 
Infineon |
| 描述： | 天线相关器件 |
| 文件： | 总16页 (文件大小：777K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BGSA143GL10
Low Resistance Antenna Tuning Switch
Features
• Designed for high-linearity antenna tuning switching
and RF tuning applications
• Ultra low RON resistance of 1.15 Ω at each port in ON state
• Low COFF capacitance of 140 fF at each port in OFF state
• High RF operating peak voltage handling of 42 V in OFF state
• Resonance-Stopper Antenna Tuning
• Low harmonic generation
• 3 GPIO pins control interface
• No RF parameter change within supply voltage range
• Small form factor 1.1 mm x 1.5 mm (MSL1, 260◦C per JEDEC J-STD-020)
• RoHS and WEEE compliant package
1.1x1.5mm2
Application
• Impedance Tuning
• Antenna Tuning
• Inductance Tuning
• Tunable Filters
Product Validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Block diagram
RFC
Voltage
Regulator
VDD
CTL0
DECODER
Drivers
CTL1
CTL2
Chargepump
RF4
Final Data Sheet
www.infineon.com
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Table of Contents
Table of Contents
Table of Contents
1
2
1
Features
2
3
4
5
6
7
8
Maximum Ratings
3
DC Characteristics
5
RF Small Signal Characteristics
RF large signal parameter
Logic Truth Table
6
8
10
10
11
Application Information
Package Information
Final Data Sheet
1
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Features
1 Features
•
Designed for high-linearity antenna tuning switching and RF tuning
applications
• Ultra low RON resistance of 1.15 Ω at each port in ON state
• Low COFF capacitance of 140 fF at each port in OFF state
• High RF operating peak voltage handling of 42 V in OFF state
• Low harmonic generation
• Resonance-Stopper Antenna Tuning
• 3 GPIO pins control interface
• No RF parameter change within supply voltage range
•
Small form factor 1.1 mm x 1.5 mm (MSL1, 260◦C per JEDEC J-STD-020)
• RoHS and WEEE compliant package
Description
The BGSA143GL10 is a small and versatile Single-Pole Quad Throw (SP4T) RF switch optimized for low Co as well as low Ron
enabling applications up to 6.0 GHz. GPIO digital control lines oꢀer the possibility to adopt SP4T, SPDT along with SPST
topology for an optimum flexibility in RF Front-end designs.
The BGSA143GL10 is ideal for high Q tuning applications. This single supply chip integrates on-chip CMOS logic control. It
can be driven by 2 or 3 CMOS or TTL compatible control input signals. Due to its high RF voltage ruggedness and OFF RF ports
reflective short feature, it is suited for switching any reactive devices such as inductors and capacitors in RF matching circuits
without significant losses, also mitigating or even eradicating unwanted parasitic RF resonances.
Product Name
Marking
Package
BGSA143GL10
AB
TSLP-10-2
Final Data Sheet
2
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Maximum Ratings
2 Maximum Ratings
Table 1: Maximum Ratings, Table I at TA = 25 ◦C, unless otherwise specified
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
0.4
Typ.
–
–
Max.
–
1)
Frequency Range
Supply voltage 2)
f
GHz
V
VDD
-0.5
6.0
Only for infrequent and short
duration time periods
–
Storage temperature range
RF input power
TSTG
-55
–
–
–
150
40
◦C
PRF_max
dBm
Pulsed RF input power, duty
cycle of 25 % with T_period=
4620
Fig. 2
µ
s, ON-state, setup as of
RF peak voltage
VRF_max
–
–
50
V
Short term peaks (1
µ
s, duty cy-
cle 0.1%), Isolation mode, test
setup acc. Fig. 1 and exceeding
typical linearity, RON and COFF
parameters
ESD capability, CDM 2)
VESD
-1
–
–
–
+1
kV
kV
kV
CDM
ESD capability, HBM 3)
VESD
-0.6
-8
+0.6
+8
HBM
ESD capability, system level (RF port) 5)
VESD
RFx vs system GND, with 27 nH
ANT
shunt inductor on tested port
Junction temperature
Tj
–
–
–
–
125
◦C
K/W
V
–
–
–
Thermal resistance junction - soldering point RthJS
Control Voltage Levels VCtrl
–
43
-0.7
VCtrl+0.7
(max.
3.6)
1) Switch has a low-pass response. For higher frequencies, losses have to be considered for their impact on thermal heating. The DC voltage at RF ports VRFDC has
to be 0V.
2) Note: Consider any ripple voltages on top of VIO. A high RF ripple at the VIO can exceed the maximum ratings by VCtrl = VDC + VRipple
.
3) Field-Induced Charged-Device Model ANSI/ESDA/JEDEC JS-002 Simulates charging/discharging events that occur in production equipment and processes.
Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing.
4) Human Body Model ANSI/ESDA/JEDEC JS-001 (R = 1,5 kΩ, C = 100 pF).
5) IEC 61000-4-2 (R = 330 Ω, C = 150 pF), contact discharge.
Warning: Stresses above the max. values listed here may cause permanent damage to the device. Maximum ratings
are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Expo-
sure to conditions at or below absolute maximum rating but above the specified maximum operation conditions may
aꢀect device reliability and life time. Functionality of the device might not be given under these conditions.
Final Data Sheet
3
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Maximum Ratings
50 Ohm
Spectrum
Analyser
(Hx Monitor)
50 Ohm Transmission Line
Power
Meter
SIGNAL
SOURCE
Vrf
RFC
Voltage
Regulator
ALL THROWS
VDD
CTL0
OPERATED IN ISO
POSITION*
Decoder
CTL1
Driver
CTL2
(all series transistors off)
Chargepump
GND
RF1
RF2 RF3
RF4
Figure 1: RF operating voltage measurement configuration - OFF mode
50 Ohm
50 Ohm Transmission Line
SIGNAL
SOURCE
RF1/RF2/RF3/RF4
ON MODE*
(tested series on,
all others off incl. shunt)
RFC
Voltage
Regulator
VDD
CTL0
Driver
CTL1
Decoder
CTL2
Chargepump
Spectrum
Analyser
(Hx Monitor)
GND
RF1
RF2
RF3
RF4
Power
Meter
Figure 2: RF operating and Harmonics generation measurement configuration - RFx ON mode
Final Data Sheet
4
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BGSA143GL10
Low Resistance Antenna Tuning Switch
DC Characteristics
3 DC Characteristics
Table 2: Operation Ranges
Parameter
Symbol
Values
Typ.
2.8
Unit
Note / Test Condition
Min.
1.65
45
Max.
3.6
2001
Supply voltage
Supply current
VDD
IDD
V
–
60
µA
1 TA = 85 ◦C,
PIN = 36 dBm, ON mode
Control voltage low
Control voltage high
Control current low
Control current high
VCtrl,low
VCtrl,high
ICtrl,low
ICtrl,high
0
–
0.45
2.85
1
V
–
1.2
-1
1.8
0
V
VCtrl,high < VDD
–
µA
µA
-1
0
4
VCtrl,high < VDD
1 M
Ω Pull-Down resistor at
Control Pins
Ambient temperature
Power Up Settling Time
TA
-40
–
25
10
85
25
◦C
–
tPup
µs
Time from VDD Min. power
level to 90 % RF-signal
Time between RF states in
active mode VCtl,high Min. or
VCtl,low Max. level to 90 % RF-
signal
Switching Time
tST
–
5
8
µs
µs
RF Rise Time
tRT
–
1
5
Time between 10 % to 90 %
RF-signal
VDD Min.
VDD
tPUP
VCtrl_H Min.
VCtrl
VCtrl_L Max.
tST
tST
90%
90%
RF Path A
RF Path B
tRT
90%
10%
Figure 3: BGSA143GL10 Switching Time Behavior
Final Data Sheet
5
Revision 2.1
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BGSA143GL10
Low Resistance Antenna Tuning Switch
RF Small Signal Characteristics
4 RF Small Signal Characteristics
Table 3: Parametric specifications
Parameter
Symbol
Values
Typ.
Unit
STATE / Notes
Min.
Max.
Frequency range
RFx to RFc
ON DC resistance
RFx to RFc
OFF DC resistance
RFx to GND
ON DC resistance
RFx to GND
f
0.4
6.0
GHz
Ω
RON
1.15
200
5.9
TA = −40 ◦C... + 85 ◦C,
Z0 = 50 Ω
ROFF
–
–
kΩ
Ω
RON,Shunt
ROFF,Shunt
COFF
–
–
200
140
–
–
kΩ
fF
OFF DC resistance
RFx to RFc(1)
OFF capacitance
1)
C
represents the series capacitance RFx to GND. It is fitting to the Isolation Values for OPEN Shunts.
OFF
Final Data Sheet
6
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
RF Small Signal Characteristics
Table 4: RF electrical parameters
Parameter
Symbol
Values
Typ.
Unit
STATE / Notes
Min.
Max.
Insertion Loss: RF1 to RFc, RF2 to RFc, RF3 to RFc or RF4 to RFc (1,2,3,4)
698 - 960 MHz
0.18
0.35
0.40
0.50
0.95
2.05
0.3
0.6
0.7
0.9
1.4
dB
dB
dB
dB
dB
dB
1710 - 1980 MHz
1981 - 2169 MHz
2170 - 2690 MHz
3400 - 3800 MHz
5000 - 6000 MHz
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
ILSP4T
3.2
Return Loss: RF1, RF2, RF3 or RF4 (1,2,3,4)
698 - 960 MHz
15
11
10
9.6
7.1
5.0
24
16
15
13
10
7.3
dB
dB
dB
dB
dB
dB
1710 - 1980 MHz
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
1981 - 2169 MHz
2170 - 2690 MHz
RLSP4T
3400 - 3800 MHz
5000 - 6000 MHz
Isolation: All RF OFF(1,2,3,4)
698 - 960 MHz
32
22
21
17
14
10
38
27
26
24
19
14
dB
dB
dB
dB
dB
dB
1710 - 1980 MHz
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
1981 - 2169 MHz
2170 - 2690 MHz
ISOOFF
3400 - 3800 MHz
5000 - 6000 MHz
1) Valid for all RF power levels, no compression behavior
2) Network analyser input power: PIN = −20 dBm
3)On application board without any matching components
4)OFF port shunts switches closed
Final Data Sheet
7
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
RF large signal parameter
5 RF large signal parameter
Table 5: RF large signal specifications at TA = 25 ◦C
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
RF Operating Voltage
VRF_opr
42
V
In Isolation mode, test condition
schematic in Fig. 1
for H2/H3 <-42 dBm @50 Ω
Harmonic Generation up to 12.75 GHz
All RF Ports - Second Order Har- PH2
monics
–
-86
-91
-67
-63
-65
-66
-75
-85
–
–
–
–
–
–
–
–
–
–
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
25 dBm, 50 Ω, f0 = 698 MHz
25 dBm, 50 Ω, f0 = 698 MHz
35 dBm, 50 Ω, f0 = 824 MHz
35 dBm, 50 Ω, f0 = 824 MHz
33 dBm, 50 Ω, f0 = 1960 MHz
33 dBm, 50 Ω, f0 = 1960 MHz
25 dBm, 50 Ω, f0 = 2500 MHz
25 dBm, 50 Ω, f0 = 2500 MHz
25 dBm, 50 Ω
AllRFPorts-ThirdOrderHarmon- PH3
ics
–
All RF Ports - Second Order Har- PH2
monics
–
AllRFPorts-ThirdOrderHarmon- PH3
ics
–
All RF Ports - Second Order Har- PH2
monics
–
AllRFPorts-ThirdOrderHarmon- PH3
ics
–
All RF Ports - Second Order Har- PH2
monics
–
AllRFPorts-ThirdOrderHarmon- PH3
ics
–
All RF Ports
PHx
-80
Intermodulation Distortion IMD2
IIP2, low
IIP2, high
IIP2, l
IIP2, h
–
–
120
130
–
–
dBm
dBm
IIP2 conditions Tab. 6
IIP3 conditions Tab. 7
Intermodulation Distortion IMD3
IIP3
IIP3
–
78
–
dBm
Final Data Sheet
8
Revision 2.1
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BGSA143GL10
Low Resistance Antenna Tuning Switch
RF large signal parameter
Table 6: IIP2 conditions table
Band
In-Band Frequency
Blocker Frequency 1
Blocker Power 1
Blocker Frequency 2
Blocker Power 2
[MHz]
2140
[MHz]
1950
[dBm]
20
[MHz]
190
[dBm]
-15
Band 1 Low
Band 1 High
Band 5 Low
Band 5 High
2140
1950
20
4090
45
-15
881.5
881.5
836.5
836.5
20
-15
20
1718
-15
Table 7: IIP3 conditions table
Band
In-Band Frequency
Blocker Frequency 1
Blocker Power 1
Blocker Frequency 2
Blocker Power 2
[MHz]
2140
[MHz]
1950
[dBm]
20
[MHz]
1760
[dBm]
-15
Band 1
Band 5
881.5
836.5
20
791.5
-15
Final Data Sheet
9
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Application Information
6 Logic Truth Table
Table 8: Modes of Operation
State
1
Mode
CTL2
CTL1
CTL0
0
1
RF1 to RFc on 1)
0
0
0
0
1
0
0
1
2
3
4
5
RF2 to RFc on 1)
RF3 to RFc on 1)
RF4 to RFc on 1)
0
1
1
RFc isolated from all RFx
all RFx ports shunt to GND
RF1 to RFc on, RF4 to RFc on 1)
RF2 to RFc on, RF3 to RFc on 1)
all RFx to RFc on
0
0
6
7
8
1
1
1
0
1
1
0
1
1
1) all other RFx ports Shunt to GND
7 Application Information
Pin Configuration and Function
RFC
1
2
3
4
10
9
8
7
6
RF3
RF2
RF4
RF1
GND
CTL0
CTL2
VDD
5
CTL1
Figure 4: BGSA143GL10 Pin Configuration (top view)
Table 9: Pin definition and function
Pin No.
1
Name
RF4
Function
RF4 Port
2
3
4
5
6
7
8
9
10
RF1
RF1 Port
CTL2
VDD
CTL1
CTL0
GND
RF2
GPIO Control
Power Supply
GPIO Control
GPIO Control
Ground
RF2 Port
RF3
RF3 Port
RFC
Common RF Port
Final Data Sheet
10
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Package Information
8 Package Information
ꢀꢁꢂꢂꢁꢃ ꢄꢅꢆꢇ
Figure 5: TSLP-10-2 Package Outline (top, side and bottom views)
Pin 1 marking
Date code (YW)
Type code
Figure 6: Marking Specification (top view): Date code digits Y and W defined in Table 10/11
Final Data Sheet
11
Revision 2.1
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BGSA143GL10
Low Resistance Antenna Tuning Switch
Package Information
Table 10: Year date code marking - digit "Y"
Year
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
"Y"
0
1
Year
"Y"
0
1
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2
2
3
3
4
4
5
5
6
7
6
7
8
9
8
9
Table 11: Week date code marking - digit "W"
Week
"W"
Week
"W"
N
P
Week
"W"
4
Week
34
35
"W"
h
j
Week
45
"W"
v
1
A
12
23
2
B
13
24
5
46
47
x
3
C
14
Q
R
25
6
36
37
k
l
y
4
5
D
E
15
26
27
7
48
49
z
16
S
a
38
39
40
41
n
p
q
r
8
6
7
F
17
T
28
29
30
31
b
c
50
9
G
H
J
18
U
V
51
2
8
9
10
11
19
d
e
52
3
20
21
W
Y
42
43
s
K
32
f
t
L
22
Z
33
g
44
u
Final Data Sheet
12
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Package Information
ꢙꢈꢁꢅꢍꢃꢇꢆ ꢋꢍꢆꢎꢂꢉ ꢏꢇꢋꢐ ꢎꢇꢏ
ꢖꢑꢗ ꢑꢒꢘꢕ
ꢑꢒꢓ
ꢑꢒꢓ
ꢑꢒꢓ
ꢖꢑꢗ ꢑꢒꢘꢕ
ꢑꢒꢓ
ꢀꢁꢂꢃꢄꢅꢆ ꢇꢈꢂꢉꢁꢊꢉꢂꢋ
ꢌꢍꢈꢈꢂꢉ
ꢀꢍꢆꢎꢂꢉ ꢏꢇꢋꢐ
Figure 7: Footprint Recommendation
ꢁꢂꢃ
ꢀ
ꢄꢅꢆ ꢇ
ꢈꢉꢊꢋꢅꢆꢌ
ꢇꢂꢍ
Figure 8: TSLP-10-2 Carrier Tape
Final Data Sheet
13
Revision 2.1
2021-06-23
BGSA143GL10
Low Resistance Antenna Tuning Switch
Revision History
Page or Item
Subjects (major changes since previous revision)
Revision 2.1, 2021-06-23
Revision 2.1
creation of document 2021-06-23
Final Data Sheet
14
Revision 2.1
2021-06-23
Trademarks
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Edition 2021-06-23
Published by
Infineon Technologies AG
81726 Munich, Germany
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