BSC004NE2LS5 [INFINEON]

凭借 OptiMOSTM 5 功率 MOSFET 25V,英飞凌提供了标杆解决方案:无论是在待机状态还是完全运行状态下,都能实现高功率密度和高能源效率。采用 SuperSO8 封装的 BSC004NE2LS5 提供了 0.45mOhm 的 BiC RDS(on)。;
BSC004NE2LS5
型号: BSC004NE2LS5
厂家: Infineon    Infineon
描述:

凭借 OptiMOSTM 5 功率 MOSFET 25V,英飞凌提供了标杆解决方案:无论是在待机状态还是完全运行状态下,都能实现高功率密度和高能源效率。采用 SuperSO8 封装的 BSC004NE2LS5 提供了 0.45mOhm 的 BiC RDS(on)。

文件: 总12页 (文件大小:1525K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BSC004NE2LS5  
MOSFET  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
PG-TDSON-8  
8
7
5
6
Features  
6
7
5
8
•ꢀOptimizedꢀforꢀOR-ingꢀapplication  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)ꢀ@ꢀVGS=4.5ꢀV  
•ꢀ100%ꢀavalancheꢀtested  
Pin 1  
•ꢀSuperiorꢀthermalꢀresistance  
•ꢀN-channel  
4
3
2
2
3
4
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
1
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Drain  
Pin 5-8  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
*1  
Gate  
Pin 4  
Parameter  
Value  
Unit  
Source  
Pin 1-3  
VDS  
25  
V
*1: Internal body diode  
RDS(on),max  
ID  
0.45  
479  
70  
m  
A
Qoss  
nC  
nC  
QG(0V..4.5V)  
135  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
04NE2LS5  
RelatedꢀLinks  
BSC004NE2LS5  
PG-TDSON-8 FL  
-
Final Data Sheet  
1
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Final Data Sheet  
2
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
-
-
479  
338  
40  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
Continuous drain current1)  
ID  
A
VGS=10ꢀV,ꢀTC=100ꢀ°C  
VGS=4.5V,TA=25°C,RthJA=50°C/W2)  
Pulsed drain current3)  
Avalanche energy, single pulse4)  
ID,pulse  
EAS  
-
-
-
-
1914  
400  
20  
A
TA=25ꢀ°C  
-
mJ  
V
ID=20ꢀA,ꢀRGS=25ꢀΩ  
Gate source voltage  
VGS  
-20  
-
-
-
-
-
188  
2.5  
TC=25ꢀ°C  
Power dissipation  
Ptot  
W
TA=25ꢀ°C,ꢀRthJA=50ꢀ°C/W2)  
IEC climatic category; DIN IEC 68-1:  
55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case,  
bottom  
RthJC  
RthJC  
RthJA  
-
-
-
-
0.8  
°C/W -  
°C/W -  
°C/W -  
Thermal resistance, junction - case,  
top  
-
-
20  
50  
Device on PCB,  
6 cm² cooling area  
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature  
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual  
environmental conditions.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) See Diagram 3 for more detailed information  
4) See Diagram 13 for more detailed information  
Final Data Sheet  
3
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
25  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
1.0  
1.5  
2.0  
VDS=VGS,ꢀID=250ꢀµA  
-
-
0.1  
10  
1.0  
100  
VDS=20ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=20ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=16ꢀV,ꢀVDS=0ꢀV  
-
-
0.40  
0.54  
0.45  
0.85  
VGS=10ꢀV,ꢀID=30ꢀA  
VGS=4.5ꢀV,ꢀID=30ꢀA  
RDS(on)  
mΩ  
Gate resistance  
RG  
gfs  
-
-
0.7  
-
-
-
Transconductance  
230  
S
|VDS|2|ID|RDS(on)max,ꢀID=30ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Ciss  
Coss  
Crss  
-
-
-
11000 -  
pF  
pF  
pF  
VGS=0ꢀV,ꢀVDS=12.5ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=12.5ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=12.5ꢀV,ꢀf=1ꢀMHz  
Output capacitance  
3600  
3100  
-
-
Reverse transfer capacitance  
VDD=12.5ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
28  
88  
68  
93  
-
-
-
-
ns  
ns  
ns  
ns  
VDD=12.5ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
VDD=12.5ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-off delay time  
Fall time  
VDD=12.5ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics1)ꢀ  
Values  
Typ.  
24  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Qgs  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=12.5ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=12.5ꢀV,ꢀVGS=0ꢀV  
Qg(th)  
Qgd  
15  
69  
Qsw  
Qg  
78  
Gate charge total  
135  
2.2  
Gate plateau voltage  
Gate charge total  
Vplateau  
Qg  
238  
70  
nC  
nC  
Output charge  
Qoss  
1) See Gate charge waveformsfor parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
-
Max.  
188  
1914  
1.0  
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
Qrr  
-
A
TC=25ꢀ°C  
Diode forward voltage  
0.77  
30  
V
VGS=0ꢀV,ꢀIF=30ꢀA,ꢀTj=25ꢀ°C  
VR=12.5ꢀV,ꢀIF=IS,ꢀdiF/dt=400ꢀA/µs  
Reverse recovery charge  
-
nC  
Final Data Sheet  
5
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
200  
500  
175  
150  
125  
100  
75  
400  
300  
200  
100  
0
50  
25  
0
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
104  
101  
single pulse  
0.01  
0.02  
0.05  
0.1  
0.2  
0.5  
1 µs  
103  
102  
101  
100  
10-1  
10 µs  
100  
10-1  
10-2  
100 µs  
1 ms  
10 ms  
DC  
10-1  
100  
101  
102  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
2000  
1.4  
2.8 V  
10 V  
5 V  
3 V  
3.5 V  
4.5 V  
1750  
1500  
1250  
1000  
750  
500  
250  
0
1.2  
4 V  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
4 V  
4.5 V  
5 V  
3.5 V  
10 V  
3 V  
2.8 V  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
200  
400  
600  
800  
1000  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
2000  
1.4  
1750  
1500  
1250  
1000  
750  
500  
250  
0
1.2  
1.0  
0.8  
25 °C  
175 °C  
175 °C  
0.6  
0.4  
0.2  
0.0  
25 °C  
0
1
2
3
4
5
0
2
4
6
8
10  
VGSꢀ[V]  
VGSꢀ[V]  
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
RDS(on)=f(VGS),ꢀID=30ꢀA;ꢀparameter:ꢀTj  
Final Data Sheet  
7
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
2.0  
2.00  
1.75  
1.50  
1.25  
1.00  
0.75  
0.50  
0.25  
0.00  
1.6  
1.2  
0.8  
0.4  
0.0  
2500 µA  
250 µA  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj),ꢀID=30ꢀA,ꢀVGS=10ꢀV  
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
105  
104  
25 °C  
25 °C, max  
175 °C  
175 °C, max  
103  
102  
101  
Coss  
104  
Ciss  
Crss  
103  
0
5
10  
15  
20  
25  
0.00  
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
102  
10  
5 V  
12 V  
20 V  
8
6
4
2
0
101  
25 °C  
100 °C  
150 °C  
100  
100  
101  
102  
103  
104  
0
40  
80  
120  
160  
200  
240  
280  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀ;ꢀparameter:ꢀTj,start  
VGS=f(Qgate),ꢀID=30ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
28  
27  
26  
25  
24  
23  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
PACKAGE - GROUP  
NUMBER:  
PG-TDSON-8-U04  
MILLIMETERS  
DIMENSIONS  
MIN.  
0.90  
0
MAX.  
1.20  
0.05  
0.54  
0.35  
5.35  
4.40  
3.25  
5.38  
6.10  
3.76  
0.89  
A
A1  
b
0.26  
0.15  
4.80  
3.70  
2.94  
5.05  
5.70  
3.43  
0.69  
c
D
D1  
D2  
D3  
E
E1  
E2  
e
1.27  
L
0.45  
0.69  
0.10  
0.66  
0.90  
0.25  
L1  
aaa  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8ꢀFL,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
Figureꢀ2ꢀꢀꢀꢀꢀOutlineꢀBoardpadsꢀ(TDSON-8ꢀFL)  
Final Data Sheet  
11  
Rev.ꢀ2.2,ꢀꢀ2022-10-24  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ25ꢀV  
BSC004NE2LS5  
RevisionꢀHistory  
BSC004NE2LS5  
Revision:ꢀ2022-10-24,ꢀRev.ꢀ2.2  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
2.2  
Release of final version  
2020-04-23  
2021-03-08  
2022-10-24  
Update Id condition for EAS and VGS(th)  
Update outline drawing  
Trademarks  
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.  
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Final Data Sheet  
12  
Rev.ꢀ2.2,ꢀꢀ2022-10-24  

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