IPD50N06S4-09 [INFINEON]
OptiMOS-T2 Power-Transistor; 的OptiMOS -T2功率三极管型号: | IPD50N06S4-09 |
厂家: | Infineon |
描述: | OptiMOS-T2 Power-Transistor |
文件: | 总9页 (文件大小:165K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IPD50N06S4-09
OptiMOS®-T2 Power-Transistor
Product Summary
VDS
60
9.0
50
V
R DS(on),max
I D
mΩ
A
Features
• N-channel - Enhancement mode
PG-TO252-3-11
• AEC qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IPD50N06S4-09
PG-TO252-3-11 4N0609
Maximum ratings, at T j=25 °C, unless otherwise specified
Value
Parameter
Symbol
Conditions
Unit
T C=25°C, VGS=10V1)
T C=100°C, VGS=10V2)
I D
Continuous drain current
50
A
47
Pulsed drain current2)
I D,pulse
EAS
I AS
T C=25°C
200
87
Avalanche energy, single pulse2)
Avalanche current, single pulse
Gate source voltage
I D=25A
mJ
A
-
50
VGS
Ptot
-
±20
V
T C=25°C
Power dissipation
71
W
°C
−
T j, T stg
-
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
-
-
-55 ... +175
55/175/56
Rev. 1.2
page 1
2009-07-01
IPD50N06S4-09
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
R thJC
R thJA
Thermal resistance, junction - case
SMD version, device on PCB
-
-
-
-
-
-
-
2.1
62
40
K/W
minimal footprint
6 cm2 cooling area3)
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
V(BR)DSS
VGS(th)
V
V
GS=0V, I D= 1mA
DS=VGS, I D=34µA
Drain-source breakdown voltage
Gate threshold voltage
60
-
-
V
2.0
3.0
4.0
V
DS=60V, VGS=0V,
I DSS
Zero gate voltage drain current
-
-
0.01
5
1
µA
T j=25°C
V
DS=60V, VGS=0V,
100
T j=125°C2)
I GSS
V
V
GS=20V, VDS=0V
GS=10V, I D=50A
Gate-source leakage current
-
-
-
100 nA
R DS(on)
Drain-source on-state resistance
7.1
9.0
mΩ
Rev. 1.2
page 2
2009-07-01
IPD50N06S4-09
Values
Parameter
Symbol
Conditions
Unit
min.
typ.
max.
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C iss
C oss
Crss
t d(on)
t r
-
-
-
-
-
-
-
2911
715
30
3785 pF
930
V
GS=0 V, VDS=25 V,
f =1 MHz
60
15
-
-
-
-
ns
40
V
DD=30V, VGS=10V,
I D=50A, R G=3.5Ω
t d(off)
t f
Turn-off delay time
Fall time
20
5
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Q gs
-
-
-
-
17
4
22
8
nC
Q gd
V
V
DD=48V, I D=50A,
GS=0 to 10V
Q g
36
5.6
47
-
Vplateau
Gate plateau voltage
V
A
Reverse Diode
Diode continous forward current2)
Diode pulse current2)
I S
-
-
-
-
50
T C=25°C
I S,pulse
200
V
GS=0V, I F=50A,
VSD
Diode forward voltage
Reverse recovery time2)
Reverse recovery charge2)
0.6
0.95
45
1.3
V
T j=25°C
VR=30V, I F=I S,
diF/dt =100A/µs
t rr
-
-
-
-
ns
nC
Q rr
40
1) Current is limited by bondwire; with an R thJC = 2.1K/W the chip is able to carry 67A at 25°C.
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.2
page 3
2009-07-01
IPD50N06S4-09
1 Power dissipation
2 Drain current
P
tot = f(T C); VGS ≥ 6 V
I D = f(T C); VGS ≥ 6 V
80
70
60
50
40
30
20
10
0
60
50
40
30
20
10
0
0
50
100
150
200
0
50
100
150
200
T
C [°C]
T
C [°C]
3 Safe operating area
4 Max. transient thermal impedance
thJC = f(t p)
I D = f(VDS); T C = 25 °C; D = 0
parameter: t p
Z
parameter: D =t p/T
101
1000
100
10
0.5
1 µs
100
10 µs
0.1
100 µs
0.05
10-1
0.01
1 ms
10-2
single pulse
10-3
1
10-6
10-5
10-4
10-3
10-2
10-1
100
0.1
1
10
100
t p [s]
V
DS [V]
Rev. 1.2
page 4
2009-07-01
IPD50N06S4-09
5 Typ. output characteristics
I D = f(VDS); T j = 25 °C
parameter: VGS
6 Typ. drain-source on-state resistance
DS(on) = f(I D); T j = 25 °C
R
parameter: VGS
200
20
5.5 V
6.5 V
8 V
7.5 V
6 V
10 V
7 V
7.5 V
18
16
14
12
10
8
160
120
80
40
0
7 V
6.5 V
6 V
5.5 V
10 V
6
0
0
1
2
3
4
40
80
120
160
200
V
DS [V]
I
D [A]
7 Typ. transfer characteristics
I D = f(VGS); VDS = 6V
parameter: T j
8 Typ. drain-source on-state resistance
R
DS(on) = f(T j); I D = 50 A; VGS = 10 V
200
160
120
80
13
12
11
10
9
-55 °C
25 °C
175 °C
8
7
6
40
5
0
4
3
4
5
6
7
8
-60
-20
20
60
T j [°C]
100
140
180
V
GS [V]
Rev. 1.2
page 5
2009-07-01
IPD50N06S4-09
9 Typ. gate threshold voltage
GS(th) = f(T j); VGS = VDS
10 Typ. capacitances
V
C = f(VDS); VGS = 0 V; f = 1 MHz
parameter: I D
4
104
103
102
Ciss
3.5
3
350 µA
Coss
35 µA
2.5
2
Crss
101
1.5
-60
0
5
10
15
20
25
30
-20
20
60
T j [°C]
100
140
180
V
DS [V]
11 Typical forward diode characteristicis
12 Avalanche characteristics
A S= f(t AV
IF = f(VSD)
I
)
parameter: T j
parameter: Tj(start)
103
100
25 °C
100 °C
102
10
1
150 °C
25 °C
175 °C
101
100
0.1
0.1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1
10
100
1000
V
SD [V]
t
AV [µs]
Rev. 1.2
page 6
2009-07-01
IPD50N06S4-09
13 Avalanche energy
AS = f(T j)
14 Drain-source breakdown voltage
E
V
BR(DSS) = f(T j); I D = 1 mA
parameter: I D
66
100
64
62
60
58
56
80
60
40
20
25 A
0
-55
-15
25
65
105
145
25
75
125
175
T j [°C]
T j [°C]
15 Typ. gate charge
GS = f(Q gate); I D = 50 A pulsed
16 Gate charge waveforms
V
parameter: VDD
10
9
8
7
6
5
4
3
2
1
0
V GS
12 V
48 V
Q g
V gs(th)
Q g(th)
Q sw
Q gd
Q gate
Q gs
0
5
10
15
20
25
30
35
40
Q
gate [nC]
Rev. 1.2
page 7
2009-07-01
IPD50N06S4-09
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2009
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.2
page 8
2009-07-01
IPD50N06S4-09
Revision History
Version
Date
Changes
Update of RthJC and related
parameters from 1.7K/W to
Revision 1.1
Revision 1.2
22.08.2008 2.1K/W
01.07.2009 Update of SOA diagram
Rev. 1.2
page 9
2009-07-01
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