IPG16N10S4L61AATMA1 [INFINEON]

MOSFET 2N-CH 8TDSON;
IPG16N10S4L61AATMA1
型号: IPG16N10S4L61AATMA1
厂家: Infineon    Infineon
描述:

MOSFET 2N-CH 8TDSON

文件: 总9页 (文件大小:272K)
中文:  中文翻译
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IPG16N10S4L-61A  
OptiMOS-T2 Power-Transistor  
Product Summary  
VDS  
100  
61  
V
3)  
RDS(on),max  
mW  
A
ID  
16  
Features  
• Dual N-channel Logic Level - Enhancement mode  
PG-TDSON-8-10  
• AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green Product (RoHS compliant)  
• 100% Avalanche tested  
• Feasible for automatic optical inspection (AOI)  
Type  
Package  
Marking  
IPG16N10S4L-61A  
PG-TDSON-8-10  
4N10L61  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
Continuous drain current  
one channel active  
I D  
T C=25 °C, V GS=10 V  
16  
11  
64  
A
T C=100 °C,  
V GS=10 V1)  
Pulsed drain current1)  
one channel active  
I D,pulse  
-
Avalanche energy, single pulse1, 3)  
Avalanche current, single pulse3)  
Gate source voltage  
E AS  
I AS  
I D=8A  
33  
10  
mJ  
A
-
V GS  
-
±16  
V
Power dissipation  
one channel active  
P tot  
T C=25 °C  
29  
W
T j, T stg  
Operating and storage temperature  
-
-55 ... +175  
°C  
Rev. 1.0  
page 1  
2014-06-30  
IPG16N10S4L-61A  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics1, 3)  
R thJC  
R thJA  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
5.2  
K/W  
minimal footprint  
100  
60  
-
-
6 cm2 cooling area2)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS=0V, I D=1mA  
V GS(th) V DS=V GS, I D=9µA  
Drain-source breakdown voltage  
Gate threshold voltage  
100  
1.1  
-
-
V
1.6  
2.1  
V DS=100V, V GS=0V,  
T j=25°C  
Zero gate voltage drain current3)  
I DSS  
-
-
0.01  
1
1
µA  
V DS=100V, V GS=0V,  
T j=125°C2)  
100  
Gate-source leakage current3)  
I GSS  
V GS=16V, V DS=0V  
-
-
-
-
100 nA  
Drain-source on-state resistance3)  
R DS(on) V GS=4.5V, I D=8A  
V GS=10 V, I D=16 A  
60  
47  
78  
61  
mW  
Rev. 1.0  
page 2  
2014-06-30  
IPG16N10S4L-61A  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics1)  
Input capacitance3)  
Output capacitance3)  
Reverse transfer capacitance3)  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
650  
165  
12  
2
845 pF  
215  
V GS=0V, V DS=25V,  
f =1MHz  
36  
-
-
-
-
ns  
1
V DD=50V, V GS=10V,  
I D=16A, R G=3.5W  
t d(off)  
t f  
Turn-off delay time  
Fall time  
5
4
Gate Charge Characteristics1, 3)  
Gate to source charge  
Gate to drain charge  
Q gs  
-
-
-
-
2.3  
1.3  
8.5  
3.7  
3.0  
3.6  
11  
-
nC  
Q gd  
V DD=80V, I D=16A,  
V GS=0 to 10V  
Q g  
Gate charge total  
V plateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current1)  
one channel active  
I S  
-
-
-
-
-
-
16  
64  
1.3  
-
T C=25°C  
Diode pulse current1)  
one channel active  
I S,pulse  
V SD  
t rr  
-
V GS=0V, I F=16A,  
T j=25°C  
Diode forward voltage  
1.0  
50  
80  
V
V R=50V, I F=I S,  
di F/dt =100A/µs  
Reverse recovery time1)  
Reverse recovery charge1, 3)  
ns  
nC  
Q rr  
-
1) Specified by design. Not subject to production test.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) Per channel  
Rev. 1.0  
page 3  
2014-06-30  
IPG16N10S4L-61A  
1 Power dissipation  
2 Drain current  
P tot = f(T C); V GS =10 V; one channel active  
I D = f(T C); V GS = 10 V; one channel active  
35  
30  
25  
20  
15  
10  
5
20  
15  
10  
5
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TC [°C]  
TC [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
Z thJC = f(t p)  
I D=f(V DS); T C=25°C; D =0; one channel active  
parameter: t p  
parameter: D =t p/T  
101  
100  
1 µs  
0.5  
10 µs  
100  
10  
0.1  
0.05  
0.01  
100 µs  
10-1  
1
single pulse  
1 ms  
10-2  
0.1  
0.1  
1
10  
100  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDS [V]  
tp [s]  
Rev. 1.0  
page 4  
2014-06-30  
IPG16N10S4L-61A  
5 Typ. output characteristics5)  
I D = f(V DS); T j = 25 °C  
parameter: V GS  
6 Typ. drain-source on-state resistance5)  
R DS(on) = f(I D); T j = 25 °C  
parameter: V GS  
64  
56  
48  
40  
32  
24  
16  
8
160  
10 V  
3.5 V  
4 V  
4.5 V  
5 V  
140  
120  
100  
80  
5 V  
4.5 V  
4 V  
3.5 V  
60  
10 V  
0
40  
0
1
2
3
4
5
0
16  
32  
48  
64  
VDS [V]  
ID [A]  
7 Typ. transfer characteristics5)  
I D = f(V GS); V DS = 6V  
parameter: T j  
8 Typ. drain-source on-state resistance5)  
R DS(on) = f(T j); I D = 16 A; V GS = 10 V  
64  
56  
48  
40  
32  
24  
16  
8
120  
100  
80  
-55 °C  
25 °C  
175 °C  
60  
40  
0
20  
1
2
3
4
5
6
-60  
-20  
20  
60  
100  
140  
180  
VGS [V]  
Tj [°C]  
Rev. 1.0  
page 5  
2014-06-30  
IPG16N10S4L-61A  
10 Typ. Capacitances5)  
9 Typ. gate threshold voltage  
V GS(th) = f(T j); V GS = V DS  
parameter: I D  
C = f(V DS); V GS = 0 V; f = 1 MHz  
103  
2.5  
Ciss  
2
Coss  
102  
101  
100  
90µA  
1.5  
9µA  
1
0.5  
0
Crss  
0
5
10  
15  
20  
25  
30  
-60  
-20  
20  
60  
100  
140  
180  
VDS [V]  
Tj [°C]  
11 Typical forward diode characteristicis5)  
12 Avalanche characteristics5)  
I A S= f(t AV  
I F = f(VSD)  
)
parameter: T j  
parameter: Tj(start)  
102  
100  
10  
25 °C  
100 °C  
101  
150 °C  
1
25 °C  
175 °C  
100  
0.1  
1
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
10  
100  
1000  
VSD [V]  
tAV [µs]  
Rev. 1.0  
page 6  
2014-06-30  
IPG16N10S4L-61A  
13 Avalanche energy5)  
14 Drain-source breakdown voltage  
E AS = f(T j), I D = 8A  
V BR(DSS) = f(T j); I D = 1 mA  
110  
108  
106  
104  
102  
100  
98  
40  
30  
20  
10  
0
96  
94  
-60  
-20  
20  
60  
100  
140  
180  
25  
50  
75  
100  
125  
150  
175  
Tj [°C]  
Tj [°C]  
15 Typ. gate charge5)  
16 Gate charge waveforms  
V GS = f(Q gate); I D = 16 A pulsed  
parameter: V DD  
12  
10  
8
V GS  
Q g  
20 V  
80 V  
6
V gs(th)  
4
2
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
0
0
2
4
6
8
10  
Qgate [nC]  
Rev. 1.0  
page 7  
2014-06-30  
IPG16N10S4L-61A  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© Infineon Technologies AG 2014  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions  
or characteristics. With respect to any examples or hints given herein, any typical values stated  
herein and/or any information regarding the application of the device, Infineon Technologies hereby  
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties  
of non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact  
the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the  
express written approval of Infineon Technologies, if a failure of such components can reasonably be  
expected to cause the failure of that life-support device or system or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2014-06-30  
IPG16N10S4L-61A  
Revision History  
Version  
Date  
Changes  
30.06.2014 Data Sheet Revision 1.0  
Revision 1.0  
Rev. 1.0  
page 9  
2014-06-30  

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