IR2156 [INFINEON]
BALLAST CONTROL IC; 镇流器控制IC型号: | IR2156 |
厂家: | Infineon |
描述: | BALLAST CONTROL IC |
文件: | 总24页 (文件大小:496K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Data Sheet No. PD60182-I
( )&(PbF)
S
IR2156
BALLAST CONTROL IC
Features
Programmable dead time
•
•
•
•
•
•
•
DC bus under-voltage reset
Ballast control and half-bridge driver in one IC
•
Shutdown pin with hysteresis
Internal 15.6V zener clamp diode on Vcc
Micropower startup (150µA)
Programmable preheat frequency
•
Programmable preheat time
•
Internal ignition ramp
•
Latch immunity and ESD protection
Programmable over-current threshold
•
Also available LEAD-FREE (PbF)
Programmable run frequency
•
Packages
Description
The IR2156 incorporates a high voltage half-bridge
gate driver with a programmable oscillator and state
diagram to form a complete ballast control IC. The
IR2156 features include programmable preheat and
run frequencies, programmable preheat time, program-
mable dead-time, and programmable over-current pro-
tection. Comprehensive protection features such as
protection from failure of a lamp to strike,filament fail-
ures, as well as an automatic restart function, have
been included in the design. The IR2156 is available in
both 14 lead PDIP and 14 lead SOIC packages.
14 Lead SOIC
(narrow body)
14 Lead PDIP
CFL Application Diagram
RBUS
L
FILTE
L
R
DRECT1
RSUPPLY
F1
DBOOT
FILTE
C
CELCAP1
NC
VB
R
DCP2
1
2
3
4
5
6
7
14
13
12
11
10
9
VCC
HO
M1
M2
LRES
VDC
RT
VS
CVCC2 CVCC1
N
LOCBOOT
CCP
RPH
CT
CS
SD
CRES
RT
CSNUB
R1
RPH
CELCAP1
CCS
CPH
COM
RCS
DCP1
8
CT CVDC
CCPH
DRECT2
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IR2156
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol Definition
Min.
Max.
Units
V
B
High side floating supply voltage
-0.3
625
V
High side floating supply offset voltage
High side floating output voltage
Low side output voltage
V
- 25
V
+ 0.3
+ 0.3
+ 0.3
S
B
B
B
V
V
HO
V
S
- 0.3
V
V
LO
-0.3
V
CC
I
Maximum allowable output current (HO, LO)
due to external power transistor miller effect
-500
500
OMAX
mA
V
VDC pin voltage
-0.3
-0.3
-5
V
V
+ 0.3
+ 0.3
VDC
CC
V
V
CT pin voltage
CT
CC
I
CPH pin current
5
CPH
mA
I
RPH pin current
-5
5
RPH
V
RPH pin voltage
-0.3
-5
V
+ 0.3
CC
V
RPH
I
RT pin current
5
mA
RT
V
RT pin voltage
-0.3
-0.3
-5
V
+ 0.3
CC
RT
V
V
CS
Current sense pin voltage
Current sense pin current
Shutdown pin current
Supply current (note 1)
Allowable offset voltage slew rate
5.5
5
I
CS
I
-5
5
mA
SD
I
-20
-50
—
20
CC
dV/dt
50
V/ns
W
P
D
Package power dissipation @ T ≤ +25°C
(14 pin PDIP)
(14 pin SOIC)
(14 pin PDIP)
(14 pin SOIC)
1.70
1.00
70
A
P
D
= (T -T )/Rth
JMAX A JA
—
Rth
JA
Thermal resistance, junction to ambient
—
o
C/W
—
120
150
150
300
T
J
Junction temperature
-55
-55
—
o
C
T
S
Storage temperature
T
L
Lead temperature (soldering, 10 seconds)
Note 1:
This IC contains a zener clamp structure between the chip V
and COM which has a nominal breakdown
CC
voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source
greater than the V specified in the Electrical Characteristics section.
CLAMP
2
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IR2156
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol Definition
Min.
Max.
Units
V
High side floating supply voltage
Minimum required VBS voltage for proper HO functionality
Steady state high side floating supply offset voltage
Supply voltage
V
- 0.7
V
CLAMP
Bs
CC
V
5
V
CC
BSMIN
V
V
S
-1
600
V
CC
V
V
CCUV+
CLAMP
I
Supply current
note 2
10
mA
pF
CC
C
T
CT lead capacitance
—
1
220
-1
I
Shutdown lead current
SD
mA
I
Current sense lead current
Junction temperature
-1
-40
—
1
CS
o
C
T
J
125
125
25
I
SD pin leakage current (@V =6V)
SD
SDLK
µA
I
CS pin leakage current (@V =3V)
CS
—
CSLK
Note 2: Enough current should be supplied into the VCC lead to keep the internal 15.6V zener clamp diode on this lead
regulating its voltage, V
CLAMP
.
Electrical Characteristics
V
CC
= V = V
BS
= 14V +/- 0.25V, V
= Open, R = 39.0kΩ, R = 100.0kΩ C = 470 pF, V
= 0.0V, V = 0.0V,
CPH CS
BIAS
VDC
o
T
PH
,
T
V
SD
= 0.0V, C
= 1000pF, T = 25 C unless otherwise specified.
LO, HO
A
Symbol Definition
Min.
Typ.
Max. Units Test Conditions
Supply Characteristics
V
V
supply undervoltage positive going
10.5
8.5
11.5
9.5
12.5
10.5
V
rising from 0V
CC
CCUV+
CC
threshold
V
V
V
supply undervoltage negative going
V falling from 14V
CC
CCUV-
CC
V
threshold
V
supply undervoltage lockout hysteresis
1.5
50
—
2.0
3.0
UVHYS
CC
I
UVLO mode quiescent current
Fault-mode quiescent current
120
200
200
470
V
= 11V
CC
QCCUV
I
SD = 5.1V, or
CS > 1.3V
µA
QCCFLT
I
Quiescent V
supply current
—
—
1.0
1.0
1.5
1.5
CT connected toCOM
VCC =14V,RT=15kΩ
RT = 15kΩ
QCC
CC
mA
I
V
supply current, f = 50kHz
zener clamp voltage
QCC50K
CC
CC
C
= 470 pF
T
V
V
14.5
15.6
16.5
V
I
= 5mA
CLAMP
CC
Floating Supply Characteristics
I
V
V
= (CT = 0V)
S
Quiescent VBS supply current
Quiescent V supply current
BS
-5
—
0
5
QBS0
HO
µA
µA
I
50
V
= V (C = 14V)
30
—
QBS1
HO B T
I
LK
Offset supply leakage current
—
50
V = V = 600V
B S
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IR2156
Electrical Characteristics
V
= V = V
BS
= 14V +/- 0.25V, V
= Open, R = 39.0kΩ, R = 100.0kΩ C = 470 pF, V
= 0.0V, V = 0.0V,
CPH CS
CC
BIAS
VDC
o
T
PH
,
T
V
= 0.0V, C
= 1000pF, T = 25 C unless otherwise specified.
LO, HO
A
SD
Symbol Definition
Min. Typ.
Max. Units Test Conditions
Oscillator, Ballast Control, I/O Characteristics
f
f
Oscillator frequency
28
30
32
R =33.0kΩ, VV = 5V
DC
osc
T
kHz
V
CPH
= Open
(Guaranteed by design)
R =40k, R = 100K
T PH
Oscillator frequency
Oscillator duty cycle
37.6
40
43.9
KHz
osc
C
T
= 470pF
—
—
—
—
—
—
—
—
d
50
8.3
4.8
0
%
V
C
V
Upper
ramp voltage threshold
CT+
CT-
T
T
V
= 14V
CC
C
V
Lower
ramp voltage threshold
C
>
or CS >
1.3V
V
Fault-mode
pin voltage
T
mV
SD 5.1V
only CT CAP should
beconnected to CT
CTFLT
—
—
—
2.0
2.0
3
—
—
—
usec
usec
KΩ
t
LO output deadtime
DLO
t
HO output deadtime
Internal deadtime resistor
DHO
RDT
Preheat Characteristics
I
CPH pin charging current
3.6
—
4.3
5.2
—
µA
V
=10V,CT=10V,
CPH
CPH
VDC=5V
0
mV
>
SD 5.1V
or CS >
V
Fault-mode
pin voltage
CPH
1.3V
CPHFLT
RPH Characteristics
µA
mV SD 5.1V
I
Open circuit RPH pin leakage current
—
—
0.1
0
—
CT = 10V
RPHLK
>
or CS >
1.3V
V
Fault-mode pin voltage
RPH
RPHFLT
—
RT Characteristics
µA
mV
I
Open circuit RT pin leakage current
—
—
0.1
0
—
—
CT = 10V
RTLK
> or CS >
SD 5.1V 1.3V
V
Fault-mode pin voltage
RT
RTFLT
Protection Characteristics
V
Rising shutdown pin threshold voltage
—
—
1.1
—
—
5.1
450
1.25
160
135
—
V
SDTH+
V
Shutdown pin threshold hysteresis
—
mV
V
SDHYS
V
Over-current sense threshold voltage
Over-current sense propogation delay
Over-current sense minimum pulse width
1.44
—
CSTH
t
nsec
nsec
Delay from CS to LO
CS
V
—
V
pulse amplitude
CS
CSPW
= V
+100mV
CSTH
R
V
DC bus sensing resistor
CPH to VDC offset voltage
7.5
10
14
kΩ
V
>12V, VCT=0V
CPH
VDC
VDC= 7V
V =open,VVDC=0V
CPH
10.3
10.9
11.4
V
CPH-VDC
Gate Driver Output Characteristics
VOL
VOH
tr
Low-level output voltage
High-level output voltage
Turn-on rise time
—
—
—
—
0
0
105
100
150
Io = 0
mV
ns
V
- Vo, Io = 0
BIAS
110
55
C
= C
=1nF
HO
LO
tf
Turn-off fall time
100
4
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IR2156
Block Diagram
Vcc
S1
RT
R
VB
HO
VS
S2
Driver
Logic
High-
Side
40K
CT
R
Comp 1
Driver
T
Q
Q
VTH
R
RDT
2.5K
Soft
R
Start
S3
S4
S6
R
R
RPH
Low-
Side
ICPH
Schmitt 1
LO
CS
Driver
CPH
VDC
Fault
Logic
5.1V
5.1V
S
R1
R2
Q
Q
RVDC
10K
1.3V
Comp 3
SD
5.1V
Under-
Voltage
Detect
Comp 2
COM
Lead Assignments & Definitions
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IR2156
State Diagram
Power Turned On
UVLO Mode
1/2-Bridge Off
IQCC 120µA
CPH = 0V
CT = 0V (Oscillator Off)
CS > 1.3V
(Lamp Removal)
VCC < 9.5V
or
VCC > 11.5V (UV+)
(VCC Fault or Power Down)
SD > 5.1V
or
and
or
SD > 5.1V
SD < 5.1V
VCC < 9.5V (UV-)
(Power Turned Off)
(Lamp Fault or Lamp Removal)
FAULT Mode
PREHEAT Mode
1/2-Bridge oscillating @ fPH
RPH // RT
Fault Latch Set
1/2-Bridge Off
IQCC 180µA
CPH Charging @ ICPH = 5 µA
CS Enabled @ CPH > 7.5V
RVDC to COM = 12.6kΩ @
CPH > 7.5V
CPH = 0V
VCC = 15.6V
CT = 0V (Oscillator Off)
CPH > 10V
(End of PREHEAT Mode)
Ignition Ramp
Mode
CS > 1.3V
(Failure to Strike Lamp)
RPH>Open
fPH ramps to fRUN
CPH charging
CPH > 13V
CS > 1.3V
RUN Mode
(Lamp Fault)
RPH = Open
1/2-Bridge Oscillating @
fRUN
6
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IR2156
Timing Diagrams
Normal operation
VCC
15.6V
UVLO+
UVLO-
VDC
VCC
7.5V
CPH
frun
fph
FREQ
HO
LO
CS
Over-Current Threshold
1.3V
UVLO
PH
RUN
UVLO
RT
RT
RT
RPH
CT
RPH
CT
RPH
CT
HO
LO
HO
LO
HO
LO
CS
CS
CS
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IR2156
Timing Diagrams
Fault condition
VCC
15.6V
UVLO+
UVLO-
VDC
VCC
7.5V
CPH
frun
FREQ
SD
fph
HO
LO
CS
1.3V
UVLO
PH
PH
RUN
UVLO
RT
RT
RT
RPH
CT
RPH
CT
RPH
CT
HO
LO
HO
HO
LO
LO
CSTH
CS
CS
CS
8
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IR2156
1600
1400
1200
1000
800
600
400
200
0
6
5
4
3
2
1
0
0
0.5
1
1.5
2
2.5
3
40
80
120
160
200
Frequency (KHz)
DT ( S)
µ
Graph 1. CT vs Dead Time (IR2156)
Graph 2. I vs Frequency (IR2156)
CC
120
110
100
90
90
80
70
60
50
40
30
RPH=15K
RPH=15K
RPH=30K
RPH=100K
80
RPH=30K
70
60
50
40
9
10
11
12
13
0
1
2
3
VCPH (V)
VDC (V)
Graph 3. Frequency vs V
(IR2156)
Graph 4. Frequency vs VDC (IR2156)
CPH
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IR2156
6
5
4
3
2
1
1000000
100000
10000
1000
0
0
4
13
22
31
40
5
10
15
RT (k
)
Ω
VCPH (V)
Graph 6. Frequency vs RT (IR2156)
Graph 5. I
vs V
(IR2156)
CPH
CPH
70
60
50
40
30
20
10
0
2
1.5
1
o
125 C
o
75 C
o
25 C
o
-25 C
0.5
-10
0
0
8
3
6
9
12
15
9
10
11
12
13
V
BS (V)
VCC (V)
Graph 8. I
vs V vs Temp(IR2156)
CC
Graph 7. I
vs V
(IR2156)
CC
QBS
QCC
UVLO Hysteresis
10
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IR2156
1.5
1.4
1.3
1.2
1.1
1
5
4.5
4
3.5
3
2.5
2
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
+
Graph 9. V
vs Temperature (IR2156)
Graph 10. R vs Temperature (IR2156)
DT
CSTH
15
14
13
12
11
10
14
13
12
11
10
9
UV+
UV-
8
-25
0
25
50
75
100
125
-25
0
25
Temperature °C
Graph 12. UV+, UV- vs Temperature (IR2156)
50
75
100 125
Temperature °C
+
VDC
Graph 11. R
vs Temperature (IR2156)
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IR2156
35
30
25
20
15
10
5
6
5.75
5.5
SD+
SD-
5.25
5
4.75
4.5
4.25
4
0
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature °C
Temperature °C
Graph 13. SD+, SD- vs Temperature (IR2156)
Graph 14. I vs Temperature (IR2156)
LK
20
16
12
8
20
16
12
8
-25
25
75
-25
25
75
125
125
4
4
0
0
0
5
10
15
20
15
15.5
16
16.5
V
CC (V)
V
CC (V)
Graph 15. I
vs V vs Temperature (IR2156)
CC
Graph 16. I
vs V
vs Temperature (IR2156)
QCC
QCC
CC
Internal Zener Diode Curve
12
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IR2156
1.6
1.4
1.2
1
2
1.8
1.6
1.4
1.2
1
-25
25
75
-25
25
75
125
125
0.8
0.6
0.4
0.2
0
0.8
0.6
0.4
0.2
0
8.5
9
9.5
10
10.5
10
10.5
11
11.5
12
12.5
13
VCC (V)
VCC (V)
Graph 17. I
vs V vs Temperature (IR2156)
CC
Graph 18. I
vs V vs Temperature (IR2156)
QCC CC
QCC
+
V
V
-
CCUV
CCUV
70
65
60
55
50
45
40
58.5
58
o
-25 C
57.5
57
o
75 C
56.5
56
o
125 C
55.5
55
o
25 C
54.5
54
11
12
13
14
-25
0
25
50
75
100
125
Temp°(C)
VCC (V)
vs V vs Temperature (IR2156)
CC
Graph 19. F
Graph 20. F
vs Temperature (IR2156)
OSC
OSC
V
V
= 0V
= 0V
CPH
CPH
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IR2156
3.5
3
6
5.5
5
-25
25
75
o
125 C
o
75 C
2.5
2
125
o
25 C
1.5
1
o
-25 C
4.5
4
0.5
0
11
12
13
14
15
11
12
13
14
15
VCC (V)
VCC (V)
Graph 21. I
vs V
vs Temperature (IR2156)
Graph 22. I
vs V
vs Temperature (IR2156)
CPH
CC
CPH
CC
V
CPH
= V
CC
V
CPH
= 0V
200
2.25
2.2
180
160
140
120
100
80
o
125 C
o
125 C
2.15
2.1
o
75 C
o
25 C
2.05
2
o
75 C
o
-25 C
o
25 C
1.95
1.9
60
40
1.85
20
o
-25 C
0
1.8
11
11
12
13
VCC (V)
vs V vs Temperature (IR2156)
RISE(HO) CC
14
15
12
13
VCC (V)
vs Temperature (IR2156)
14
15
Graph 23. t
vs V
Graph 24. t
DEAD
CC
CT = 1nF
14
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IR2156
250
200
150
100
50
120
100
80
60
40
20
0
o
125 C
o
125 C
o
75 C
o
25 C
o
75 C
o
25 C
o
-25 C
o
-25 C
0
11
12
13
14
15
11
12
13
14
15
VCC (V)
VCC (V)
Graph 25. t
vs V
vs Temperature (IR2156)
Graph 26. t
vs V
vs Temperature (IR2156)
FALL(HO)
CC
RISE(LO)
CC
120
o
125 C
100
80
60
40
20
0
o
75 C
o
25 C
o
-25 C
11
12
13
14
15
VCC (V)
vs V vs Temperature (IR2156)
CC
Graph 27. t
FALL(LO)
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IR2156
Functional Description
VC1
CVCC
INTERNAL VCC
DISCHARGE
Under-voltage Lock-Out Mode (UVLO)
ZENER CLAMP VOLTAGE
VUVLO+
The under-voltage lock-out mode (UVLO) is
defined as the state the IC is in when VCC is
below the turn-on threshold of the IC. To identify
the different modes of the IC, refer to the State
Diagram shown on page 6 of this document. The
IR2156 undervoltage lock-out is designed to
maintain an ultra low supply current of less than
200uA, and to guarantee the IC is fully functional
before the high and low side output drivers are
activated. Figure 1 shows an efficient supply
VHYST
VUVLO-
DISCHARGE
TIME
CHARGE PUMP
OUTPUT
RSUPPLY & CVCC
TIME
CONSTANT
t
Figure 2, Supply capacitor (CVCC) voltage.
voltage using the start-up current of the IR2156 During the discharge cycle, the rectified current
together with a charge pump from the ballast from the charge pump charges the capacitor above
output stage (RSUPPLY, CVCC, DCP1 and DCP2). the IC turn-off threshold. The charge pump and
the internal 15.6V zener clamp of the IC take over
VBUS(+)
as the supply voltage. The start-up capacitor and
RSUPPLY
DBOOT
snubber capacitor must be selected such that
VB
14
enough supply current is available over all ballast
operating conditions. A bootstrap diode (DBOOT)
and supply capacitor (CBOOT) comprise the
supply voltage for the high side driver circuitry.
To guarantee that the high-side supply is charged
up before the first pulse on pin HO, the first pulse
from the output drivers comes from the LO pin.
During undervoltage lock-out mode, the high- and
low-side driver outputs HO and LO are both low,
pin CT is connected internally to COM to disable
the oscillator, and pin CPH is connected internally
to COM for resetting the preheat time.
CBOOT
VCC
HO
M1
M2
2
13
12
Half-Bridge
Output
VS
LO
CVCC
11
8
IR2156
CSNUB
DCP1
COM
RCS
DCP2
VBUS(-)
Figure 1, Start-up and supply circuitry.
The start-up capacitor (CVCC) is charged by
current through supply resistor (RSUPPLY) minus
the start-up current drawn by the IC. This resistor
is chosen to provide 2X the maximum start-up
current to guarantee ballast start-up at low line
input voltage. Once the capacitor voltage on VCC
reaches the start-up threshold, and the SD pin is
below 4.5 volts, the IC turns on and HO and LO
begin to oscillate. The capacitor begins to
discharge due to the increase in IC operating
current (Figure 2).
Preheat Mode (PH)
The preheat mode is defined as the state the IC
is in when the lamp filaments are being heated to
their correct emission temperature. This is
necessary for maximizing lamp life and reducing
the required ignition voltage. The IR2156 enters
preheat mode when VCC exceeds the UVLO
positive-going threshold. HO and LO begin to
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IR2156
off) of the output gate drivers, HO and LO. The
selected value of CT together with RDT therefore
program the desired dead-time (see Design
Equations, page 19, Equations 1 and 2). Once
CT discharges below 1/3 VCC, MOSFET S3 is
turned off, disconnecting RDT from COM, and
MOSFET S1 is turned on, connecting RT and
RPH again to VCC. The frequency remains at the
preheat frequency until the voltage on pin CPH
exceeds 13V and the IC enters Ignition Mode.
During the preheat mode, both the over-current
protection and the DC bus under-voltage reset are
enabled when pin CPH exceeds 7.5V.
oscillate at the preheat frequency with 50% duty
cycle and with a dead-time which is set by the
value of the external timing capacitor, CT, and
internal deadtime resistor, RDT. Pin CPH is
disconnected from COM and an internal 4µA
current source (Figure 3)
VBUS(+)
HO
RT
M1
13
4
OSC.
RT
Half
Bridge
Output
S4
RPH
Half-
5
6
VS
LO
12
11
RPH
Bridge
Driver
ILOAD
CT
Ignition Mode (IGN)
M2
CT
The ignition mode is defined as the state the IC
is in when a high voltage is being established
across the lamp necessary for igniting the lamp.
The IR2156 enters ignition mode when the voltage
on pin CPH exceeds 13V.
4uA
CPH
RCS
7
CCPH
COM
8
IR2156
Load
Return
V
BUS(-)
Figure 3, Preheat circuitry.
VBUS(+)
VCC
2
charges the external preheat timing capacitor on
CPH linearly. The over-current protection on pin
CS is disabled during preheat. The preheat
frequency is determined by the parallel
combination of resistors RT and RPH, together
with timing capacitor CT. CT charges and
discharges between 1/3 and 3/5 of VCC (see
Timing Diagram, page 7). CT is charged
exponentially through the parallel combination of
RT and RPH connected internally to VCC through
MOSFET S1. The charge time of CT from 1/3 to
3/5 VCC is the on-time of the respective output
gate driver, HO or LO. Once CT exceeds 3/5 VCC,
MOSFET S1 is turned off, disconnecting RT and
RPH from VCC. CT is then discharged
exponentially through an internal resistor, RDT,
through MOSFET S3 to COM. The discharge time
of CT from 3/5 to 1/3 VCC is the dead-time (both
S1
HO
VS
RT
M1
13
12
4
OSC.
RT
Half
S4
RPH
Bridge
Half-
5
6
Output
RPH
Bridge
Driver
ILOAD
CT
Fault
Logic
LO
CS
M2
11
10
CT
S3
1.3V
R1
4uA
Comp 4
CPH
CCS
RCS
7
CCPH
8
COM
IR2156
Load
Return
V
BUS(-)
Figure 4, Ignition circuitry.
Pin CPH is connected internally to the gate of a
p-channel MOSFET (S4) (see Figure 4) that
connects pin RPH with pin RT. As pin CPH
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DC Bus Under-voltage Reset
exceeds 13V, the gate-to-source voltage of
MOSFET S4 begins to fall below the turn-on
threshold of S4. As pin CPH continues to ramp
towards VCC, switch S4 turns off slowly. This
results in resistor RPH being disconnected
smoothly from resistor RT, which causes the
operating frequency to ramp smoothly from the
preheat frequency, through the ignition frequency,
to the final run frequency. The over-current
threshold on pin CS will protect the ballast against
a non-strike or open-filament lamp fault condition.
The voltage on pin CS is defined by the lower
half-bridge MOSFET current flowing through the
external current sensing resistor RCS. The resistor
RCS therefore programs the maximum allowable
peak ignition current (and therefore peak ignition
voltage) of the ballast output stage. The peak
ignition current must not exceed the maximum
allowable current ratings of the output stage
MOSFETs. Should this voltage exceed the internal
threshold of 1.3V, the IC will enter FAULT mode
and both gate driver outputs HO and LO will be
latched low.
Should the DC bus decrease too low during a
brown-out line condition or over-load condition, the
resonant output stage to the lamp can shift near
or below resonance. This can produce hard-
switching at the half-bridge which can damage
the half-bridge switches. To protect against this,
pin VDC measures the DC bus voltage and pulls
down on pin CPH linearly as the voltage on pin
VDC decreases 10.9V below VCC. This causes
the p-channel MOSFET S4 (Figure 4) to close as
the DC bus decreases and the frequency to shift
higher to a safe operating point above resonance.
The DC bus level at which the frequency shifting
occurs is set by the external RBUS resistor and
internal RVDC resistor. By pulling down on pin
CPH, the ignition ramp is also reset. Therefore,
should the lamp extinguish due to very low DC
bus levels, the lamp will be automatically ignited
as the DC bus increases again. The internal RVDC
resistor is connected between pin VDC and COM
when CPH exceeds 7.5V (during preheat mode).
Fault Mode (FAULT)
Run Mode (RUN)
Should the voltage at the current sensing pin, CS,
exceed 1.3 volts at any time after the preheat
mode, the IC enters fault mode and both gate
driver outputs, HO and LO, are latched in the 'low'
state. CPH is discharged to COM for resetting
the preheat time, and CT is discharged to COM
for disabling the oscillator. To exit fault mode, VCC
must be recycled back below the UVLO negative-
going turn-off threshold, or, the shutdown pin, SD,
must be pulled above 5.1 volts. Either of these
will force the IC to enter UVLO mode (see State
Diagram, page 6). Once VCC is above the turn-
on threshold and SD is below 4.5 volts, the IC
will begin oscillating again in the preheat mode.
Once the lamp has successfully ignited, the
ballast enters run mode. The run mode is defined
as the state the IC is in when the lamp arc is
established and the lamp is being driven to a given
power level. The run mode oscillating frequency
is determined by the timing resistor RT and timing
capacitor CT (see Design Equations, page 19,
Equations 3 and 4). Should hard-switching occur
at the half-bridge at any time due to an open-
filament or lamp removal, the voltage across the
current sensing resistor, RCS, will exceed the
internal threshold of 1.3 volts and the IC will enter
FAULT mode. Both gate driver outputs, HO and
LO, will be latched low.
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IR2156
Design Equations
Step 3: Program Preheat Frequency
Note: The results from the following design The preheat frequency is programmed with timing
equations can differ slightly from experimental resistors RT and RPH, and timing capacitor CT.
measurements due to IC tolerances, component The timing resistors are connected in parallel
tolerances, and oscillator over- and under-shoot internally for the duration of the preheat time. The
due to internal comparator response time.
preheat frequency is therefore given as:
Step 1: Program Dead-time
1
fPH
=
0.6 RT RPH
RT + RPH
[Hertz] (5)
The dead-time between the gate driver outputs
HO and LO is programmed with timing capacitor
CT and an internal dead-time resistor RDT. The
dead-time is the discharge time of capacitor CT
from 3/5VCC to 1/3VCC and is given as:
2 CT
+ 2000
or
1
− 3333 RT
1.12 CT fPH
[Seconds]
(1)
(2)
RPH
=
tDT = CT 2000
1
[Ohms] (6)
RT −
− 3333
or
1.12 CT fPH
tDT
CT =
[Farads]
2000
Step 4: Program Preheat Time
The preheat time is defined by the time it takes
for the capacitor on pin CPH to charge up to 13
volts (assuming Vcc = 15 volts). An internal
current source of 4.3µA flows out of pin CPH. The
preheat time is therefore given as:
Step 2: Program Run Frequency
The final run frequency is programmed with timing
resistor RT and timing capacitor CT. The charge
time of capacitor CT from 1/3VCC to 3/5VCC
determines the on-time of HO and LO gate driver
outputs. The run frequency is therefore given as:
[Seconds] (7)
tPH = CPH 3.02e6
or
1
CPH = tPH 0.331e − 6
fRUN
or
=
[Farads] (8)
[Hertz] (3)
2 CT (0.6 RT + 2000 )
Step 5: Program Maximum Ignition Current
The maximum ignition current is programmed with
the external resistor RCS and an internal threshold
of 1.25 volts. This threshold determines the over-
current limit of the ballast, which can be exceeded
when the frequency ramps down towards
resonance during ignition and the lamp does not
1
RT =
− 3333
[Ohms] (4)
1.12 CT fRUN
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IR2156
Step 3: Program Preheat Frequency
ignite. The maximum ignition current is given as:
The preheat frequency is chosen such that the
lamp filaments are adequately heated within the
preheat time. A preheat frequency of 70kHz was
chosen. Using Equation (6) gives the following
result:
1.25
RCS
IIGN
=
[Amps Peak] (9)
or
1.25
IIGN
RCS
=
1
[Ohms] (10)
− 3333 RT
1.12 CT fPH
RPH
=
1
RT −
− 3333
1.12 CT fPH
Design Example: 42W-QUAD BIAX CFL
1
− 3333 43000
− 3333
Note: The results from the following design
example can differ slightly from experimental
results due to IC tolerances, component
tolerances, and oscillator over- and under-shoot
due to internal comparator response time.
1.12 470 pF 70000
RPH
=
1
43000 −
1.02 470 pF 70000
RPH = 53,330Ω 51kΩ
Step 1: Program Dead-time
Step 4: Program Preheat Time
The dead-time is chosen to be 0.8µs. Using
Equation (2) gives the following result:
The preheat time of 500ms seconds was chosen.
Using Equation (8) gives the following result:
tDT
2000
0.8e−6
2000
CT =
=
= 400pF 470pF
CPH = tPH 0.331e − 6
CPH = (500e −3) (0.331e − 6)
CPH = 0.166uF− > 0.22uF
Step 2: Program Run Frequency
The run frequency is chosen to be 43kHz. Using
Equation (4) gives the following result:
Step 5: Program Ignition Current
1
RT =
RT =
− 3333
1.12 CT fRUN
The maximum ignition current is given by the
maximum ignition voltage and is chosen as
2.0Apk. Using Equation (10) gives the following
result:
1
− 3333
1.12 470 pF 43000
RT = 40,846Ω
43kΩ
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IR2156
1.25
IIGN
RCS
RCS
=
=
1.3
2.0
= 0.625Ohms
0.61Ohms
Results
A fully-functional ballast was designed, built and
tested using the calculated values. The values
were then adjusted slightly in order to fulfill various
ballast parameters (Table 1). The ballast was
designed using the 'Typical Application Schematic'
given on page 1.
Waveform 2. Lamp voltage during preheat, ignition
and run modes
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Waveform 3, Half-bridge and current sense voltage
during run mode
Table 1, 42W-Quad Biax Ballast Measured Results
Waveforms
Waveform 4, Lamp voltage and current sense pin during
a failure-to-strike lamp fault condition.
Waveform 1. Lamp filament voltage during preheat
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IR2156
Case outline
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6019
14-Lead SOIC (narrow body)
01-3063 00 (MS-012AB)
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IR2156
Bill Of Materials
Schematic: Typical Application Diagram, Page 1
Lamp Type: 42W-Quad Biax
Line Input Voltage: 120VAC
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Device qualified to Industrial Level
www.irf.com
23
( )&(PbF)
S
IR2156
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRxxxxxx
YWW?
IR logo
?XXXX
Pin 1
Identifier
Lot Code
?
(Prod mode - 4 digit SPN code)
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
Leadfree Part
14-Lead PDIP IR2156 order IR2156
14-Lead SOIC IR2156S order IR2156S
14-Lead PDIP IR2156 order IR2156PbF
14-Lead SOIC IR2156S order IR2156SPbF
Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
10/25/2004
24
www.irf.com
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