IR2183STR [INFINEON]

MOSFET Driver, CMOS, PDSO8;
IR2183STR
型号: IR2183STR
厂家: Infineon    Infineon
描述:

MOSFET Driver, CMOS, PDSO8

光电二极管
文件: 总8页 (文件大小:180K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Data Sheet No. PD60173-E  
( ) ( )  
S
IR2183 4  
HALF-BRIDGE DRIVER  
Features  
Packages  
Floating channel designed for bootstrap operation  
Fully operational to +600V  
Tolerant to negative transient voltage  
dV/dt immune  
14-Lead PDIP  
IR21834  
Gate drive supply range from 10 to 20V  
Undervoltage lockout for both channels  
3.3V and 5V input logic compatible  
Matched propagation delay for both channels  
Logic and power ground +/- 5V offset.  
Lower di/dt gate driver for better noise immunity  
Output source/sink current capability 1.4A/1.8A  
8-Lead SOIC  
IR2183S  
8-Lead PDIP  
IR2183  
14-Lead SOIC  
IR21834S  
Description  
The IR2183(4)(S) are high voltage,  
IR2181/IR2183/IR2184 Feature Comparison  
Cross-  
high speed power MOSFET and IGBT  
drivers with dependent high and low  
side referenced output channels. Pro-  
prietary HVIC and latch immune  
CMOS technologies enable rugge-  
dized monolithic construction. The  
logic input is compatible with standard  
CMOS or LSTTL output, down to 3.3V  
logic. The output drivers feature a high  
Input  
logic  
conduction  
prevention  
logic  
Part  
Dead-Time  
Ground Pins  
Ton/Toff  
2181  
21814  
2183  
COM  
VSS/COM  
COM  
HIN/LIN  
HIN/LIN  
IN/SD  
no  
none  
180/220 ns  
180/220 ns  
680/270 ns  
Internal 500ns  
Program 0.4 ~ 5 us  
Internal 500ns  
yes  
yes  
21834  
2184  
VSS/COM  
COM  
21844  
Program 0.4 ~ 5 us  
VSS/COM  
pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to  
drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.  
Typical Connection  
up to 600V  
VCC  
VCC  
HIN  
LIN  
VB  
HO  
VS  
HIN  
LIN  
TO  
LOAD  
COM  
LO  
up to 600V  
IR2183  
IR21834  
HO  
VB  
VS  
VCC  
VCC  
HIN  
LIN  
HIN  
LIN  
DT  
TO  
LOAD  
(Refer to Lead Assignment for correct pin  
configuration) This/These diagram(s) show  
electrical connections only. Please refer to our  
Application Notes and DesignTips for proper circuit  
board layout.  
VSS  
COM  
LO  
VSS  
RDT  
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1
( ) ( )  
S
IR2183 4  
Absolute Maximum Ratings  
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-  
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured  
under board mounted and still air conditions.  
Symbol  
Definition  
High side floating absolute voltage  
High side floating supply offset voltage  
High side floating output voltage  
Min.  
Max.  
Units  
V
-0.3  
625  
B
S
V
V
B
- 25  
V
+ 0.3  
+ 0.3  
25  
B
V
HO  
V
CC  
V
S
- 0.3  
V
B
Low side and logic fixed supply voltage  
Low side output voltage  
-0.3  
-0.3  
V
V
LO  
V
V
+ 0.3  
+ 0.3  
+ 10  
CC  
DT  
Programmable dead-time pin voltage (IR21834 only)  
Logic input voltage (HIN & LIN)  
V
- 0.3  
SS  
SS  
CC  
CC  
V
IN  
V
V
- 0.3  
- 25  
V
SS  
V
SS  
Logic ground (IR21834 only)  
V
+ 0.3  
CC  
dV /dt  
Allowable offset supply voltage transient  
50  
V/ns  
W
S
P
D
Package power dissipation @ T +25°C  
(8-lead PDIP)  
(8-lead SOIC)  
(14-lead PDIP)  
(14-lead SOIC)  
(8-lead PDIP)  
(8-lead SOIC)  
(14-lead PDIP)  
(14-lead SOIC)  
-50  
1.0  
0.625  
1.6  
A
1.0  
Rth  
Thermal resistance, junction to ambient  
125  
200  
75  
JA  
°C/W  
°C  
120  
150  
150  
300  
T
T
Junction temperature  
J
Storage temperature  
S
T
Lead temperature (soldering, 10 seconds)  
L
Recommended Operating Conditions  
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the  
recommended conditions. The V and V offset rating are tested with all supplies biased at 15V differential.  
S
SS  
Symbol  
Definition  
Min.  
Max.  
Units  
VB  
High side floating supply absolute voltage  
High side floating supply offset voltage  
High side floating output voltage  
Low side and logic fixed supply voltage  
Low side output voltage  
V
+ 10  
V
S
+ 20  
S
V
Note 1  
600  
S
V
HO  
V
V
B
S
V
CC  
10  
0
20  
V
V
V
CC  
LO  
V
Logic input voltage (HIN &  
)
V
V
+ 5  
LIN  
IN  
SS  
SS  
SS  
DT  
Programmable dead-time pin voltage (IR21834 only)  
Logic ground (IR21834 only)  
V
V
CC  
V
-5  
5
SS  
T
A
Ambient temperature  
-40  
125  
°C  
Note 1: Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip  
S
S
BS  
DT97-3 for more details).  
Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.  
2
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( ) ( )  
S
IR2183 4  
Dynamic Electrical Characteristics  
V
(V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C, DT = VSS unless otherwise specified.  
BIAS CC BS  
L
A
SS  
Symbol  
Definition  
Min. Typ. Max. Units Test Conditions  
t
Turn-on propagation delay  
180  
220  
0
270  
330  
35  
V = 0V  
S
on  
off  
t
Turn-off propagation delay  
V
S
= 0V or 600V  
MT  
Delay matching  
t
- t  
| on off |  
nsec  
t
t
Turn-on rise time  
40  
60  
V
V
= 0V  
= 0V  
r
S
Turn-off fall time  
20  
35  
f
S
DT  
Deadtime: LO turn-off to HO turn-on(DT  
280  
4
400  
5
520  
6
RDT= 0  
LO-HO) &  
HO turn-off to LO turn-on (DT  
µsec RDT = 200k (IR21834)  
HO-LO)  
HO-LO  
MDT  
Deadtime matching = DT  
- DT  
0
50  
RDT=0  
nsec  
LO-HO  
|
|
0
600  
RDT = 200k (IR21834)  
Static Electrical Characteristics  
V
(V , V ) = 15V, V  
CC BS  
= COM, DT= V  
and T = 25°C unless otherwise specified.The V , V and I  
SS A IL IH IN  
BIAS  
SS  
parameters are referenced to V /COM and are applicable to the respective input leads: HIN and LIN. The V , I and Ron  
SS  
O O  
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.  
Symbol  
Definition  
Min. Typ. Max. Units Test Conditions  
V
Logic 1input voltage for HIN & logic 0for LIN  
2.7  
60  
1.0  
5
0.8  
1.2  
0.1  
50  
V
= 10V to 20V  
IH  
CC  
CC  
V
Logic 0input voltage for HIN & logic 1for LIN  
V
= 10V to 20V  
IL  
V
V
OH  
High level output voltage, V  
- V  
O
I
I
= 0A  
= 0A  
BIAS  
O
V
Low level output voltage, V  
OL  
LK  
O
O
I
Offset supply leakage current  
Quiescent V supply current  
V = V = 600V  
B S  
µA  
I
20  
0.4  
150  
1.6  
20  
V
= 0V or 5V  
= 0V or 5V  
QBS  
QCC  
BS  
IN  
IN  
I
Quiescent V  
supply current  
mA  
V
CC  
LIN  
= 0V  
I
Logic 1input bias current  
Logic 0input bias current  
HIN = 5V,  
HIN = 0V, LIN = 5V  
IN+  
µA  
V
I
1
2
IN-  
V
V
CC  
and V supply undervoltage positive going  
8.0  
8.9  
9.8  
CCUV+  
BS  
V
threshold  
and V supply undervoltage negative going  
BSUV+  
V
V
CC  
7.4  
0.3  
8.2  
0.7  
9.0  
CCUV-  
BS  
V
threshold  
BSUV-  
V
Hysteresis  
CCUVH  
V
BSUVH  
I
Output high short circuit pulsed current  
Output low short circuit pulsed current  
1.4  
1.8  
1.9  
2.3  
V = 0V,  
O
O+  
PW 10 µs  
= 15V,  
A
I
V
O
O-  
PW 10 µs  
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3
( ) ( )  
S
IR2183 4  
Functional Block Diagrams  
V B  
U V  
D E T E C T  
2183  
H O  
R
R
Q
P U L S E  
F I L T E R  
H V  
L E V E L  
S H I F T E R  
S
V S S / C O M  
L E V E L  
S H I F T  
V S  
HIN  
P U L S E  
G E N E R A T O R  
DT  
D E A D T I M E  
S H O O T - T H R O U G H  
P R E V E N T I O N  
&
V C C  
L O  
U V  
D E T E C T  
+5V  
V S S / C O M  
L E V E L  
S H I F T  
D E L A Y  
LIN  
C O M  
V S S  
V B  
U V  
21834  
D E T E C T  
H O  
R
R
Q
P U L S E  
F I L T E R  
H V  
L E V E L  
S H I F T E R  
S
V S S / C O M  
L E V E L  
S H I F T  
HIN  
V S  
P U L S E  
G E N E R A T O R  
D E A D T I M E  
S H O O T - T H R O U G H  
P R E V E N T I O N  
&
V C C  
L O  
DT  
U V  
D E T E C T  
+5V  
V S S / C O M  
L E V E L  
S H I F T  
D E L A Y  
LIN  
C O M  
V S S  
4
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S
IR2183 4  
Lead Definitions  
Symbol Description  
HIN  
Logic input for high side gate driver output (HO), in phase (referenced to COM for IR2183 and  
VSS for IR21834)  
Logic input for low side gate driver output (LO), out of phase (referenced to COM for IR2183  
and VSS for IR21834)  
LIN  
DT  
Programmable dead-time lead, referenced to VSS. (IR21834 only)  
Logic Ground (21834 only)  
VSS  
V
High side floating supply  
B
HO  
High side gate driver output  
V
V
High side floating supply return  
S
Low side and logic fixed supply  
CC  
LO  
Low side gate driver output  
COM  
Low side return  
Lead Assignments  
V
V
1
2
3
4
HIN  
LIN  
B
8
1
2
3
4
HIN  
LIN  
B
8
HO  
HO  
7
6
5
7
6
5
V
S
V
S
COM  
LO  
COM  
LO  
V
V
CC  
CC  
8-Lead PDIP  
8-Lead SOIC  
IR2183  
IR2183S  
14  
13  
12  
11  
10  
9
14  
13  
12  
11  
10  
9
1
HIN  
LIN  
VSS  
DT  
1
2
3
4
5
6
7
HIN  
LIN  
V
V
2
3
4
5
6
7
B
B
HO  
HO  
VSS  
DT  
V
S
V
S
COM  
LO  
COM  
LO  
8
8
V
V
CC  
CC  
14-Lead PDIP  
14-Lead SOIC  
IR21834  
IR21834S  
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IR2183 4  
Case outlines  
01-6014  
01-3003 01 (MS-001AB)  
8-Lead PDIP  
INCHES  
MILLIMETERS  
DIM  
A
D
B
MIN  
.0532  
MAX  
.0688  
.0098  
.020  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
FOOTPRINT  
8X 0.72 [.028]  
5
A
A1 .0040  
b
c
.013  
.0075  
.189  
.0098  
.1968  
.1574  
8
1
7
2
6
3
5
4
6
D
E
e
H
E
.1497  
0.25 [.010]  
A
.050 BASIC  
1.27 BASIC  
6.46 [.255]  
e 1 .025 BASIC  
0.635 BASIC  
H
K
L
y
.2284  
.0099  
.016  
0°  
.2440  
.0196  
.050  
8°  
5.80  
0.25  
0.40  
0°  
6.20  
0.50  
1.27  
8°  
3X 1.27 [.050]  
e
6X  
8X 1.78 [.070]  
e1  
K x 45°  
A
C
y
0.10 [.004]  
8X c  
8X L  
A1  
B
8X b  
7
0.25 [.010]  
C A  
NOT ES :  
5
6
7
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .  
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].  
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.  
2. CONTROLLING DIMENSION: MILLIMETER  
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .  
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].  
3. DIMENS IONS ARE S HOWN IN MILLIME TE RS [INCHES ].  
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.  
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO  
A SUBSTRATE.  
01-6027  
01-0021 11 (MS-012AA)  
8-Lead SOIC  
6
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S
IR2183 4  
01-6010  
01-3002 03 (MS-001AC)  
14-Lead PDIP  
01-6019  
01-3063 00 (MS-012AB)  
14-Lead SOIC (narrow body)  
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( ) ( )  
S
IR2183 4  
LIN  
HIN  
LIN  
50%  
50%  
t
t
t
off  
t
f
on  
r
90%  
90%  
HO  
LO  
10%  
10%  
LO  
Figure 1. Input/Output Timing Diagram  
50%  
50%  
HIN  
HO  
t
t
t
f
t
on  
off  
90%  
r
90%  
10%  
10%  
50%  
50%  
HIN  
LIN  
Figure 2. Switching Time Waveform Definitions  
90%  
DT  
10%  
HO  
LO  
LO-HO  
DT  
HO-LO  
10%  
90%  
MDT=  
DT  
- DT  
LO-HO  
HO-LO  
Figure 3. Deadtime Waveform Definitions  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105  
Data and specifications subject to change without notice. 7/23/2001  
8
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