IRF7665S2TR1PBF [INFINEON]
Power Field-Effect Transistor, 4.1A I(D), 100V, 0.062ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, ISOMETRIC-2;型号: | IRF7665S2TR1PBF |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 4.1A I(D), 100V, 0.062ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, ISOMETRIC-2 开关 脉冲 晶体管 |
文件: | 总9页 (文件大小:236K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 96239
DIGITALAUDIOMOSFET
IRF7665S2TRPbF
IRF7665S2TR1PbF
Key Parameters
Features
• Key parameters optimized for Class-D audio amplifier
VDS
100
V
applications
m
RDS(on) typ. @ VGS = 10V
Qg typ.
51
8.3
3.5
• Low RDS(on) for improved efficiency
• Low Qg for better THD and improved efficiency
• Low Qrr for better THD and lower EMI
• Low package stray inductance for reduced ringing and lower
EMI
nC
RG(int) typ.
• Can deliver up to 100W per channel into 8Ω with no heatsink
• Dual sided cooling compatible
· Compatible with existing surface mount technologies
· RoHS compliant containing no lead or bromide
· Lead-Free (Qualified up to 260°C Reflow)
· Industrial Qualified
DirectFETISOMETRIC
SB
Applicable DirectFET Outline and Substrate Outline (see p. 6, 7 for details)
SB
SC
M2
M4
L4
L6
L8
Description
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the
latest processing techniques to achieve low on-resistance per silicon area. Furthermore, gate charge, body-diode reverse
recovery and internal gate resistance are optimized to improve key Class-D audio amplifier performance factors such as
efficiency, THD, and EMI.
The IRF7665S2TR/TR1PbF device utilizes DirectFETTM packaging technology. DirectFETTM packaging technology offers lower
parasitic inductance and resistance when compared to conventional wirebonded SOIC packaging. Lower inductance im-
proves EMI performance by reducing the voltage ringing that accompanies fast current transients. The DirectFETTM package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red
or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing method and
processes. The DirectFETTM package also allows dual sided cooling to maximize thermal transfer in power systems, improving
thermal resistance and power dissipation. These features combine to make this MOSFET a highly efficient, robust and reliable
device for Class-D audio amplifier applications.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Max.
100
Units
VDS
VGS
V
Gate-to-Source Voltage
± 20
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
@ TC = 25°C
14.4
10.2
D
D
D
@ TC = 100°C
@ TA = 25°C
A
I
I
4.1
58
DM
Maximum Power Dissipation
Power Dissipation
P
P
P
@TC = 25°C
@TC = 100°C
@TA = 25°C
30
15
D
D
D
W
Power Dissipation
2.4
Linear Derating Factor
Operating Junction and
0.2
W/°C
°C
T
-55 to + 175
J
T
Storage Temperature Range
STG
Thermal Resistance
Parameter
Junction-to-Ambient
Typ.
Max.
Units
RθJA
–––
12.5
20
63
RθJA
Junction-to-Ambient
–––
–––
5.0
°C/W
RθJA
Junction-to-Ambient
RθJ-Can
RθJ-PCB
Junction-to-Can
–––
1.4
Junction-to-PCB Mounted
–––
Notes through are on page 2
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1
07/02/09
IRF7665S2TR/TR1PbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250µA
Parameter
Min.
100
–––
–––
3.0
Typ.
–––
0.10
51
Max.
–––
–––
62
Units
V
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 8.9A
V/°C
Ω
m
VDS = VGS, ID = 25µA
VGS(th)
4.0
5.0
V
VDS = 100V, VGS = 0V
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
–––
–––
–––
–––
3.5
20
µA
nA
Ω
VDS = 80V, VGS = 0V, TJ = 125°C
250
100
-100
5.0
V
GS = 20V
GS = -20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
V
RG(int)
Dynamic @ TJ = 25°C (unless otherwise specified)
Conditions
VDS = 25V, ID = 8.9A
Parameter
Forward Transconductance
Total Gate Charge
Min.
8.8
Typ.
–––
8.3
1.9
0.77
3.2
2.4
4.0
3.8
6.4
7.1
3.6
515
112
30
Max.
–––
13
Units
S
gfs
Qg
VDS = 50V
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
VGS = 10V
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs2
Qgd
ID = 8.9A
nC
See Fig. 6 and 17
Qgodr
Qsw
td(on)
tr
td(off)
tf
VDD = 50V
ID = 8.9A
Rise Time
RG = 6.8Ω
Turn-Off Delay Time
ns
VGS = 10V
Fall Time
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
VDS = 25V
Output Capacitance
ƒ = 1.0MHz
Reverse Transfer Capacitance
Output Capacitance
pF
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V
533
67
Output Capacitance
Effective Output Capacitance
115
Avalanche Characteristics
Typ.
–––
–––
Max.
37
Parameter
Units
mJ
EAS
IAR
Single Pulse Avalanche Energy
Avalanche Current
8.9
A
Diode Characteristics
Conditions
Parameter
Min.
Typ.
Max.
Units
MOSFET symbol
showing the
D
S
I
I
Continuous Source Current
(Body Diode)
S
–––
–––
14.4
A
G
integral reverse
p-n junction diode.
Pulsed Source Current
(Body Diode)
SM
–––
–––
58
T = 25°C, I = 8.9A, V = 0V
V
t
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
33
1.3
–––
–––
V
J
S
GS
SD
T = 25°C, I = 8.9A, VDD = 25V
ns
nC
J
F
rr
di/dt = 100A/µs
Q
38
rr
Notes:
Used double sided cooling , mounting pad.
Mounted on minimum footprint full size board with
metalized back and with small clip heatsink.
TC measured with thermal couple mounted to top
(Drain) of part.
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.944mH, RG = 25Ω, IAS = 8.9A.
Surface mounted on 1 in. square Cu board.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
R is measured at TJ of approximately 90°C.
θ
ꢀ Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from 0 to 80% VDSS
Based on testing done using a typical device & evaluation board
at Vbus=±45V, fSW=400KHz, and TA=25°C. The delta case
temperature ∆TC is 55°C.
.
2
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IRF7665S2TR/TR1PbF
100
10
1
100
10
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
TOP
TOP
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
BOTTOM
BOTTOM
1
0.1
5.0V
0.01
0.001
5.0V
60µs
60µs
PULSE WIDTH
Tj = 175°C
≤
PULSE WIDTH
Tj = 25°C
≤
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
100
I
= 8.9A
= 10V
D
V
GS
10
1
T
= -40°C
J
TJ = 25°C
TJ = 175°C
0.1
0.01
V
= 25V
DS
≤
60µs PULSE WIDTH
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
2
4
6
8
10 12 14 16
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
14.0
10000
1000
100
V
= 0V,
= C
f = 1 MHZ
GS
I
= 8.9A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
12.0
10.0
8.0
= C
rss
oss
gd
= C + C
V
= 80V
= 50V
DS
DS
ds
gd
V
VDS= 20V
C
iss
6.0
C
oss
4.0
C
rss
2.0
0.0
10
0
2
4
6
8
10
12
1
10
, Drain-to-Source Voltage (V)
100
Q , Total Gate Charge (nC)
V
G
DS
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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3
IRF7665S2TR/TR1PbF
1000
100
10
100
OPERATION IN THIS AREA
LIMITED BY R (on)
T
= -40°C
J
DS
TJ = 25°C
TJ = 175°C
10
1
100µsec
1msec
10msec
1
DC
0.1
0.01
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.01
V
= 0V
GS
0
1
10
100
1000
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
V
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
16
14
12
10
8
6.5
5.5
4.5
3.5
2.5
1.5
6
I
= 25µA
D
4
ID = 250µA
ID = 1.0mA
D = 1.0A
2
0
25
50
75
100
125
150
175
-75 -50 -25
0
25 50 75 100 125 150 175
T
, Case Temperature (°C)
T , Temperature ( °C )
C
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
10
D = 0.50
1
0.1
0.20
0.10
0.05
0.02
0.01
Ri (°C/W) τi (sec)
R1
R1
R2
R2
R3
R3
R4
R4
0.49687 0.000119
τ
τ
J τJ
τ
C
0.00517 8.231486
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
2.55852 0.018926
0.01
1.94004 0.002741
Notes:
SINGLE PULSE
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
4
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IRF7665S2TR/TR1PbF
140
120
100
80
320
280
240
200
160
120
80
Vgs = 10V
I
= 8.9A
D
T
= 125°C
J
T
= 125°C
J
T
= 25°C
60
T
= 25°C
J
J
40
40
6
7
8
9
10 11 12 13 14 15
0
10
I
20
, Drain Current (A)
30
40
D
V
Gate -to -Source Voltage (V)
GS,
Fig 13. On-Resistance vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
160
140
120
100
80
I
D
TOP
1.64A
3.04A
BOTTOM 8.90A
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
60
V
20V
GS
Ω
0.01
t
p
40
Fig 15a. Unclamped Inductive Test Circuit
20
0
V
(BR)DSS
25
50
75
100
125
150
175
t
p
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy vs. Drain Current
I
AS
Fig 15b. Unclamped Inductive Waveforms
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+VDD
-
10%
VGS
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
td(off)
tr
tf
Fig 16b. Switching Time Waveforms
Fig 16a. Switching Time Test Circuit
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5
IRF7665S2TR/TR1PbF
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
V
GS
Vgs(th)
3mA
I
I
D
G
Current Sampling Resistors
Qgs1
Qgs2
Qgd
Qgodr
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
D.U.T
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
+
-
VDD
• di/dt controlled by RG
RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
*
=10V
V
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
InductorCurrent
Forward Drop
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
6
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IRF7665S2TR/TR1PbF
DirectFET Auto Board Footprint, SB (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
CL
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
G
S
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7
IRF7665S2TR/TR1PbF
DirectFET Auto Outline Dimension, SB Outline (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
IMPERIAL
METRIC
MAX MIN
CODE
MIN
MAX
0.191
0.156
0.112
0.018
0.020
0.036
0.040
0.036
N/A
4.85
3.95
2.85
0.45
0.52
0.92
A
B
C
D
E
F
0.187
0.146
0.108
0.014
0.019
0.035
4.75
3.70
2.75
0.35
0.48
0.88
0.98
0.88
N/A
1.02 0.039
G
H
J
0.92
N/A
0.035
N/A
1.05 0.037
K
L
0.95
1.85
0.616
0.020
0.08
0.041
0.073
0.0274
0.0031
0.007
1.95
0.073
0.676
0.080
0.17
M
R
P
0.0235
0.0008
0.003
DirectFET Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF7665S2TR/TR1PbF
DirectFET Tape & Reel Dimension (Showing component orientation).
Loaded Tape Feed Direction
DIMENSIONS
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts.I
IRF7665S2PbF
NOTE: CONTROLLING
DIMENSIONS IN MM
METRIC
MAX
IMPERIAL
CODE
MIN
MIN
7.90
3.90
MAX
0.319
0.161
0.484
0.219
0.165
0.205
N.C
0.311
0.154
0.469
0.215
0.158
0.197
0.059
0.059
A
B
C
D
E
F
8.10
REEL DIMENSIONS
4.10
STANDARD OPTION (QTY 4800)
11.90
5.45
4.00
5.00
1.50
1.50
12.30
5.55
4.20
5.20
N.C
METRIC
MAX
IMPERIAL
MIN
CODE
MIN
MAX
N.C
A
B
C
D
E
F
12.992
0.795
0.504
0.059
3.937
N.C
330.0
20.2
12.8
1.5
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
N.C
G
H
0.520
N.C
0.063
1.60
100.0
N.C
N.C
0.724
0.567
0.606
G
H
0.488
0.469
12.4
11.9
Data and specifications subject to change without notice.
This product has been designed and qualified to MSL1 rating for the Industrial market.
Additional storage requirement details for DirectFET products can be found in application note AN1035 on IRs Web site.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/2009
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9
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