IRF7946TRPBF_技术文档

PD - 97780

StrongIRFET

IRF7946PbF

Applications

DirectFET^®Power MOSFET

l Brushed Motor drive applications

l BLDC Motor drive applications

l Battery powered circuits

l Half-bridge and full-bridge topologies

l Synchronous rectifier applications

l Resonant mode power supplies

l OR-ing and redundant power switches

l DC/DC and AC/DC converters

l DC/AC Inverters

V_DSS

40V

R_DS(on)typ.

max.

1.1m

1.4m



I_D

198A

90A

(Silicon Limited)

(Package Limited)

Benefits

G

S

D

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

DirectFET ISOMETRIC

MX

l Enhanced body diode dV/dt and dI/dt Capability

l RoHS Compliant Containing no Lead, no Bromide

and no Halogen

Ordering Information

Standard Pack

Form

Tape and Reel

Complete Part

Number

IRF7946TRPbF

IRF7946TR1PbF

Base part number

Package Type

Quantity

4800

1000

IRF7946TRPbF

IRF7946TR1PbF

DirectFET MX

6.0

4.0

2.0

0.0

200

150

100

50

I

= 90A

D

Limited By Package

T

= 125°C

J

T

= 25°C

J

0

4

6

8

10

12 14 16

18 20

25

50

75

, Case Temperature (°C)

C

100

125

150

T

V

Gate -to -Source Voltage (V)

GS,

Fig 2. Maximum Drain Current vs. Case Temperature

Fig 1. Typical On-Resistance vs. Gate Voltage

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1

04/23/12

IRF7946PbF

Absolute Maximum Ratings

Symbol

Parameter

Max.

198

Units

I_D@ T_C= 25°C

I_D@ T_C= 100°C

I_D@ T_C= 25°C

I_DM

Continuous Drain Current, V_GS@ 10V (Silicon Limited)

Continuous Drain Current, V_GS@ 10V (Package Limited)

Pulsed Drain Current

125

A

90

793

96

P_D@T_C= 25°C

Maximum Power Dissipation

W

0.77

Linear Derating Factor

W/°C

V

± 20

V_GS

T_J

Gate-to-Source Voltage

-55 to + 150

Operating Junction and

°C

T_STG

Storage Temperature Range

Avalanche Characteristics

E_{AS (Thermally limited)}

Single Pulse Avalanche Energy

85

163

mJ

E_{AS (tested)}

I_AR

Single Pulse Avalanche Energy Tested Value

Avalanche Current

See Fig. 14, 15, 22a, 22b

A

Repetitive Avalanche Energy

E_AR

mJ

Thermal Resistance

Symbol

Parameter

Typ.

–––

12.5

20

Max.

55

Units

R_

Junction-to-Ambient

JA

–––

1.3

JA

Junction-to-Ambient

Junction-to-Case

°C/W

JA

–––

1.0

JC

Junction-to-PCB Mounted

–––

JA-PCB

Static @ T_J= 25°C (unless otherwise specified)

Symbol

Parameter

Min. Typ. Max. Units

Conditions

V_(BR)DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

40

–––

0.03

1.1

–––

1.4

V

V_GS= 0V, I_D= 250μA

V_(BR)DSS/T_J

R_DS(on)

–––

V/°C Reference to 25°C, I_D= 1.0mA

m V_GS= 10V, I_D= 90A

1.7

–––

3.9

m V_GS= 6.0V, I_D= 72A

V_GS(th)

I_DSS

Gate Threshold Voltage

2.2

–––

3.0

V

V_DS= V_GS, I_D= 150μA

Drain-to-Source Leakage Current

–––

0.67

1.0

μA V_DS= 40V, V_GS= 0V

150

100

-100

–––

V

_DS= 40V, V_GS= 0V, T_J= 125°C

_GS= 20V

I_GSS

R_G

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Internal Gate Resistance

nA

V_GS= -20V



Notes:

T_Cmeasured with thermocouple mounted to top (Drain) of part.

Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

Used double sided cooling , mounting pad with large heatsink.

Mounted on minimum

footprint full size board with

metalized back and with small

clip heatsink (still air)

Mounted to a PCB with

small clip heatsink (still air)

Surface mounted on 1 in. square Cu

(still air).

2

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IRF7946PbF

Dynamic @ T_J= 25°C (unless otherwise specified)

Symbol

Parameter

Min. Typ. Max. Units

Conditions

gfs

Q_g

Forward Transconductance

91

–––

141

36

–––

212

–––

S

V_DS= 10V, I_D= 90A

Total Gate Charge

–––

nC I_D= 90A

V_DS=20V

Q_gs

Q_gd

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Total Gate Charge Sync. (Q_g- Q_gd)

Turn-On Delay Time

44

V_GS= 10V

Q_sync

t_d(on)

t_r

97

I_D= 90A, V_DS=0V, V_GS= 10V

20

ns V_DD= 20V

I_D= 30A

Rise Time

49

t_d(off)

t_f

Turn-Off Delay Time

54

R_G= 2.7

V_GS= 10V

Fall Time

41

C_iss

C_oss

C_rss

Input Capacitance

6852

1046

735

1307

1465

pF V_GS= 0V

Output Capacitance

V

_DS= 25V

Reverse Transfer Capacitance

Effective Output Capacitance (Energy Related)

Effective Output Capacitance (Time Related)

ƒ = 1.0 MHz

C

_osseff. (ER)

V

_GS= 0V, V_DS= 0V to 32V

C_osseff. (TR)

_GS= 0V, V_DS= 0V to 32V

Diode Characteristics

Symbol

Parameter

Min. Typ. Max. Units

Conditions

D

S

I_S

Continuous Source Current

–––

96

A

V

MOSFET symbol

(Body Diode)

Pulsed Source Current

showing the

integral reverse

G

I_SM

–––

793

(Body Diode)

p-n junction diode.

T_J= 25°C, I_S= 90A, V_GS= 0V

V_SD

Diode Forward Voltage

Peak Diode Recovery

Reverse Recovery Time

–––

0.75

1.6

49

1.2

–––

dv/dt

t_rr

V/ns T_J= 175°C, I_S= 90A, V_DS= 40V

ns T_J= 25°C

T_J= 125°C

V_R= 34V,

50

I_F= 90A

di/dt = 100A/μs

Q_rr

Reverse Recovery Charge

Reverse Recovery Current

74

nC T_J= 25°C

T_J= 125°C

73

I_RRM

2.6

A

T_J= 25°C

Notes:

Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 90A. Note that current

limitations arising from heating of the device leads may occur with

some lead mounting arrangements. (Refer to AN-1140)

Repetitive rating; pulse width limited by max. junction

temperature.

ꢀ Pulse width  400μs; duty cycle  2%.

C_osseff. (TR) is a fixed capacitance that gives the same charging time

as C_osswhile V_DSis rising from 0 to 80% V_DSS

C_osseff. (ER) is a fixed capacitance that gives the same energy as

C_osswhile V_DSis rising from 0 to 80% V_DSS

When mounted on 1" square PCB (FR-4 or G-10 Material). For recom

.

Limited by T_Jmax, starting T_J= 25°C, L = 0.021mH

R_G= 50, I_AS= 90A, V_GS=10V.

mended footprint and soldering techniques refer to application note #AN-994.

R_is measured at T_Japproximately 90°C.

This value determined from sample failure population,

starting T_J= 25°C, L= 0.021mH, R_G= 50, I_AS= 90A, V_GS=10V.

I_SD 90A, di/dt  1135A/μs, V_DDV_(BR)DSS, T_J 150°C.

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3

IRF7946PbF

1000

100

10

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

100

10

BOTTOM

4.5V

60μs PULSE WIDTH



60μs PULSE WIDTH



Tj = 150°C

Tj = 25°C

1

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 3. Typical Output Characteristics

Fig 4. Typical Output Characteristics

1000

1.8

1.6

1.4

1.2

1.0

0.8

0.6

I

= 90A

D

V

= 10V

GS

100

10

T = 150°C

J

T

= 25°C

J

V

= 10V

DS

60μs PULSE WIDTH

1.0

2

3

4

5

6

7

8

-60 -40 -20

0

20 40 60 80 100 120140 160

T

J

, Junction Temperature (°C)

V

, Gate-to-Source Voltage (V)

GS

Fig 6. Normalized On-Resistance vs. Temperature

Fig 5. Typical Transfer Characteristics

100000

10000

1000

14.0

V

= 0V,

= C

f = 1 MHZ

GS

I = 90A

D

C

+ C , C

SHORTED

ds

iss

gs

gd

12.0

= C

rss

oss

gd

= C + C

V

= 32V

= 20V

DS

ds

gd

10.0

8.0

6.0

4.0

2.0

0.0

C

iss

C

oss

rss

100

1

10

, Drain-to-Source Voltage (V)

100

0

20 40 60 80 100 120 140 160 180

V

DS

Q , Total Gate Charge (nC)

G

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

4

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IRF7946PbF

1000

100

10

10000

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

100μsec

T

= 150°C

1msec

J

Limited by

Package

10msec

DC

T

= 25°C

J

1

Tc = 25°C

0.1

Tj = 150°C

Single Pulse

V

GS

= 0V

1.0

0.01

0.1

1

10

100

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

, Source-to-Drain Voltage (V)

V

, Drain-to-Source Voltage (V)

V

DS

SD

Fig 10. Maximum Safe Operating Area

Fig 9. Typical Source-Drain Diode

Forward Voltage

1.4

48

47

46

45

44

43

42

41

40

Id = 1.0mA

V

= 0V to 32V

DS

1.2

1.0

0.8

0.6

0.4

0.2

0.0

0

5

10 15 20 25 30 35 40 45

Drain-to-Source Voltage (V)

-60 -40 -20

0

20 40 60 80 100 120140 160

, Temperature ( °C )

T

J

V

DS,

Fig 11. Drain-to-Source Breakdown Voltage

Fig 12. Typical C_OSSStored Energy

10.0

V

= 5.5V

= 6.0V

= 7.0V

= 8.0V

=10V

GS

V

8.0

6.0

4.0

2.0

0.0

0

200

400

600

800

1000

I , Drain Current (A)

D

Fig 13. Typical On-Resistance vs. Drain Current

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5

IRF7946PbF

10

1

0.1

D = 0.50

0.20

0.10

0.05

0.02

0.01

Notes:

SINGLE PULSE

( THERMAL RESPONSE )

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 125°C and

Tstart =25°C (Single Pulse)

1

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and

Tstart = 125°C.

0.1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

90

80

70

60

50

40

30

20

10

0

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in

excess of T_jmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. I_av= Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed T_jmax(assumed as

25°C in Figure 14, 15).

t_{av =}Average time in avalanche.

D = Duty cycle in avalanche = t_av·f

TOP

BOTTOM 1.0% Duty Cycle

= 90A

Single Pulse

I

D

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

25

50

75

100

125

150

E_{AS (AR)}= P_{D (ave)}·t_av

Starting T , Junction Temperature (°C)

J

Fig 16. Maximum Avalanche Energy vs. Temperature

6

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IRF7946PbF

16

14

12

10

8

4.0

3.5

3.0

2.5

2.0

1.5

1.0

I = 54A

F

V

= 34V

R

T = 25°C

J

T = 125°C

J

I

= 150μA

= 1.0mA

= 1.0A

D

6

4

2

0

200

400

600

800

1000

-75 -50 -25

0

25 50 75 100 125 150

di /dt (A/μs)

T , Temperature ( °C )

F

J

Fig. 18 - Typical Recovery Current vs. di_f/dt

Fig 17. Threshold Voltage vs. Temperature

16

350

I = 90A

F

I = 54A

F

14

V

= 34V

V

= 34V

R

300

250

200

150

100

50

T = 25°C

J

12

10

8

T = 125°C

J

T = 125°C

J

6

4

2

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 19 - Typical Recovery Current vs. di_f/dt

Fig. 20 - Typical Stored Charge vs. di_f/dt

400

I = 90A

F

V

350

300

250

200

150

100

50

= 34V

R

T = 25°C

J

T = 125°C

J

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 21 - Typical Stored Charge vs. di_f/dt

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7

IRF7946PbF

Driver Gate Drive

P.W.

Period

D.U.T

Period

D =

+

-

*

=10V

V

GS

Circuit Layout Considerations

 Low Stray Inductance

Ground Plane

Low Leakage Inductance

Current Transformer

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

Driver same type as D.U.T.

I_SDcontrolled by Duty Factor "D"

D.U.T. - Device Under Test

Inductor Current

Inductor Curent

I

SD

Ripple

 5%

* V_GS= 5V for Logic Level Devices

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

2V0_GV_S



0.01

t

p

I

AS

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

R_D

V_DS

V

DS

90%

V_GS

D.U.T.

R_G

+

V_DD

-

10V

V_GS

10%

Pulse Width µs

Duty Factor 

V

GS

t

r

t

f

d(on)

d(off)

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Id

Current Regulator

Same Type as D.U.T.

Vds

Vgs

50K

.2F

12V

.3F

+

V

DS

D.U.T.

-

Vgs(th)

V

GS

3mA

I

D

G

Qgs1

Qgs2

Qgd

Qgodr

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

8

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IRF7946PbF

DirectFET^®Board Footprint, MX Outline

(Medium Size Can, X-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

G=GATE

D=DRAIN

S=SOURCE

D

S

G

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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9

IRF7946PbF

DirectFET^®Outline Dimension, MX Outline

(Medium Size Can, X-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes

all recommendations for stencil and substrate designs.

DIMENSIONS

METRIC

IMPERIAL

CODE MIN MAX

MIN MAX

A

B

C

D

E

F

6.25 6.35 0.246 0.250

4.80 5.05 0.189 0.199

3.85 3.95 0.152 0.156

0.35 0.45 0.014 0.018

0.68 0.72 0.027 0.028

1.38 1.42 0.054 0.056

0.80 0.84 0.031 0.033

0.38 0.42 0.015 0.017

0.88 1.02 0.035 0.040

2.28 2.42 0.090 0.095

0.59 0.70 0.023 0.028

0.03 0.08 0.001 0.003

0.08 0.17 0.003 0.007

G

H

J

K

L

M

R

P

Dimensions are shown in

millimeters (inches)

DirectFET^®Part Marking

GATE MARKING

LOGO

PART NUMBER

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

10

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IRF7946PbF

DirectFET^®Tape & Reel Dimension (Showing component orientation).

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF7946TRPBF). For 1000 parts on 7"

reel, order IRF7946TR1PBF

REEL DIMENSIONS

STANDARD OPTION (QTY 4800)

METRIC IMPERIAL

TR1 OPTION (QTY 1000)

METRIC IMPERIAL

MIN

12.992

0.795

0.504

0.059

3.937

N.C

MIN

6.9

MAX

N.C

0.50

N.C

0.53

N.C

CODE

MAX

N.C

MIN

MAX

N.C

13.2

N.C

18.4

14.4

15.4

MIN

MAX

N.C

A

B

C

D

E

F

330.0

20.2

12.8

1.5

177.77

19.06

13.5

1.5

0.75

0.53

0.059

2.31

N.C

0.520

N.C

12.8

N.C

100.0

N.C

58.72

N.C

0.724

0.567

0.606

13.50

12.01

G

H

0.488

0.469

0.47

12.4

11.9

DIMENSIONS

METRIC

IMPERIAL

NOTE: CONTROLLING

DIMENSIONS IN MM

CODE

MIN

MAX

0.319

0.161

0.484

0.219

0.209

0.264

N.C

MAX

8.10

4.10

0.311

0.154

0.469

0.215

0.201

0.256

0.059

A

B

C

D

E

F

7.90

3.90

11.90 12.30

5.45

5.10

6.50

1.50

5.55

5.30

6.70

N.C

1.60

G

H

0.063

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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11

IRF7946PbF

Qualification information

†

Consumer^††

(per JEDEC JESD47F^†††guidelines)

Qualification level

MS L3

(per JE DE C J-S TD-020D^†††

Moisture Sensitivity Level

RoHS compliant

DFET 1.5

)

Yes

Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/

Higher qualification ratings may be available should the user have such requirements. Please contact your

International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/

Applicable version of JEDEC standard at the time of product release.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 04/2012

12

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型号：	IRF7946TRPBF
厂家：	Infineon
描述：	Brushed Motor drive applications
文件：	总12页 (文件大小：298K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRF7946TRPBF [INFINEON]

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