IRFB3006 [INFINEON]
The IR MOSFET™ family of power MOSFETs utilizes proven silicon processes offering designers a wide portfolio of devices to support various applications such as DC motors, inverters, SMPS, lighting, load switches as well as battery powered applications. The devices are available in a variety of surface mount and through-hole packages with industry standard footprints for ease of design. The optimized gate drive options enables designers the flexibility of selecting super, logic or normal level drives.;
| 型号： | IRFB3006 |
| 厂家： | 
Infineon |
| 描述： | The IR MOSFET™ family of power MOSFETs utilizes proven silicon processes offering designers a wide portfolio of devices to support various applications such as DC motors, inverters, SMPS, lighting, load switches as well as battery powered applications. The devices are available in a variety of surface mount and through-hole packages with industry standard footprints for ease of design. The optimized gate drive options enables designers the flexibility of selecting super, logic or normal level drives. |
| 文件： | 总10页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRFB3006PbF
HEXFET® Power MOSFET
Applications
l High Efficiency Synchronous Rectification
D
S
VDSS
RDS(on) typ.
max.
60V
2.1m
2.5m
in SMPS
l UninterruptiblePowerSupply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
G
ID
270A
(Silicon Limited)
ID
195A
(Package Limited)
Benefits
l Improved Gate, Avalanche and Dynamic
D
dV/dtRuggedness
l Fully Characterized Capacitance and
AvalancheSOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
D
G
l RoHS Compliant, Halogen-Free
TO-220AB
G
D
S
Gate
Drain
Source
Standard Pack
Form
Tube
Base Part Number
Package Type
Orderable Part Number
Quantity
IRFB3006PbF
TO-220
50
IRFB3006PbF
Absolute Maximum Ratings
Symbol
Parameter
Max.
270
190
195
1080
375
2.5
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
A
PD @TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
W/°C
V
VGS
± 20
10
Gate-to-Source Voltage
Peak Diode Recovery
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
°C
300
Soldering Temperature, for 10 seconds
(1.6mm from case)
10lb in (1.1N m)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
320
mJ
A
Avalanche Current
IAR
See Fig. 14, 15, 22a, 22b,
Repetitive Avalanche Energy
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.4
Units
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
0.50
–––
–––
62
°C/W
1
www.irf.com © 2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
60 ––– –––
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
V
ΔV(BR)DSS/ΔTJ
RDS(on)
–––
2.0
2.1
2.5
4.0
20
VGS = 10V, ID = 170A
mΩ
V
VGS(th)
–––
VDS = VGS, ID = 250μA
IDSS
Drain-to-Source Leakage Current
––– –––
μA VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
nA VGS = 20V
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
VGS = -20V
–––
2.0
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 25V, ID = 170A
280 ––– –––
S
Qg
––– 200 300
nC ID = 170A
VDS =30V
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
–––
–––
37
60
–––
Qgd
VGS = 10V
Qsync
––– 140 –––
––– 16 –––
ID = 170A, VDS =0V, VGS = 10V
ns VDD = 39V
ID = 170A
R = 2.7
td(on)
tr
Rise Time
––– 182 –––
––– 118 –––
––– 189 –––
––– 8970 –––
––– 1020 –––
––– 534 –––
––– 1480 –––
––– 1920 –––
td(off)
Turn-Off Delay Time
Ω
G
tf
Fall Time
VGS = 10V
pF VGS = 0V
VDS = 50V
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
oss eff. (TR)
Effective Output Capacitance (Time Related)
ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER)
VGS = 0V, VDS = 0V to 48V , See Fig. 11
VGS = 0V, VDS = 0V to 48V
C
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
––– –––
A
MOSFET symbol
D
270
(Body Diode)
Pulsed Source Current
showing the
integral reverse
G
ISM
––– ––– 1080
A
S
(Body Diode)
p-n junction diode.
VSD
trr
Diode Forward Voltage
––– –––
1.3
–––
–––
–––
–––
–––
V
TJ = 25°C, IS = 170A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
–––
44
48
63
77
2.4
ns
IF = 170A
di/dt = 100A/μs
Qrr
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
someleadmountingarrangements. (RefertoAN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
ISD ≤ 170A, di/dt ≤ 1360A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
Limited by TJmax, starting TJ = 25°C, L = 0.022mH
RG = 25Ω, IAS = 170A, VGS =10V. Part not recommended for use
above this value .
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
2
www.irf.com © 2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
VGS
15V
TOP
TOP
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM
BOTTOM
3.5V
60μs PULSE WIDTH
3.5V
1
≤
60μs PULSE WIDTH
≤
Tj = 175°C
Tj = 25°C
1
0.1
1
10
100
0.1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
1000
100
10
I
= 170A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
V
= 25V
DS
60μs PULSE WIDTH
≤
1
2.0
3.0
4.0
5.0
6.0
7.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
V
, Gate-to-Source Voltage (V)
GS
T
, Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
16000
12000
8000
4000
0
16
V
C
= 0V,
f = 1 MHZ
GS
I = 170A
D
= C + C , C SHORTED
iss
gs
gd ds
V
V
= 48V
= 30V
DS
DS
C
= C
rss
gd
C
= C + C
12
8
oss
ds
gd
C
iss
4
C
oss
C
rss
0
0
40
80
120 160 200 240 280
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
www.irf.com © 2014 International Rectifier
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
Submit Datasheet Feedback
3
April 23, 2014
IRFB3006PbF
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100μsec
LIMITED BY PACKAGE
1msec
T
J
= 25°C
10msec
DC
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.0
0.4
0.8
1.2
1.6
2.0
0.1
1
10
100
V
, Drain-toSource Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
80
75
70
65
60
55
300
250
200
150
100
50
I
= 5mA
LIMITED BY PACKAGE
D
0
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
T
, Junction Temperature (°C)
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
1400
2.0
1.5
1.0
0.5
0.0
I
D
1200
1000
800
600
400
200
0
TOP
20A
27A
170A
BOTTOM
0
10
V
20
30
40
50
60
25
50
75
100
125
150
175
Drain-to-Source Voltage (V)
Starting T , Junction Temperature (°C)
DS,
J
Fig 11. Typical COSS Stored Energy
www.irf.com © 2014 International Rectifier
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
Submit Datasheet Feedback
4
April 23, 2014
IRFB3006PbF
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
τι
0.01
(sec)
Ri (°C/W)
0.02
0.01
τJ
τC
τJ
τ1
0.175365 0.000343
0.22547 0.006073
τ
2τ2
τ1
Ci= τi/Ri
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
400
300
200
100
0
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1% Duty Cycle
= 170A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com © 2014 International Rectifier
5
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
4.0
3.5
3.0
2.5
2.0
1.5
1.0
20
16
12
8
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250μA
I
= 112A
F
V
= 51V
R
4
T
= 125°C
= 25°C
J
J
T
0
100
200
300
400
500
600
700
800
-75 -50 -25
0
J
25 50 75 100 125 150 175
, Temperature ( °C )
di / dt - (A / μs)
T
f
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage Vs. Temperature
20
700
600
500
400
300
16
12
8
I
= 170A
= 51V
I
= 112A
= 51V
200
100
0
F
F
V
V
T
R
4
0
R
T
= 125°C
= 25°C
= 125°C
= 25°C
J
J
T
T
J
J
100
200
300
400
500
600
700
800
100
200
300
400
500
600
700
800
di / dt - (A / μs)
di / dt - (A / μs)
f
f
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
700
600
500
400
300
200
100
0
I
= 170A
= 51V
F
V
T
R
= 125°C
= 25°C
J
T
J
100
200
300
400
500
600
700
800
di / dt - (A / μs)
f
Fig. 20 - Typical Stored Charge vs. dif/dt
www.irf.com © 2014 International Rectifier Submit Datasheet Feedback
6
April 23, 2014
IRFB3006PbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2μF
12V
.3μF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
www.irf.com © 2014 International Rectifier
Fig 24b. Gate Charge Waveform
Submit Datasheet Feedback
7
April 23, 2014
IRFB3006PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
INTERNATIONAL
RECTIFIER LOGO
INTERNATIONAL
RECTIFIER LOGO
PART NUMBER
PART NUMBER
DATE CODE
P = LEAD-FREE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
? = ASSEMBLY SITE CODE
IRFB3006
IRFB3006
DATE CODE
OR
ASSEMBLY
LOT CODE
ASSEMBLY
LOT CODE
Y = LAST DIGIT OF YEAR
WW = WORK WEEK
P = LEAD-FREE
PYWW?
YWWP
LC
LC
LC
LC
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
www.irf.com © 2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IRFB3006PbF
Qualification information
†
Qualification level
Industrial
(per JEDEC JESD47F††guidelines)
Moisture Sensitivity Level
RoHS compliant
TO-220
Not applicable
Yes
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
•
•
•
Updated data sheet with new IR corporate template.
Updated package outline & part marking on page 8.
4/23/2014
Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
9
www.irf.com © 2014 International Rectifier
Submit Datasheet Feedback
April 23, 2014
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
相关型号：
IRFB3206
The IR MOSFET™ family of power MOSFETs utilizes proven silicon processes offering designers a wide portfolio of devices to support various applications such as DC motors, inverters, SMPS, lighting, load switches as well as battery powered applications. The devices are available in a variety of surface mount and through-hole packages with industry standard footprints for ease of design. The optimized gate drive options enables designers the flexibility of selecting super, logic or normal level drives.
INFINEON
©2020 ICPDF网 联系我们和版权申明