IRFB4103PBF_技术文档

PD - 96909

IRFB4103PbF

Key Parameters

DIGITAL AUDIO MOSFET

Features

• Key parameters optimized for Class-D audio

amplifier applications

V_DS

200

139

25

V

m:

nC

Ω

R

_DS(ON)typ. @ 10V

• Low R_DSONfor improved efficiency

• Low Q_Gand Q_SWfor better THD and improved

efficiency

Q_gtyp.

Q

_swtyp.

15

R_G(int)typ.

1.0

175

T_Jmax

°C

• Low Q_RRfor better THD and lower EMI

• 175°C operating junction temperature for

ruggedness

D

S

• Can deliver up to 300W per channel into 8Ω load in

half-bridge topology

G

TO-220AB

Description

This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes

thelatestprocessingtechniquestoachievelowon-resistancepersiliconarea.Furthermore,Gatecharge,body-diode

reverse recovery and internal Gate resistance are optimized to improve key Class-D audio amplifier performance

factors such as efficiency, THD and EMI. Additional features of this MOSFET are 175°C operating junction

temperature and repetitive avalanche capability. These features combine to make this MOSFET a highly efficient,

robust and reliable device for ClassD audio amplifier applications.

Absolute Maximum Ratings

Parameter

Drain-to-Source Voltage

Max.

200

±30

17

Units

V

V_DS

V_GS

Gate-to-Source Voltage

I_D@ T_C= 25°C

I_D@ T_C= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current c

A

12

68

Power Dissipation f

P_D@T_C= 25°C

P_D@T_C= 100°C

140

71

W

Power Dissipation f

Linear Derating Factor

Operating Junction and

0.95

W/°C

°C

T_J

-55 to + 175

T_STG

Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

300

10lbxin (1.1Nxm)

Mounting torque, 6-32 or M3 screw

Thermal Resistance

Parameter

Typ.

Max.

1.05

–––

62

Units

Junction-to-Case f

R_θJC

R_θCS

R_θJA

–––

0.50

–––

Case-to-Sink, Flat, Greased Surface

°C/W

Junction-to-Ambient f

Notes through ꢀare on page 2

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1

1/5/05

IRFB4103PbF

Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

Conditions

V_GS= 0V, I_D= 250µA

BV_DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

200

–––

3.0

–––

0.21

139

–––

-13

–––

25

–––

165

5.5

V

∆ΒV_DSS/∆T_J

R_DS(on)

V/°C Reference to 25°C, I_D= 1mA

mΩ

V_GS= 10V, I_D= 12A

V_GS(th)

V

V_DS= V_GS, I_D= 250µA

∆V_GS(th)/∆T_J

I_DSS

Gate Threshold Voltage Coefficient

Drain-to-Source Leakage Current

–––

7.1

––– mV/°C

25

250

100

-100

–––

38

µA V_DS= 200V, V_GS= 0V

V

_DS= 200V, V_GS= 0V, T_J= 125°C

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Forward Transconductance

Total Gate Charge

nA V_GS= 30V

V_GS= -30V

g_fs

S

V_DS= 50V, I_D= 12A

Q_g

–––

Q_gs1

Q_gs2

Q_gd

Q_godr

Q_sw

R_G(int)

t_d(on)

t_r

Pre-Vth Gate-to-Source Charge

Post-Vth Gate-to-Source Charge

Gate-to-Drain Charge

5.4

2.9

12

–––

V_DS= 160V

_GS= 10V

nC

V

I_D= 12A

Gate Charge Overdrive

4.7

15

See Fig. 6 and 19

Switch Charge (Q_gs2+ Q_gd

Internal Gate Resistance

Turn-On Delay Time

Rise Time

)

1.0

9.6

40

Ω

V_DD= 100V, V_GS= 10V

I_D= 12A

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

16

ns

R

_G= 2.5Ω

5.4

900

120

22

C_iss

C_oss

C_rss

C_oss

L_D

Input Capacitance

Output Capacitance

V

_GS= 0V

pF V_DS= 50V

ƒ = 1.0MHz,

Reverse Transfer Capacitance

Effective Output Capacitance

Internal Drain Inductance

See Fig.5

150

4.5

V_GS= 0V, V_DS= 0V to 160V

Between lead,

D

S

nH 6mm (0.25in.)

from package

G

L_S

Internal Source Inductance

–––

7.5

–––

and center of die contact

Avalanche Characteristics

Parameter

Typ.

Max.

Units

Single Pulse Avalanche Energy

Avalanche Current

E_AS

I_AR

–––

130

mJ

See Fig. 14, 15, 17a, 17b

A

Repetitive Avalanche Energy

E_AR

mJ

Diode Characteristics

Parameter

Continuous Source Current

Min. Typ. Max. Units

Conditions

MOSFET symbol

I_S@ T_C= 25°C

–––

17

(Body Diode)

A

showing the

I_SM

Pulsed Source Current

–––

68

integral reverse

(Body Diode)

p-n junction diode.

V_SD

t_rr

Diode Forward Voltage

–––

130

730

1.7

200

110

V

T_J= 25°C, I_S= 10A, V_GS= 0V

Reverse Recovery Time

ns T_J= 25°C, I_F= 12A

di/dt = 100A/µs

nC

Q_rr

Reverse Recovery Charge

Notes:

Repetitive rating; pulse width limited by max. junction temperature.

Starting T_J= 25°C, L = 1.78mH, R_G= 25Ω, I_AS= 12A.

Pulse width ≤ 400µs; duty cycle ≤ 2%.

R is measured at T_Jof approximately 90°C.

ꢀ Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive

avalanche information

θ

2

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IRFB4103PbF

100

10

1

100

10

1

VGS

15V

12V

VGS

15V

12V

TOP

10V

9.0V

8.0V

7.0V

6.0V

9.0V

8.0V

7.0V

6.0V

BOTTOM

6.0V

≤ 60µs PULSE WIDTH

Tj = 175°C

Tj = 25°C

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

3.5

3.0

2.5

2.0

1.5

1.0

0.5

100.0

I

= 17A

D

V

= 10V

GS

10.0

1.0

T

= 175°C

J

T

= 25°C

J

V

= 50V

DS

≤ 60µs PULSE WIDTH

0.1

2.0

4.0

6.0

8.0

10.0

12.0

-60 -40 -20

0

20 40 60 80 100 120 140 160 180

V

, Gate-to-Source Voltage (V)

GS

T

, Junction Temperature (°C)

J

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance vs. Temperature

10000

20

V

C

= 0V,

f = 1 MHZ

I = 12A

D

GS

= C + C , C SHORTED

iss

gs

gd ds

V

= 160V

DS

C

= C

rss

gd

16

12

8

VDS= 100V

VDS= 40V

C

= C + C

oss

ds

gd

1000

100

10

Ciss

Coss

4

Crss

0

10

20

30

40

1

10

100

1000

Q

Total Gate Charge (nC)

G

V

, Drain-to-Source Voltage (V)

DS

Fig 5. Typical Capacitance vs.Drain-to-Source Voltage

Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage

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3

IRFB4103PbF

100.0

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R (on)

T

= 175°C

DS

J

10.0

1.0

100µsec

1msec

T

= 25°C

J

10msec

1

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

DC

GS

0.1

1

10

100

1000

0.0

0.5

1.0

1.5

2.0

V

, Drain-toSource Voltage (V)

V

, Source-to-Drain Voltage (V)

DS

SD

Fig 7. Typical Source-Drain Diode Forward Voltage

Fig 8. Maximum Safe Operating Area

20

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

16

12

8

I

= 250µA

D

4

0

25

50

75

100

125

150

175

-75 -50 -25

0

25 50 75 100 125 150 175

T , Temperature ( °C )

J

T

, Junction Temperature (°C)

J

Fig 10. Threshold Voltage vs. Temperature

Fig 9. Maximum Drain Current vs. Case Temperature

10

1

D = 0.50

0.20

R₁

R₂

R₃

0.10

0.1

Ri (°C/W) τi (sec)

0.1624 0.000094

0.4354 0.001831

0.4517 0.018175

τ

^Jτ_J

τ

0.05

^Cτ

τ

¹τ₁

τ

²τ₂

³τ₃

0.02

0.01

Ci= τi/Ri

τ /

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

SINGLE PULSE

( THERMAL RESPONSE )

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

4

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IRFB4103PbF

600

500

400

300

200

100

0

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

I

= 12A

I

D

TOP

3.7A

6.2A

12A

BOTTOM

T

= 125°C

= 25°C

J

6.0

8.0

V

10.0

12.0

14.0

16.0

18.0

25

50

75

100

125

150

175

, Gate-to-Source Voltage (V)

GS

Starting T , Junction Temperature (°C)

J

Fig 12. On-Resistance Vs. Gate Voltage

Fig 13. Maximum Avalanche Energy Vs. Drain Current

100

Duty Cycle = Single Pulse

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses. Note: In no

case should Tj be allowed to

exceed Tjmax

10

0.01

0.05

0.10

1

0.1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 14. Typical Avalanche Current Vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 17a, 17b.

140

120

100

80

TOP

BOTTOM 1% Duty Cycle

= 12A

Single Pulse

I

D

60

4. P_{D (ave)}= Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

40

6. I_av= Allowable avalanche current.

20

7. ∆T = Allowable rise in junction temperature, not to exceed

T_jmax(assumed as 25°C in Figure 14, 15).

t_{av =}Average time in avalanche.

0

25

50

75

100

125

150

175

D = Duty cycle in avalanche = t_av·f

Z_thJC(D, t_av) = Transient thermal resistance, see figure 11)

Starting T , Junction Temperature (°C)

J

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

Fig 15. Maximum Avalanche Energy Vs. Temperature

E_{AS (AR)}= P_{D (ave)}·t_av

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5

IRFB4103PbF

Driver Gate Drive

P.W.

Period

D =

D.U.T

+

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

-

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Current

Inductor Curent

I

SD

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

V

20V

GS

0.01

Ω

t

p

I

AS

Fig 17b. Unclamped Inductive Waveforms

Fig 17a. Unclamped Inductive Test Circuit

L_D

V_DS

90%

+

-

V_DD

10%

V_GS

D.U.T

V_GS

Pulse Width < 1µs

Duty Factor < 0.1%

t_d(on)

t_d(off)

t_r

t_f

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

Id

Vds

Vgs

L

VCC

DUT

Vgs(th)

0

1K

Qgs1

Qgs2

Qgd

Qgodr

Fig 19a. Gate Charge Test Circuit

Fig 19b Gate Charge Waveform

6

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IRFB4103PbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

10.54 (.415)

- B -

3.78 (.149)

3.54 (.139)

10.29 (.405)

2.87 (.113)

2.62 (.103)

4.69 (.185)

4.20 (.165)

1.32 (.052)

1.22 (.048)

- A -

6.47 (.255)

6.10 (.240)

4

15.24 (.600)

14.84 (.584)

1.15 (.045)

MIN

LEAD ASSIGNMENTS

1 - GATE

1

2

3

2 - DRAIN

3 - SOURCE

4 - DRAIN

14.09 (.555)

13.47 (.530)

4.06 (.160)

3.55 (.140)

0.93 (.037)

0.69 (.027)

0.55 (.022)

0.46 (.018)

3X

1.40 (.055)

3X

1.15 (.045)

0.36 (.014)

M

B A M

2.92 (.115)

2.64 (.104)

2.54 (.100)

2X

NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

2 CONTROLLING DIMENSION : INCH

3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.

4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

EXAMPLE: T HIS IS AN IRF1010

LOT CODE 1789

PART NUMBER

AS S EMBLED ON WW 19, 1997

IN T HE AS S EMBLY LINE "C"

INT ERNATIONAL

RECT IFIER

LOGO

Note: "P" in assembly line

position indicates "Lead-Free"

DAT E CODE

YEAR 7 = 1997

WEEK 19

AS S EMBLY

LOT CODE

LINE C

TO-220AB packages are not recommended for Surface Mount Application.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 01/05

www.irf.com

7


型号：	IRFB4103PBF
厂家：	Infineon
描述：	DIGITAL AUDIO MOSFET 数字音频MOSFET
文件：	总7页 (文件大小：241K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFB4103PBF [INFINEON]

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