IRFB7434 [INFINEON]
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;型号: | IRFB7434 |
厂家: | Infineon |
描述: | The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. |
文件: | 总10页 (文件大小:493K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
StrongIRFET™
IRFB7434PbF
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
RDS(on) typ.
max
40V
1.25m
1.6m
ID (Silicon Limited)
ID (Package Limited)
317A
195A
Benefits
S
D
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
G
RoHS Compliant, Halogen-Free*
G
D
S
Gate
Drain
Source
Base part number
Package Type
Standard Pack
Form
Orderable Part Number
Quantity
IRFB7434PbF
TO-220
Tube
50
IRFB7434PbF
5
4
3
2
1
0
350
300
250
200
150
100
50
I
= 100A
D
Limited By Package
T
= 125°C
J
T
= 25°C
J
0
2
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
V
Gate -to -Source Voltage (V)
T
C
, Case Temperature (°C)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
2018-07-10
IRFB7434PbF
Absolute Maximum Rating
Symbol
Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
317
224
195
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
1270
294
PD @TC = 25°C
Maximum Power Dissipation
W
W/°C
V
Linear Derating Factor
1.96
± 20
VGS
Gate-to-Source Voltage
TJ
TSTG
Operating Junction and
Storage Temperature Range
-55 to + 175
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
490
Single Pulse Avalanche Energy
mJ
1098
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
IAR
EAR
A
mJ
See Fig 15, 16, 23a, 23b
Thermal Resistance
Symbol
Parameter
Typ.
–––
0.50
–––
Max.
0.51
–––
62
Units
Junction-to-Case
RJC
RCS
RJA
Case-to-Sink, Flat Greased Surface
°C/W
Junction-to-Ambient
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Min. Typ. Max. Units
40 ––– –––
Conditions
VGS = 0V, ID = 250µA
V
––– 0.032 –––
––– 1.25 1.6
V/°C Reference to 25°C, ID = 5mA
V(BR)DSS/TJ
V
V
GS = 10V, ID = 100A
GS = 6.0V, ID = 50A
VDS = VGS, ID = 250µA
DS =40 V, VGS = 0V
DS =40V,VGS = 0V,TJ =125°C
GS = 20V
RDS(on)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
m
V
–––
2.2
––– –––
1.8
3.0
–––
3.9
1.0
VGS(th)
V
V
V
V
IDSS
Drain-to-Source Leakage Current
µA
––– ––– 150
––– ––– 100
––– ––– -100
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
IGSS
RG
nA
GS = -20V
–––
2.1
–––
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.099mH,RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1307A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L= 1mH, RG = 50, IAS = 47A, VGS =10V.
*
Halogen -Free since April 30, 2014
2
2018-07-10
IRFB7434PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min.
211
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
–––
216
51
–––
324
–––
–––
–––
–––
–––
S
VDS = 10V, ID =100A
Qg
ID = 100A
Qgs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
VDS = 20V
VGS = 10V
nC
Qgd
77
Qsync
td(on)
tr
139
24
VDD = 20V
ID = 30A
Rise Time
68
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
115
68
–––
–––
RG= 2.7
V
GS = 10V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 10820 –––
VGS = 0V
–––
–––
1540
1140
–––
–––
VDS = 25V
ƒ = 1.0MHz, See Fig.5
pF
Effective Output Capacitance
(Energy Related)
Coss eff.(ER)
Coss eff.(TR)
–––
–––
1880
2208
–––
–––
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min.
Typ. Max. Units
Conditions
MOSFET symbol
D
Continuous Source Current
(Body Diode)
IS
–––
––– 317
showing the
A
G
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
ISM
–––
–––
–––
0.9
1270
1.3
S
VSD
Diode Forward Voltage
V
TJ = 25°C,IS = 100A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
–––
–––
–––
–––
–––
–––
5.0
38
37
50
50
1.9
––– V/ns TJ = 175°C,IS = 100A,VDS = 40V
–––
–––
–––
–––
–––
TJ = 25°C
VDD = 34V
IF = 100A,
trr
Reverse Recovery Time
ns
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
TJ = 125°C
TJ = 25°C
IRRM
3
2018-07-10
IRFB7434PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
1
4.5V
60µs
Tj = 25°C
PULSE WIDTH
60µs
Tj = 175°C
PULSE WIDTH
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
100
10
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
= 100A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 10V
DS
60µs PULSE WIDTH
0.1
2
4
6
8
10
-60
-20
T
20
60
100
140
180
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
J
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14.0
1000000
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 100A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
12.0
= C
rss
oss
gd
V
V
= 32V
= 20V
DS
DS
= C + C
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
C
oss
rss
100
0
50
100
150
200
250
300
0.1
1
10
100
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Typical Gate Charge vs.
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Gate-to-Source Voltage
4
2018-07-10
IRFB7434PbF
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100µsec
1msec
Limited By Package
T
= 25°C
J
10msec
DC
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.0
0.5
1.0
1.5
2.0
2.5
0.1
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
1.6
50
Id = 5.0mA
V
= 0V to 32V
DS
49
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
48
47
46
45
44
43
42
41
40
0
5
10 15 20 25 30 35 40 45
-60
-20
20
60
100
140
180
T
, Temperature ( °C )
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
20.0
V
= 6.0V
GS
V
= 5.5V
GS
15.0
10.0
5.0
VGS = 7.0V
VGS = 8.0V
VGS = 10V
0.0
0
100
200
300
400
500
I , Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
5
2018-07-10
IRFB7434PbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
600
500
400
300
200
100
0
TOP
Single Pulse
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
BOTTOM 1.0% Duty Cycle
= 100A
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)· av
t
Fig 16. Maximum Avalanche Energy vs. Temperature
6
2018-07-10
IRFB7434PbF
10
8
4.5
3.5
2.5
1.5
0.5
I
= 60A
F
V
= 34V
R
T = 25°C
J
T = 125°C
J
6
4
ID = 250µA
ID = 1.0mA
ID = 1.0A
2
0
0
200
400
600
800
1000
-75
-25
T
25
75
125
175
225
di /dt (A/µs)
, Temperature ( °C )
F
J
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
240
220
200
180
160
140
120
100
80
10
I
= 60A
= 34V
I
= 100A
= 34V
F
F
V
V
R
R
8
6
4
2
0
T = 25°C
J
T = 125°C
J
T = 25°C
J
T = 125°C
J
60
40
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
200
I
= 100A
F
V
= 34V
R
160
120
80
T = 25°C
J
T = 125°C
J
40
0
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
7
2018-07-10
IRFB7434PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
8
2018-07-10
IRFB7434PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
E X A M P L E :
T H I S I S A N I R F 1 0 1 0
L O 1 7 8 9
A S S E M B L E D
I N T H A S S E M B L Y L I N
P A R T
N
U
M
E
B E R
T
C O D E
I N T E R N A T I O
R E C T I F I E R
L O
N A L
O
N
W
W
1 9 , 2 0 0 0
" C
G
O
E
E
"
D
A T E
Y E A R
E E K 1 9
L I N
C
O
D
0
=
2 0 0 0
N
o t e : " P " i n a s s e m b ly lin e p o s it io n
in d ic a t e s " L e a d F r e e "
A S S E M B L Y
L O
W
-
T
C O D E
E
C
TO-220AB packages are not recommended for Surface Mount Application.
9
2018-07-10
IRFB7434PbF
Qualification Information
Qualification Level
Industrial
(per JEDEC JESD47F) †
TO-220
N/A
Yes
Moisture Sensitivity Level
RoHS Compliant
†
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
Updated data sheet with new IR corporate template.
Updated package outline and part marking on page 9.
4/22/2014
Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
Updated EAS (L =1mH) = 1098mJ on page 2
Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 47A, VGS =10V”. on page 2
Updated datasheet with corporate template.
Corrected typo for Fig 10 (package limit from 10ms curve to DC curve) –on page 5
11/18/2014
07/10/2018
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™, SPOC™,
StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
Edition 2016-04-19
Published by
Infineon Technologies AG
81726 Munich, Germany
For further information on the product, technology,
delivery terms and conditions and prices please contact
The information given in this document shall in no event
be regarded as a guarantee of conditions or
your
nearest
Infineon
Technologies
office
characteristics (“Beschaffenheitsgarantie”) .
(www.infineon.com).
With respect to any examples, hints or any typical values
stated herein and/or any information regarding the
application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities of
any kind, including without limitation warranties of non-
infringement of intellectual property rights of any third
party.
Please note that this product is not qualified according to
the AEC Q100 or AEC Q101 documents of the Automotive
Electronics Council.
© 2016 Infineon Technologies AG.
All Rights Reserved.
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In addition, any information given in this document is dangerous substances. For information on the types in
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Technologies’ products may not be used in any
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to such application.
consequences of the use thereof can reasonably be
expected to result in personal injury.
10
2018-07-10
相关型号:
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