IRFB7740PBF_技术文档

StrongIRFET™

IRFB7740PbF

HEXFET^®Power MOSFET

Application

 Brushed Motor drive applications

 BLDC Motor drive applications

Battery powered circuits

 Half-bridge and full-bridge topologies

 Synchronous rectifier applications

 Resonant mode power supplies

 OR-ing and redundant power switches

 DC/DC and AC/DC converters

 DC/AC Inverters

D

V_DSS

75V

R_DS(on)typ.

6.0m

7.3m

87A

G

max

I_D

S

Benefits

S

D

G

 Improved Gate, Avalanche and Dynamic dV/dt Ruggedness

 Fully Characterized Capacitance and Avalanche SOA

 Enhanced body diode dV/dt and dI/dt Capability

 Lead-Free, RoHS Compliant

TO-220AB

IRFB7740PbF

G

D

S

Gate

Drain

Source

Standard Pack

Form

Base part number

Package Type

Orderable Part Number

Quantity

IRFB7740PbF

TO-220

Tube

50

IRFB7740PbF

100

80

60

40

20

0

30

25

20

15

10

5

I

= 52A

D

T = 125°C

J

T = 25°C

J

0

4

8

12

16

20

25

50

75

100

125

150

175

V

, Gate-to-Source Voltage (V)

GS

T

, CaseTemperature (°C)

C

Fig 2. Maximum Drain Current vs. Case Temperature

Fig 1. Typical On-Resistance vs. Gate Voltage

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IRFB7740PbF

Absolute Maximum Rating

Symbol

Parameter

Max.

87

Units

I_D@ T_C= 25°C

Continuous Drain Current, V_GS@ 10V

I_D@ T_C= 100°C Continuous Drain Current, V_GS@ 10V

62

A

I_DM

Pulsed Drain Current 

Maximum Power Dissipation

Linear Derating Factor

275

143

P_D@T_C= 25°C

W

W/°C

V

0.95

± 20

V_GS

Gate-to-Source Voltage

T_J

T_STG

Operating Junction and

Storage Temperature Range

-55 to + 175

°C

Soldering Temperature, for 10 seconds (1.6mm from case)

300

Mounting Torque, 6-32 or M3 Screw

10 lbf·in (1.1 N·m)

Avalanche Characteristics

E_{AS (Thermally limited)}

I_AR

E_AR

160

241

Single Pulse Avalanche Energy 

Single Pulse Avalanche Energy 

Avalanche Current 

mJ

A

mJ

See Fig. 15, 16, 23a, 23b

Repetitive Avalanche Energy 

Thermal Resistance

Symbol

Parameter

Typ.

–––

0.50

–––

Max.

1.05

–––

62

Units

Junction-to-Case 

R_JC

R_CS

R_JA

Case-to-Sink, Flat Greased Surface

°C/W

Junction-to-Ambient 

Static @ T_J= 25°C (unless otherwise specified)

Symbol

V_(BR)DSS

Parameter

Min. Typ. Max. Units

75 ––– –––

––– 0.05 ––– V/°C Reference to 25°C, I_D= 1mA 

Conditions

V_GS= 0V, I_D= 250µA

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

V

V_(BR)DSS/T_J

R_DS(on)

–––

2.1 –––

––– –––

––– ––– 150

––– ––– 100

––– ––– -100

6.0

7.1

7.3

–––

3.7

V_GS= 10V, I_D= 52A 

m

V_GS= 6.0V, I_D= 26A 



V_GS(th)

I_DSS

Gate Threshold Voltage

V

V_DS= V_GS, I_D= 100µA

1.0

V

_DS=75 V, V_GS= 0V

Drain-to-Source Leakage Current

µA

V_DS=75V,V_GS= 0V,T_J=125°C

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Gate Resistance

V

_GS= 20V

_GS= -20V

I_GSS

R_G

nA

–––

2.0

–––



Notes:

Repetitive rating; pulse width limited by max. junction temperature.

 Limited by T_Jmax, starting T_J= 25°C, L = 0.117mH, R_G= 50, I_AS= 52A, V_GS=10V.

I_SD 52A, di/dt  503A/µs, V_DD V_(BR)DSS, T_J175°C.

Pulse width  400µs; duty cycle  2%.

 C_osseff. (TR) is a fixed capacitance that gives the same charging time as C_osswhile V_DSis rising from 0 to 80% V_DSS

.

 C_osseff. (ER) is a fixed capacitance that gives the same energy as C_osswhile V_DSis rising from 0 to 80% V_DSS

.

 R_is measured at T_Japproximately 90°C.

 Limited by T_Jmax, starting T_J= 25°C, L = 1mH, R_G= 50, I_AS= 22A, V_GS=10V.

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IRFB7740PbF

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol

gfs

Parameter

Forward Transconductance

Total Gate Charge

Min.

167

–––

Typ. Max. Units

Conditions

V_DS= 10V, I_D=52A

I_D= 52A

–––

81

21

27

54

12

60

–––

122

–––

S

Q_g

Q_gs

Gate-to-Source Charge

Gate-to-Drain Charge

Total Gate Charge Sync. (Qg– Qgd)

Turn-On Delay Time

V_DS= 38V

nC

Q_gd

V_GS= 10V

Q_sync

t_d(on)

t_r

V_DD= 38V

I_D= 52A

Rise Time

ns

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

–––

55

45

–––

R_G= 2.7

V_GS= 10V

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

4650

370

240

V_GS= 0V

V_DS= 25V

ƒ = 1.0MHz, See Fig.7

pF

Effective Output Capacitance

(Energy Related)

C_{oss eff.(ER)}

C_{oss eff.(TR)}

–––

330

425

–––

V_GS= 0V, VDS = 0V to 60V

V_GS= 0V, VDS = 0V to 60V

Output Capacitance (Time Related)

Diode Characteristics

Symbol

Parameter

Min.

Typ. Max. Units

Conditions

MOSFET symbol

D

Continuous Source Current

(Body Diode)

I_S

–––

87

showing the

A

G

Pulsed Source Current

(Body Diode)

integral reverse

p-n junction diode.

I_SM

–––

275

1.2

S

V_SD

Diode Forward Voltage

V

T_J= 25°C,I_S= 52A,V_GS= 0V 

dv/dt

Peak Diode Recovery dv/dt

–––

10

41

51

46

62

2.3

––– V/ns T_J= 175°C,I_S=52A,V_DS= 75V

–––

T_J= 25°C

V_DD= 64V

I_F= 52A,

t_rr

Reverse Recovery Time

ns

T_J= 125°C

T_J= 25°C di/dt = 100A/µs 

Q_rr

Reverse Recovery Charge

Reverse Recovery Current

nC

A

T_J= 125°C

T_J= 25°C



I_RRM

3

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IRFB7740PbF

1000

100

10

1000

100

10

VGS

15V

10V

7.0V

6.0V

5.5V

5.0V

4.8V

4.5V

VGS

15V

10V

7.0V

6.0V

5.5V

5.0V

4.8V

4.5V

TOP

BOTTOM

4.5V

60µs PULSE WIDTH



Tj = 175°C



Tj = 25°C

1

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

DS

V

, Drain-to-Source Voltage (V)

DS

Fig 4. Typical Output Characteristics

Fig 3. Typical Output Characteristics

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

1000

100

10

I

= 52A

V

= 25V

D

DS

V

= 10V

60µs PULSE WIDTH



GS

T = 175°C

J

T = 25°C

J

1

0.1

2.0

3.0

4.0

5.0

6.0

-60 -40 -20

0

20 40 60 80 100 120 140 160 180

V

, Gate-to-Source Voltage (V)

GS

T , Junction Temperature (°C)

J

Fig 6. Normalized On-Resistance vs. Temperature

Fig 5. Typical Transfer Characteristics

14

100000

V

= 0V,

f = 1 MHZ

GS

I = 52A

D

C

= C + C , C SHORTED

V

= 60V

= 38V

15V

iss

gs

gd

ds

gd

ds

DS

12

10

8

= C

rss

oss

+ C

gd

DS=

10000

1000

100

Ciss

6

4

Coss

Crss

2

0

10 20 30 40 50 60 70 80 90 100

Total Gate Charge (nC)

1

10

100

Q

G

V

, Drain-to-Source Voltage (V)

DS

Fig 8. Typical Gate Charge vs.

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

Gate-to-Source Voltage

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IRFB7740PbF

1000

100

10

100µsec

1msec

100

10

1

T = 175°C

J

10msec

OPERATION IN THIS AREA

LIMITED BY R (on)

DS

T = 25°C

J

1

Tc = 25°C

Tj = 175°C

Single Pulse

DC

V

= 0V

GS

0.1

1

10

0.2

0.4

V

0.6

0.8

1.0

1.2

1.4

V

, Drain-toSource Voltage (V)

DS

, Source-to-Drain Voltage (V)

SD

Fig 10. Maximum Safe Operating Area

Fig 9. Typical Source-Drain Diode Forward Voltage

0.8

95

Id = 1.0mA

0.6

0.4

0.2

0.0

90

85

80

75

0

20

40

60

80

-60 -40 -20 0 20 40 60 80 100120140160180

V

Drain-to-Source Voltage (V)

DS,

T , Temperature ( °C )

J

Fig 11. Drain-to-Source Breakdown Voltage

Fig 12. Typical C_ossStored Energy

20.0

V

= 5.5V

= 6.0V

= 7.0V

= 8.0V

= 10V

GS

16.0

12.0

8.0

4.0

0

50

100

150

200

I , Drain Current (A)

D

Fig 13. Typical On-Resistance vs. Drain Current

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IRFB7740PbF

10

1

D = 0.50

0.20

0.10

0.1

0.05

0.02

0.01

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

SINGLE PULSE

( THERMAL RESPONSE )

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100

10

1

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 150°C and



Tstart =25°C (Single Pulse)

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and



Tstart = 150°C. (Single Pulse)

0.1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Avalanche Current vs. Pulse Width

160

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1.Avalanche failures assumption:

TOP

BOTTOM 1.0% Duty Cycle

= 52A

Single Pulse

140

120

100

80

I

D

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for every

part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not

exceeded.

3. Equation below based on circuit and waveforms shown in Figures

23a, 23b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage

increase during avalanche).

60

40

6. I_av= Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed T_jmax

(assumed as 25°C in Figure 14, 15).

20

0

t_av= Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

25

50

75

100

125

150

175

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

Starting T , Junction Temperature (°C)

J

PD (ave) = 1/2 ( 1.3·BV·I_av) = T/ Z_thJC

I

_av= 2T/ [1.3·BV·Z_th]

E_{AS (AR)}= P_{D (ave)· av}

t

Fig 16. Maximum Avalanche Energy vs. Temperature

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IRFB7740PbF

4.0

3.0

2.0

1.0

0.0

16

12

8

I

= 36A

= 64V

F

V

R

T = 25°C

J

T = 125°C

J

I

= 100µA

= 1.0mA

= 1.0A

D

I

D

I

D

4

0

-60 -40 -20

0

20 40 60 80 100 120 140 160 180

0

200

400

600

800

1000

T , Temperature ( °C )

J

di /dt (A/µs)

F

Fig 17. Threshold Voltage vs. Temperature

Fig 18. Typical Recovery Current vs. dif/dt

16

280

240

200

160

120

80

I

= 52A

= 64V

I

= 36A

= 64V

F

V

R

T = 25°C

J

12

8

T = 125°C

J

T = 125°C

J

4

40

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/µs)

F

Fig 19. Typical Recovery Current vs. dif/dt

Fig 20. Typical Stored Charge vs. dif/dt

280

I

= 52A

= 64V

F

240

200

160

120

80

V

R

T = 25°C

J

T = 125°C

J

40

0

200

400

600

800

1000

di /dt (A/µs)

F

Fig 21. Typical Stored Charge vs. dif/dt

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IRFB7740PbF

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET^®Power MOSFETs

V

(BR)DSS

t

p

15V

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

20V

I

0.01



t

p

AS

Fig 23a. Unclamped Inductive Test Circuit

Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit

Fig 24b. Switching Time Waveforms

Id

Vds

Vgs

VDD

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

Fig 25b. Gate Charge Waveform

Fig 25a. Gate Charge Test Circuit

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IRFB7740PbF

TO-220AB Package Outline (Dimensions are shown in millimeters (inches))

TO-220AB Part Marking Information

E X A M P L E :

T H IS IS A N IR F 1 0 1 0

L O C O D E 1 7 8 9

A S S E M B L E D

IN T H E A S S E M B L Y L IN E "C "

P A R T N U M B E R

D A T E C O D E

T

IN T E R N A T IO N A L

R E C T IF IE R

L O G O

O

N

W

1 9 , 2 0 0 0

Y E A R

E E K 1 9

L IN E

0

=

2 0 0 0

N o t e : "P " in a s s e m b ly lin e p o s it io n

in d ic a t e s "L e a d F r e e "

A S S E M B L Y

W

-

L O

T C O D E

C

TO-220AB packages are not recommended for Surface Mount Application.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFB7740PbF

Qualification Information^†

Qualification Level

Industrial

(per JEDEC JESD47F) ^††

TO-220

N/A

Yes

Moisture Sensitivity Level

RoHS Compliant

†

Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/

†† Applicable version of JEDEC standard at the time of product release.

Revision History

Date

Comment

8/29/2014

Updated latest package outline on page 9.

Updated E_{AS (L =1mH)}= 241mJ on page 2

03/05/2015

Updated note 8 “Limited by T_Jmax, starting T_J= 25°C, L = 1mH, R_G= 50, I_AS= 22A, V_GS=10V” on page 2

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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型号：	IRFB7740PBF
厂家：	Infineon
描述：	Power Field-Effect Transistor
文件：	总10页 (文件大小：530K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFB7740PBF [INFINEON]

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