IRFH8202PBF_15 [INFINEON]

Compatible with Existing Surface Mount Techniques;
IRFH8202PBF_15
型号: IRFH8202PBF_15
厂家: Infineon    Infineon
描述:

Compatible with Existing Surface Mount Techniques

文件: 总9页 (文件大小:272K)
中文:  中文翻译
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StrongIRFET™  
IRFH8202TRPbF  
HEXFET® Power MOSFET  
VDS  
RDS(on) max  
(@VGS = 10V)  
Qg (typical)  
25  
V
1.05  
m
Ω
52  
nC  
RG (typical)  
1.3  
Ω
ID  
100  
A
PQFN 5X6 mm  
(@TC(Bottom) = 25°C)  
Applications  
OR-ing MOSFET for 12V (typical) Bus in-Rush Current  
Battery Operated DC Motor Inverter MOSFET  
FeaturesandBenefits  
Features  
Benefits  
Low RDSon (<1.05 mΩ)  
Low Thermal Resistance to PCB (<0.8°C/W)  
Low Profile (<0.9 mm)  
Lower Conduction Losses  
Enable better thermal dissipation  
Increased Power Density  
Multi-Vendor Compatibility  
Easier Manufacturing  
results in  
Industry-Standard Pinout  
Compatible with Existing Surface Mount Techniques  
RoHS Compliant Containing no Lead, no Bromide and no Halogen  
MSL1, Industrial Qualification  
Environmentally Friendlier  
Increased Reliability  
Standard Pack  
Quantity  
Base part number  
Package Type  
Orderable part number  
Form  
IRFH8202PbF  
PQFN 5mm x 6mm  
Tape and Reel  
4000  
IRFH8202TRPbF  
Absolute Maximum Ratings  
Parameter  
Max.  
± 20  
47  
Units  
V
VGS  
Gate-to-Source Voltage  
ID @ TA = 25°C  
Continuous Drain Current, VGS @ 10V  
ID @ TA = 70°C  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current  
30  
100  
100  
400  
3.6  
A
I
D @ TC(Bottom) = 25°C  
D @ TC(Bottom) = 100°C  
I
IDM  
Power Dissipation  
Power Dissipation  
PD @TA = 25°C  
PD @TC(Bottom) = 25°C  
W
160  
Linear Derating Factor  
Operating Junction and  
0.029  
W/°C  
°C  
TJ  
-55 to + 150  
TSTG  
Storage Temperature Range  
Notes  through † are on page 9  
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1
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Ma1y9, 2015  
IRFH8202TRPbF  
Static @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min.  
25  
Typ.  
–––  
0.02  
0.90  
1.40  
1.80  
-6.3  
–––  
–––  
–––  
–––  
–––  
110  
52  
Max.  
–––  
–––  
1.05  
1.85  
2.35  
–––  
5.0  
Units  
V
Conditions  
VGS = 0V, ID = 250μA  
BVDSS  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
ΔΒVDSS/ΔTJ  
RDS(on)  
–––  
–––  
–––  
1.35  
–––  
–––  
–––  
–––  
–––  
181  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
V/°C  
Reference to 25°C, ID = 1mA  
V
GS = 10V, ID = 50A  
VGS = 4.5V, ID = 50A  
DS = VGS, ID = 150μA  
mΩ  
V
VGS(th)  
ΔVGS(th)  
IDSS  
Gate Threshold Voltage  
V
Gate Threshold Voltage Coefficient  
Drain-to-Source Leakage Current  
mV/°C  
VDS = 20V, VGS = 0V  
VDS = 20V, VGS = 0V, TJ = 125°C  
VGS = 20V  
μA  
150  
100  
-100  
–––  
–––  
78  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Forward Transconductance  
Total Gate Charge  
nA  
VGS = -20V  
gfs  
S
VDS = 13V, ID = 50A  
Qg  
nC  
VGS = 10V, VDS = 13V, ID = 50A  
Qg  
Total Gate Charge  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Qsw  
Qoss  
RG  
Pre-Vth Gate-to-Source Charge  
Post-Vth Gate-to-Source Charge  
Gate-to-Drain Charge  
Gate Charge Overdrive  
Switch Charge (Qgs2 + Qgd)  
Output Charge  
13  
–––  
–––  
–––  
–––  
–––  
–––  
2.6  
VDS = 13V  
VGS = 4.5V  
ID = 50A  
7.8  
17  
nC  
15  
25  
36  
1.3  
28  
nC  
Ω
VDS = 16V, VGS = 0V  
Gate Resistance  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
VDD = 13V, VGS = 4.5V  
ID = 50A  
Rise Time  
46  
ns  
Turn-Off Delay Time  
Fall Time  
30  
RG=1.8Ω  
19  
Ciss  
Coss  
Crss  
Input Capacitance  
7174  
1758  
828  
VGS = 0V  
pF  
Output Capacitance  
VDS = 13V  
Reverse Transfer Capacitance  
ƒ = 1.0MHz  
Avalanche Characteristics  
Parameter  
Single Pulse Avalanche Energy  
Avalanche Current  
Typ.  
–––  
–––  
Max.  
468  
50  
Units  
mJ  
EAS  
IAR  
A
Diode Characteristics  
Parameter  
Min.  
Typ.  
Max.  
Units  
Conditions  
IS  
Continuous Source Current  
MOSFET symbol  
D
S
–––  
–––  
100  
(Body Diode)  
showing the  
A
G
ISM  
Pulsed Source Current  
integral reverse  
–––  
–––  
400  
(Body Diode)  
p-n junction diode.  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
–––  
–––  
–––  
–––  
37  
1.0  
56  
V
TJ = 25°C, IS = 50A, VGS = 0V  
ns  
nC  
TJ = 25°C, IF = 50A, VDD = 13V  
di/dt = 200A/μs  
Qrr  
Reverse Recovery Charge  
68  
102  
Thermal Resistance  
Parameter  
Typ.  
0.5  
Max.  
0.8  
15  
Units  
Junction-to-Case  
Junction-to-Case  
Junction-to-Ambient  
Junction-to-Ambient  
RθJC(Bottom)  
RθJC (Top)  
°C/W  
–––  
–––  
–––  
Rθ  
35  
JA  
RθJA (<10s)  
21  
2
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Ma1y9, 2015  
IRFH8202TRPbF  
1000  
100  
10  
1000  
100  
10  
VGS  
10V  
VGS  
10V  
TOP  
TOP  
5.0V  
4.5V  
3.5V  
3.3V  
3.0V  
2.9V  
2.7V  
5.0V  
4.5V  
3.5V  
3.3V  
3.0V  
2.9V  
2.7V  
BOTTOM  
BOTTOM  
2.7V  
2.7V  
60μs  
Tj = 150°C  
PULSE WIDTH  
60μs  
PULSE WIDTH  
Tj = 25°C  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 2. Typical Output Characteristics  
Fig 1. Typical Output Characteristics  
1000  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I
= 50A  
D
V
= 10V  
GS  
100  
T
= 150°C  
J
10  
1
T
= 25°C  
J
V
= 15V  
DS  
60μs PULSE WIDTH  
0.1  
1
1.5  
2
2.5  
3
3.5 4.5  
4
5
-60 -40 -20  
0
20 40 60 80 100 120140 160  
T
J
, Junction Temperature (°C)  
V
, Gate-to-Source Voltage (V)  
GS  
Fig 4. Normalized On-Resistance Vs. Temperature  
Fig 3. Typical Transfer Characteristics  
14.0  
100000  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I
= 50A  
D
C
C
C
+ C , C  
SHORTED  
iss  
gs  
gd  
ds  
12.0  
10.0  
8.0  
V
V
= 20V  
= 13V  
= C  
DS  
DS  
rss  
oss  
gd  
= C + C  
ds  
gd  
10000  
1000  
100  
C
iss  
C
6.0  
oss  
C
rss  
4.0  
2.0  
0.0  
0
20  
40  
60  
80  
100 120 140  
1
10  
, Drain-to-Source Voltage (V)  
100  
Q , Total Gate Charge (nC)  
V
G
DS  
Fig 5. Typical Capacitance Vs.Drain-to-Source Voltage  
Fig 6. Typical Gate Charge Vs.Gate-to-Source Voltage  
3
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Ma1y9, 2015  
IRFH8202TRPbF  
1000  
100  
10  
10000  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R (on)  
DS  
T
= 150°C  
J
100μsec  
1msec  
10msec  
DC  
Limited by Package  
T
= 25°C  
J
1
1
Tc = 25°C  
Tj = 150°C  
Single Pulse  
V
= 0V  
1.4  
GS  
0.1  
0.1  
0.2  
0.4  
V
0.6  
0.8  
1.0  
1.2  
1.6  
0.1  
1
10  
100  
, Source-to-Drain Voltage (V)  
SD  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 7. Typical Source-Drain Diode Forward Voltage  
Fig 8. Maximum Safe Operating Area  
350  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
300  
Limited By Package  
250  
200  
150  
100  
50  
I
= 1.0A  
D
ID = 1.0mA  
ID = 500μA  
ID = 150μA  
0
25  
50  
T
75  
100  
125  
150  
-75 -50 -25  
0
25 50 75 100 125 150  
, Case Temperature (°C)  
T
J
, Temperature ( °C )  
C
Fig 9. Maximum Drain Current Vs.  
Fig 10. Threshold Voltage Vs. Temperature  
Case (Bottom) Temperature  
1
D = 0.50  
0.20  
0.1  
0.01  
0.10  
0.05  
0.02  
0.01  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.0001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)  
4
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Ma1y9, 2015  
IRFH8202TRPbF  
4
3
2
1
0
2000  
1800  
1600  
1400  
1200  
1000  
800  
I
D
I
= 50A  
D
TOP  
18A  
24A  
BOTTOM 50A  
T
= 125°C  
J
600  
T
= 25°C  
J
400  
200  
0
2
4
6
8
10 12 14 16 18 20  
25  
50  
75  
100  
125  
150  
V
Gate -to -Source Voltage (V)  
Starting T , Junction Temperature (°C)  
GS,  
J
Fig 13. Maximum Avalanche Energy vs. Drain Current  
Fig 12. On-Resistance vs. Gate Voltage  
1000  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming ΔTj = 125°C and  
Tstart =25°C (Single Pulse)  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming ΔΤ j = 25°C and  
Tstart = 125°C.  
1
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14. Typical Avalanch Current vs. Pulsewidth  
5
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Ma1y9, 2015  
IRFH8202TRPbF  
Driver Gate Drive  
P.W.  
P.W.  
D =  
Period  
D.U.T  
Period  
+
*
=10V  
V
GS  
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
R
G
V
DD  
-
I
A
AS  
20V  
I
Ω
0.01  
AS  
t
p
Fig 16a. Unclamped Inductive Test  
Fig 16b. Unclamped Inductive Waveforms  
Circuit  
RD  
VDS  
VDS  
90%  
VGS  
D.U.T.  
RG  
+VDD  
-
10%  
VGS  
VGS  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1  
td(on)  
td(off)  
tr  
tf  
Fig 17a. Switching Time Test Circuit  
Fig 17b. Switching Time Waveforms  
Id  
Vds  
Vgs  
L
VCC  
DUT  
0
Vgs(th)  
1K  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 18a. Gate Charge Test Circuit  
Fig 18b. Gate Charge Waveform  
6
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Ma1y9, 2015  
IRFH8202TRPbF  
PQFN 5x6 Outline "B" Package Details  
PQFN 5x6 Outline "G" Package Details  
For more information on board mounting, including footprint and stencil recommendation, please refer to application note AN-1136:  
http://www.irf.com/technical-info/appnotes/an-1136.pdf  
For more information on package inspection techniques, please refer to application note AN-1154:  
http://www.irf.com/technical-info/appnotes/an-1154.pdf  
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/  
7
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Ma1y9, 2015  
IRFH8202TRPbF  
PQFN 5x6 Part Marking  
INTERNATIONAL  
RECTIFIER LOGO  
DATE CODE  
PART NUMBER  
XXXX  
XYWWX  
XXXXX  
(“4 or 5 digits”)  
ASSEMBLY  
SITE CODE  
(Per SCOP 200-002)  
MARKING CODE  
(Per Marking Spec)  
PIN 1  
IDENTIFIER  
LOT CODE  
(Eng Mode - Min last 4 digits of EATI#)  
(Prod Mode - 4 digits of SPN code)  
PQFN 5x6 Tape and Reel  
REEL DIMENSIONS  
TAPE DIMENSIONS  
CODE  
Ao  
DES CRIPTION  
Dimens ion des ign to accommodate the component width  
Dimension design to accommodate the component lenght  
Dimens ion des ign to accommodate the component thicknes s  
Overall width of the carrier tape  
Bo  
Ko  
W
P
1
Pitch between s ucces s ive cavity centers  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Note: All dimension arenominal  
Package  
Type  
R eel  
Diameter  
(Inch)  
QT Y  
Reel  
Width  
W1  
Ao  
Bo  
Ko  
P1  
W
Pin 1  
(mm)  
(mm)  
(mm)  
(mm)  
(mm)  
Quadrant  
(mm)  
5 X 6 PQFN  
13  
4000  
12.4  
6.300  
5.300  
1.20  
8.00  
12  
Q1  
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/  
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Ma1y9, 2015  
IRFH8202TRPbF  
Qualification information†  
Industrial  
Qualification level  
(per JEDEC JESD47F guidelines )  
MS L 1  
Moisture Sensitivity Level  
RoHS compliant  
PQFN 5mm x 6mm  
(per JEDEC J-S TD-020D††)  
Yes  
†
Qualification standards can be found at International Rectifier’s web site  
http://www.irf.com/product-info/reliability  
†† Applicable version of JEDEC standard at the time of product release.  
Notes:  
 Repetitive rating; pulse width limited by max. junction temperature.  
‚ Starting TJ = 25°C, L = 0.37mH, RG = 25Ω, IAS = 50A.  
ƒ Pulse width 400μs; duty cycle 2%.  
„ R is measured at TJ of approximately 90°C.  
θ
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.  
http://www.irf.com/technical-info/appnotes/an-994.pdf  
† Calculated continuous current based on maximum allowable junction temperature. Package is limited to 100A by production  
test capability  
Revision History  
Date  
Comments  
IR  
8/1/2013  
Added "Strong FET™" above part number on page 1  
Updated package outline for “option B” and added package outline for “option G” on page 7  
Updated tape and reel on page 8.  
4/28/2015  
5/19/2015  
Updated package outline for “option G” on page 7.  
Updated "IFX logo" on page 1 and page 9.  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA  
To contact International Rectifier, please visit http://www.irf.com/whoto-call/  
9
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Ma1y9, 2015  

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