IRFI4212H-117P [INFINEON]
DIGITAL AUDIO MOSFET; 数字音频MOSFET型号: | IRFI4212H-117P |
厂家: | Infineon |
描述: | DIGITAL AUDIO MOSFET |
文件: | 总6页 (文件大小:251K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97249A
DIGITAL AUDIO MOSFET
IRFI4212H-117P
Features
Key Parameters
g
Integrated half-bridge package
Reduces the part count by half
Facilitates better PCB layout
Key parameters optimized for Class-D
audio amplifier applications
Low RDS(ON) for improved efficiency
Low Qg and Qsw for better THD and
improved efficiency
VDS
R
Qg typ.
Qsw typ.
100
V
m:
nC
nC
Ω
DS(ON) typ. @ 10V
58
12
6.9
3.4
150
RG(int) typ.
TJ max
°C
Low Qrr for better THD and lower EMI
Can delivery up to 150W per channel into
4Ω load in half-bridge configuration
amplifier
Lead-free package
TO-220 Full-Pak 5 PIN
G1, G2
Gate
D1, D2
Drain
S1, S2
Source
Description
This Digital Audio MosFET Half-Bridge is specifically designed for Class D audio amplifier applications. It
consists of two power MosFET switches connected in half-bridge configuration. The latest process is used
to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery,
and internal Gate resistance are optimized to improve key Class D audio amplifier performance factors
such as efficiency, THD and EMI. These combine to make this Half-Bridge a highly efficient, robust and
reliable device for Class D audio amplifier applications.
Absolute Maximum Ratings
g
Parameter
Drain-to-Source Voltage
Max.
100
±20
11
Units
V
VDS
VGS
Gate-to-Source Voltage
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current c
A
6.8
44
Power Dissipation f
PD @TC = 25°C
PD @TC = 100°C
18
W
Power Dissipation f
7.0
Linear Derating Factor
Single Pulse Avalanche Energyd
0.14
41
W/°C
mJ
EAS
TJ
Operating Junction and
-55 to + 150
°C
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
10lbxin (1.1Nxm)
Mounting torque, 6-32 or M3 screw
Thermal Resistance
g
Parameter
Typ.
Max.
7.1
Units
Junction-to-Case f
RθJC
RθJA
–––
–––
°C/W
Junction-to-Ambient (free air)
65
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1
08/21/06
IRFI4212H-117P
Electrical Characteristics @ T = 25°C (unless otherwise specified)
g
J
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
100
–––
–––
3.0
–––
0.09
58
–––
–––
72.5
5.0
V
∆ΒVDSS/∆TJ
RDS(on)
V/°C Reference to 25°C, ID = 1mA
mΩ
VGS = 10V, ID = 6.6A e
VGS(th)
–––
-11
–––
–––
–––
–––
–––
12
V
VDS = VGS, ID = 250µA
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
11
––– mV/°C
20
250
200
-200
–––
18
µA
VDS = 100V, VGS = 0V
VDS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
nA VGS = 20V
VGS = -20V
gfs
S
VDS = 50V, ID = 6.6A
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
Qgs2
Qgd
Qgodr
Qsw
RG(int)
td(on)
tr
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
1.6
0.71
6.2
3.5
6.9
3.4
4.7
8.3
9.5
4.3
490
64
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
VDS = 80V
nC VGS = 10V
ID = 6.6A
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Internal Gate Resistance
Turn-On Delay Time
See Fig. 6 and 15
Ω
VDD = 50V, VGS = 10Vꢁe
Rise Time
ID = 6.6A
td(off)
tf
Turn-Off Delay Time
ns RG = 2.5Ω
Fall Time
Ciss
Coss
Crss
Input Capacitance
VGS = 0V
Output Capacitance
pF
VDS = 50V
Reverse Transfer Capacitance
Effective Output Capacitance
Internal Drain Inductance
34
ƒ = 1.0MHz,
See Fig.5
Coss eff.
110
4.5
VGS = 0V, VDS = 0V to 80V
Between lead,
LD
D
S
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
Diode Characteristics
g
Parameter
Min. Typ. Max. Units
Conditions
IS @ TC = 25°C
ISM
Continuous Source Current
–––
–––
11
MOSFET symbol
(Body Diode)
Pulsed Source Current
(Body Diode)ꢁc
A
showing the
integral reverse
–––
–––
44
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
36
1.3
54
84
V
TJ = 25°C, IS = 6.6A, VGS = 0V e
ns TJ = 25°C, IF = 6.6A
Qrr
di/dt = 100A/µs
e
56
nC
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 1.9mH, RG = 25Ω, IAS = 6.6A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
R is measured at TJ of approximately 90°C.
θ
ꢀ Specifications refer to single MosFET.
2
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IRFI4212H-117P
100
10
1
100
10
1
VGS
15V
12V
VGS
15V
12V
TOP
TOP
10V
10V
9.0V
8.0V
7.0V
6.0V
9.0V
8.0V
7.0V
6.0V
BOTTOM
BOTTOM
6.0V
6.0V
60µs PULSE WIDTH
Tj = 150°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
100
2.5
2.0
1.5
1.0
0.5
I
= 6.6A
D
V
= 10V
GS
10
1
T
= 150°C
J
T
= 25°C
J
V
= 50V
DS
≤
60µs PULSE WIDTH
0.1
3
4
5
6
7
8
9
-60 -40 -20
0
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
10000
1000
100
12.0
V
= 0V,
= C
f = 1 MHZ
GS
I
= 6.6A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
V
V
V
= 80V
= 50V
= 20V
= C
10.0
8.0
6.0
4.0
2.0
0.0
DS
DS
DS
rss
oss
gd
= C + C
ds
gd
C
iss
C
oss
C
rss
10
1
10
100
0
2
4
6
8
10
12
14
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
Fig 5. Typical CaDpSacitance vs.Drain-to-Source Voltage
G
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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3
IRFI4212H-117P
100
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 150°C
J
10
1
100µsec
1
T
= 25°C
J
0.1
1msec
10msec
Tc = 25°C
Tj = 150°C
Single Pulse
0.01
0.001
V
= 0V
GS
DC
0.1
0.0
0.5
1.0
1.5
1
10
100
1000
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
12
4.5
10
8
4.0
3.5
3.0
2.5
2.0
1.5
I
= 250µA
D
6
4
2
0
25
50
75
100
125
150
-75 -50 -25
0
25 50 75 100 125 150
T
J
, Junction Temperature (°C)
T
, Temperature ( °C )
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Junction Temperature
10
D = 0.50
0.20
0.10
1
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.02
0.01
0.7942
1.3536
2.2345
2.7177
0.000208
0.001434
0.100647
1.9398
τ
0.1
τ
J τJ
τ
Cτ
τ
1τ1
τ
τ
2τ2
3τ3
4τ4
Ci= τi/Ri
SINGLE PULSE
0.01
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
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IRFI4212H-117P
200
175
150
125
100
75
175
150
125
100
75
I
I
= 6.6A
D
D
TOP
1.2A
2.1A
BOTTOM 6.6A
T
= 125°C
J
50
T
= 25°C
J
25
50
0
4
5
6
7
8
9
10 11 12 13 14 15 16
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
V
Gate -to -Source Voltage (V)
GS,
Fig 13a. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
0.01Ω
t
p
I
AS
Fig 13c. Unclamped Inductive Waveforms
Fig 13b. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 14a. Switching Time Test Circuit
Fig 14b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b Gate Charge Waveform
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5
IRFI4212H-117P
TO-220 Full-Pak 5-Pin Package Outline, Lead-Form Option 117
(Dimensions are shown in millimeters (inches))
TO-220 Full-Pak 5-Pin Part Marking Information
TO-220AB Full-Pak 5-Pin package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/06
6
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