IRFPS38N60L [INFINEON]
SMPS MOSFET; 开关电源MOSFET
| 型号： | IRFPS38N60L |
| 厂家： | 
Infineon |
| 描述： | SMPS MOSFET |
| 文件： | 总9页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94630
SMPS MOSFET
IRFPS38N60L
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
Trr typ.
VDSS RDS(on) typ.
120m
ID
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
• Motor Control applications
600V
Ω
170ns 38A
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
• Higher Gate voltage threshold offers improved noise immunity.
SUPER TO-247AC
Absolute Maximum Ratings
Parameter
Max.
38
Units
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
24
IDM
150
540
Pulsed Drain Current
PD @TC = 25°C
Power Dissipation
W
Linear Derating Factor
Gate-to-Source Voltage
4.3
±30
W/°C
V
VGS
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
13
V/ns
-55 to + 150
TSTG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
1.1(10)
N•m (lbf•in)
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
––– ––– 38
Conditions
MOSFET symbol
D
I
I
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
––– ––– 150
SM
S
(Body Diode)
p-n junction diode.
V
t
T = 25°C, I = 38A, V = 0V
J S GS
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.5
V
SD
T = 25°C, I = 38A
––– 170 250
––– 420 630
ns
rr
J
F
TJ = 125°C, di/dt = 100A/µs
Q
rr
T = 25°C, I = 38A, V = 0V
Reverse Recovery Charge
––– 830 1240 nC
––– 2600 3900
J
S
GS
TJ = 125°C, di/dt = 100A/µs
IRRM
T = 25°C
J
Reverse Recovery Current
Forward Turn-On Time
––– 9.1
14
A
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
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1
02/12/03
IRFPS38N60L
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
600
–––
0.41
120
–––
–––
–––
–––
–––
1.2
–––
V
∆
V
∆
(BR)DSS/ TJ
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
3.0
150
5.0
VGS = 10V, ID = 23A
VDS = VGS, ID = 250µA
mΩ
V
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
50
µA VDS = 600V, VGS = 0V
mA VDS = 480V, VGS = 0V, TJ = 125°C
nA VGS = 30V
2.0
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
100
-100
–––
VGS = -30V
Ω
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 23A
20
–––
–––
–––
–––
44
–––
320
85
S
–––
–––
–––
–––
–––
–––
–––
ID = 38A
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 480V
VGS = 10V, See Fig. 7 & 15
VDD = 300V
ns ID = 38A
Qgd
160
–––
–––
–––
–––
td(on)
tr
130
92
td(off)
Turn-Off Delay Time
Fall Time
RG = 4.3Ω
tf
69
VGS = 10V, See Fig. 11a & 11b
VGS = 0V
Ciss
Input Capacitance
––– 7990 –––
Coss
Output Capacitance
–––
–––
–––
–––
740
72
–––
–––
–––
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
Effective Output Capacitance
Effective Output Capacitance
pF ƒ = 1.0MHz, See Fig. 5
VGS = 0V,VDS = 0V to 480V
Coss eff.
Coss eff. (ER)
350
260
(Energy Related)
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
680
38
Units
Symbol
EAS
mJ
A
Avalanche Current
IAR
Repetitive Avalanche Energy
EAR
54
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.22
–––
40
Units
Rθ
Rθ
Rθ
Junction-to-Case
JC
CS
JA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.24
–––
°C/W
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 0.91mH, RG = 25Ω,
IAS = 38A, dv/dt = 13V/ns. (See Figure 12a)
ISD ≤ 38A, di/dt ≤ 630A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C.
.
.
,
2
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IRFPS38N60L
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
1
4.5V
0.1
4.5V
1
0.01
0.001
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
1000
100
I
= 38A
D
V
= 10V
GS
2.5
2.0
1.5
1.0
0.5
0.0
T
= 150°C
J
10
1
T
= 25°C
J
0.1
0.01
-60 -40 -20
0
20 40 60 80 100 120 140 160
4
6
8
10
12
14
16
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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3
IRFPS38N60L
50
45
40
35
30
25
20
15
10
5
100000
V
C
= 0V,
f = 1 MHZ
GS
iss
= C + C
,
C
SHORTED
gs
gd
ds
C
= C
rss
gd
C
= C + C
ds gd
oss
10000
1000
100
Ciss
Coss
Crss
0
10
0
100 200 300 400 500 600 700
Drain-to-Source Voltage (V)
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
DS
DS,
Fig 5. Typical Capacitance vs.
Fig 6. Typ. Output Capacitance
Drain-to-Source Voltage
Stored Energy vs. VDS
1000.00
100.00
10.00
1.00
12.0
10.0
8.0
I = 38A
D
V
V
V
= 480V
= 300V
= 120V
DS
DS
DS
T
= 150°C
J
6.0
4.0
T
= 25°C
J
2.0
V
= 0V
GS
0.10
0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, Source-to-Drain Voltage (V)
0
50
Q
100
150
200
250
V
Total Gate Charge (nC)
SD
G
Fig 8. Typical Source-Drain Diode
Fig 7. Typical Gate Charge vs.
Forward Voltage
Gate-to-Source Voltage
4
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IRFPS38N60L
1000
100
10
40
35
30
25
20
15
10
5
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100µsec
1msec
10msec
1000
1
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
0
1
10
100
10000
25
50
T
75
100
125
150
V
, Drain-to-Source Voltage (V)
, Case Temperature (°C)
DS
C
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs.
Case Temperature
RD
V
VDS
DS
90%
VGS
D.U.T.
RG
+VDD
-
10%
10V
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
t
r
t
t
f
d(on)
d(off)
Fig 11b. Switching Time Waveforms
Fig 11a. Switching Time Test Circuit
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5
IRFPS38N60L
1
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
P
DM
t
1
0.001
t
2
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
4.5
4.0
3.5
3.0
I
= 250µA
D
2.5
2.0
1.5
1.0
0.5
0.0
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
T
J
Fig 13. Threshold Voltage vs. Temperature
6
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IRFPS38N60L
1400
1200
1000
800
600
400
200
0
I
D
TOP
17A
24A
BOTTOM 38A
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V
(BR)DSS
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01Ω
t
p
I
AS
Fig 14b. Unclamped Inductive Test Circuit
Fig 14c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
Q
G
50KΩ
.2µF
VGS
V
12V
.3µF
Q
+
GS
GD
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 15b. Basic Gate Charge Waveform
Fig 15a. Gate Charge Test Circuit
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7
IRFPS38N60L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. For N-Channel HEXFET® Power MOSFETs
8
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IRFPS38N60L
SUPER TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
0.13 [.005]
0.25 [.010]
B
A
5.50 [.216]
4.50 [.178]
16.10 [.632]
15.10 [.595]
13.90 [.547]
13.30 [.524]
A
2.15 [.084]
1.45 [.058]
3.00 [.118]
2.00 [.079]
2X R
1.30 [.051]
0.70 [.028]
16.10 [.633]
15.50 [.611]
4
4
20.80 [.818]
19.80 [.780]
C
1
2
3
B
Ø1.60 [.063]
MAX.
E
E
14.80 [.582]
13.80 [.544]
4.25 [.167]
3.85 [.152]
1.30 [.051]
1.10 [.044]
3X
1.60 [.062]
3X
2.35 [.092]
1.65 [.065]
1.45 [.058]
5.45 [.215]
2X
LEAD AS S IGNME NTS
SECTION E-E
0.25 [.010]
B
A
MOS F E T
IGB T
NOTES:
1. DIMENSIONINGAND TOLERANCING PER ASME Y14.5M-1994.
2. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]
3. CONTROLLING DIMENSION: MILLIMETER
1 - GATE
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
2 - COLLECTOR
3 - EMITTER
4 - COLLECTOR
4. OUTLINE CONFORMS TO JEDEC OUTLINE TO-274AA
Super TO-247AC package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/03
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