IRFPS40N50L [INFINEON]
Power MOSFET(Vdss=500V, Rds(on)typ.=0.087ohm, Id=46A); 功率MOSFET （ VDSS = 500V ， RDS（ON） （典型值） = 0.087ohm ，ID = 46A ）
| 型号： | IRFPS40N50L |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=500V, Rds(on)typ.=0.087ohm, Id=46A) |
| 文件： | 总8页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD- 93923B
SMPS MOSFET
IRFPS40N50L
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l UninterruptIble Power Supply
l High Speed Power Switching
l ZVS and High Frequency Circuit
l PWM Inverters
VDSS
500V
RDS(on) typ.
ID
46A
0.087Ω
Benefits
l Low Gate Charge Qg results in Simple Drive Requirement
l Improved Gate, Avalanche and Dynamicdv/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche Voltage
and Current
l Low Trr and Soft Diode Recovery
l High Performance Optimised Anti-parallel Diode
SUPER TO-247AC
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
46
29
180
A
PD @TC = 25°C
Power Dissipation
540
W
W/°C
V
Linear Derating Factor
4.3
VGS
Gate-to-Source Voltage
± 30
dv/dtPeak Diode Recovery dv/dt
Operating Junction and
25
V/ns
TJ
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case )
300
°C
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
Continuous Source Current
(Body Diode)
––– ––– 46
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
––– ––– 180
integral reverse
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
––– ––– 1.5
––– 170 250
––– 220 330
V
TJ = 25°C, IS = 46A, VGS = 0V
TJ = 25°C
IF = 46A
di/dt = 100A/µs
ns
Reverse Recovery Time
Reverse Recovery Charge
TJ = 125°C
––– 705 1060 nC TJ = 25°C
Qrr
––– 1.3 2.0
––– 9.0 –––
µC TJ = 125°C
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Typical SMPS Topologies
l
Bridge Converters
l All Zero Voltage Switching
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1
05/09/01
IRFPS40N50L
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
500 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.60 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– 0.087 0.100
3.0 ––– 5.0
Ω
V
VGS = 10V, ID = 28A
VDS = VGS, ID = 250µA
VDS = 500V, VGS = 0V
––– ––– 50
––– ––– 2.0
––– ––– 100
––– ––– -100
µA
IDSS
IGSS
Drain-to-Source Leakage Current
mA VDS = 400V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
VGS = 30V
nA
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 46A
ID = 46A
nC VDS = 400V
VGS = 10V, See Fig. 6 and 13
gfs
21 ––– –––
S
Qg
––– ––– 380
––– ––– 80
––– ––– 190
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
27 –––
VDD = 250V
––– 170 –––
ID = 46A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
50 –––
69 –––
RG = 0.85Ω
VGS = 10V,See Fig. 10
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 8110 –––
––– 960 –––
––– 130 –––
––– 11200 –––
––– 240 –––
––– 420 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 400V ꢀ
Coss eff.
Avalanche Characteristics
Symbol
EAS
Parameter
Single Pulse Avalanche Energy
Typ.
Max.
920
46
Units
mJ
–––
–––
–––
IAR
Avalanche Current
A
EAR
Repetitive Avalanche Energy
54
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Typ.
–––
Max.
0.23
–––
40
Units
RθJC
RθCS
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.24
–––
°C/W
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See Fig. 11)
ꢀCoss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 0.86mH, RG = 25Ω,
as Coss while VDS is rising from 0 to 80% VDSS
IAS = 46A (See Figure 12a)
ISD ≤ 46A, di/dt ≤ 367A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C.
,
2
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IRFPS40N50L
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM4.5V
BOTTOM4.5V
4.5V
1
4.5V
1
0.1
0.01
20µs PULSE WIDTH
20µs PULSE WIDTH
°
T = 150 C
J
°
T = 25 C
J
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
47A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
°
T = 150 C
J
°
T = 25 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
0.1
-60 -40 -20
0
20 40 60 80 100 120 140 160
4
5
6
7
8
9
10
11
°
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFPS40N50L
20
15
10
5
1000000
I
D
= 47A
V
= 0V, f = 1 MHZ
GS
V
V
V
= 400V
= 250V
= 100V
C
= C + C , C
SHORTED
DS
DS
DS
iss
gs gd ds
C
= C
gd
100000
10000
1000
100
rss
C
= C + C
oss
ds gd
Ciss
Coss
Crss
10
1
10
100
1000
0
0
100
200
300
400
Q
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
10us
100us
°
T = 25 C
J
1ms
1
°
T = 25 C
10ms
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.2
1
0.7
1.2
1.7
2.2
10
100
1000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFPS40N50L
RD
50
40
30
20
10
0
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
2
DM
0.01
0.02
0.01
t
1
SINGLE PULSE
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =t / t
1
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFPS40N50L
2000
I
D
TOP
21A
30A
BOTTOM 46A
1 5V
1500
1000
500
0
DRIVER
L
V
G
DS
D.U.T
AS
R
+
V
D D
-
I
A
20V
0.01
t
Ω
p
Fig 12c. Unclamped Inductive Test Circuit
25
50
75
100
125
150
°
Starting T , Junction Temperature( C)
J
Fig 12a. Maximum Avalanche Energy
V
(BR)DSS
Vs. Drain Current
t
p
I
AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
VGS
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Basic Gate Charge Waveform
Fig 13a. Gate Charge Test Circuit
6
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IRFPS40N50L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFPS40N50L
SUPER TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
0.13 [.005]
0.25 [.010]
B
A
5.50 [.216]
4.50 [.178]
16.10 [.632]
15.10 [.595]
13.90 [.547]
13.30 [.524]
A
2.15 [.084]
1.45 [.058]
3.00 [.118]
2.00 [.079]
2X R
1.30 [.051]
0.70 [.028]
16.10 [.633]
15.50 [.611]
4
4
20.80 [.818]
19.80 [.780]
C
1
2
3
B
Ø 1.60 [.063]
MAX.
E
E
14.80 [.582]
13.80 [.544]
4.25 [.167]
3.85 [.152]
1.30 [.051]
1.10 [.044]
3X
1.60 [.062]
3X
2.35 [.092]
1.65 [.065]
1.45 [.058]
5.45 [.215]
2X
L E AD AS S I GNME NT S
SECTION E-E
0.25 [.010]
B
A
IGBT
MOS F E T
NOT ES :
1. DIMENS IONING AND TOLERANCING PER ASME Y14.5M-1994.
2. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]
3. CONT ROLLING DIMENSION: MILLIMET ER
1 - GATE
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
2 - COLLECTOR
3 - EMITTER
4 - COLLECTOR
4. OU T L INE CONF OR MS T O JE DE C OU T L INE T O-274AA
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.05/01
8
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INFINEON
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