IRFR6215TRLPBF [INFINEON]
175°C Operating Temperature; 175A ° C工作温度
| 型号： | IRFR6215TRLPBF |
| 厂家： | 
Infineon |
| 描述： | 175°C Operating Temperature |
| 文件： | 总11页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-95080A
IRFR6215PbF
IRFU6215PbF
HEXFET® Power MOSFET
l P-Channel
l 175°C Operating Temperature
l Surface Mount (IRFR6215)
l Straight Lead (IRFU6215)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
D
VDSS = -150V
RDS(on) = 0.295Ω
G
ID = -13A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
D-PAK
TO-252AA
I-PAK
TO-251AA
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
-13
-9.0
-44
A
PD @TC = 25°C
Power Dissipation
110
0.71
± 20
310
-6.6
11
W
W/°C
V
Linear Derating Factor
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
1.4
Units
RθJC
RθJA
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
50
°C/W
RθJA
110
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1
12/14/04
IRFR/U6215PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-150 ––– –––
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.20 ––– V/°C Reference to 25°C, ID = -1mA
––– ––– 0.295
––– ––– 0.58
-2.0 ––– -4.0
VGS = -10V, ID = -6.6A
VGS = -10V, ID = -6.6A TJ = 150°C
VDS = VGS, ID = -250µA
Ω
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
V
S
Forward Transconductance
3.6
––– –––
VDS = -50V, ID = -6.6A
––– ––– -25
––– ––– -250
––– ––– 100
––– ––– -100
––– ––– 66
––– ––– 8.1
––– ––– 35
VDS = -150V, VGS = 0V
IDSS
IGSS
Drain-to-Source Leakage Current
µA
nA
VDS = -120V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -20V
Qg
ID = -6.6A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = -120V
VGS = -10V, See Fig. 6 and 13
–––
–––
–––
–––
14 –––
36 –––
53 –––
37 –––
VDD = -75V
ID = -6.6A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 6.8Ω
RD = 12Ω, See Fig. 10
Between lead,
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
4.5
–––
6mm (0.25in.)
nH
pF
G
from package
––– 7.5 –––
and center of die contactꢀ
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 860 –––
––– 220 –––
––– 130 –––
Output Capacitance
VDS = -25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
-13
––– –––
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
-44
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– -1.6
––– 160 240
––– 1.2 1.7
V
TJ = 25°C, IS = -6.6A, VGS = 0V
ns
TJ = 25°C, IF = -6.6A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 14mH
Pulse width ≤ 300µs; duty cycle ≤ 2%
ꢀ This is applied for I-PAK, LS of D-PAK is measured between lead and
RG = 25Ω, IAS = -6.6A. (See Figure 12)
center of die contact
ISD ≤-6.6A, di/dt ≤ -620A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
Uses IRF6215 data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material )
For recommended footprint and soldering techniques refer to application note #AN-994
2
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IRFR/U6215PbF
100
10
1
100
10
1
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
TOP
TOP
BOTTOM - 4.5V
BOTTOM - 4.5V
-4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
= 25°C
-4.5V
T
c
T
C
= 175°C
A
A
1
10
100
1
10
100
-V , Drain-to-Source Voltage (V)
DS
-V , Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
0.0
100
I
= -11A
D
T = 25°C
J
TJ = 175°C
10
VDS = -50V
20µs PULSE WIDTH
V
= -10V
GS
1
A
10A
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
4
5
6
7
8
9
T , Junction Temperature (°C)
-VGS , Gate-to-Source Voltage (V)
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFR/U6215PbF
2000
20
16
12
8
V
C
C
C
= 0V,
f = 1MHz
I
= -6.6A
GS
iss
rss
oss
D
V
= -120V
= -75V
= -30V
= C + C
,
C
SHORTED
DS
gs
gd
ds
V
= C
gd
DS
= C + C
V
ds
gd
1600
1200
800
400
0
DS
C
iss
C
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
A
0
A
1
10
100
0
20
40
60 80
-V , Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
100
10
1
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10µs
T = 175°C
J
T = 25°C
J
100µs
1ms
T
T
J
= 25°C
= 175°C
C
Single Pulse
10ms
V
GS
= 0V
A
0.1
A
1000
0.2
0.6
1.0
1.4
1.8
1
10
100
-V , Drain-to-Source Voltage (V)
-V , Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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IRFR/U6215PbF
RD
14
12
10
8
VDS
VGS
D.U.T.
RG
-
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
4
t
t
r
t
t
f
2
d(on)
d(off)
V
GS
10%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
90%
V
DS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
t
0.02
0.01
1
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
2
1
2. Peak T = P
J
x Z
+ T
thJC
C
DM
A
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U6215PbF
800
600
400
200
0
L
I
V
D
DS
TOP
-2.7A
-4.7A
BOTTOM -6.6A
D.U.T
AS
R
G
V
DD
A
I
DRIVER
-20V
0.01
Ω
t
p
15V
Fig 12a. Unclamped Inductive Test Circuit
A
175
I
25
50
75
100
125
150
AS
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
.2µF
12V
.3µF
-10V
-
V
+
DS
Q
Q
GD
D.U.T.
GS
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U6215PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRFR/U6215PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WE E K 16
IRFU120
916A
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLYLINE "A"
12
34
LINE A
Note: "P" in assembly line position
ASSEMBLY
LOT CODE
indicates "Lead-F ree"
OR
PART NUMBER
DATE CODE
P = DE S IGNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WEEK 16
A = ASSEMBLYSITE CODE
8
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IRFR/U6215PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
WIT H AS S E MBL Y
DATE CODE
YEAR 9 = 1999
WEEK 19
RECTIFIER
LOGO
IRFU120
919A
78
LOT CODE 5678
AS SEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
AS S E MB L Y
LOT CODE
Note: "P" in ass embly line
pos i ti on i ndicates "L ead-F ree"
OR
PART NUMBER
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WEEK 19
A = ASSEMBLYSITE CODE
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9
IRFR/U6215PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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