IRFR7540 [INFINEON]
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;
| 型号： | IRFR7540 |
| 厂家： | 
Infineon |
| 描述： | The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. |
| 文件： | 总13页 (文件大小：586K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
StrongIRFET™
IRFR7540PbF
IRFU7540PbF
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
RDS(on) typ.
max
60V
4.0m
4.8m
ID (Silicon Limited)
ID (Package Limited)
110A
90A
D
S
S
D
G
G
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant
G
D
S
Gate
Drain
Source
Base part number Package Type
Standard Pack
Form
Orderable Part Number
Quantity
75
Tube
IRFR7540PbF
IRFR7540TRPbF
IRFR7540TRLPbF
IRFU7540PbF
Tape and Reel
2000
3000
75
IRFR7540PbF
IRFU7540PbF
D-Pak
I-Pak
Tape and Reel Left
Tube
20
15
10
5
125
100
75
I
= 66A
D
Limited by Package
T
= 125°C
= 25°C
J
50
25
T
J
0
0
2
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
V
Gate -to -Source Voltage (V)
T
C
, Case Temperature (°C)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRFR/U7540PbF
Absolute Maximum Rating
Symbol
Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
110
78
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
90
440*
140
0.95
± 20
PD @TC = 25°C
Maximum Power Dissipation
W
W/°C
V
Linear Derating Factor
VGS
Gate-to-Source Voltage
TJ
TSTG
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
-55 to + 175
300
°C
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
IAR
EAR
160
273
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
mJ
See Fig 15, 16, 23a, 23b
Repetitive Avalanche Energy
Thermal Resistance
Symbol
Parameter
Typ.
–––
–––
–––
Max.
1.05
50
Units
Junction-to-Case
RJC
RJA
RJA
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
°C/W
110
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
60
––– –––
V
VGS = 0V, ID = 250µA
Breakdown Voltage Temp. Coefficient
–––
–––
–––
2.1 –––
––– –––
––– ––– 150
––– ––– 100
––– ––– -100
48
4.0
5.2
––– mV/°C Reference to 25°C, ID = 1mA
V(BR)DSS/TJ
4.8
–––
3.7
1.0
V
V
GS = 10V, ID = 66A
GS = 6.0V, ID = 33A
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
m
V
VDS = VGS, ID = 100µA
DS = 60V, VGS = 0V
VDS = 60V,VGS = 0V,TJ =125°C
V
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
V
V
GS = 20V
GS = -20V
IGSS
RG
nA
–––
2.4
–––
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 90A by
source bonding technology. Note that current limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 72µH, RG = 50, IAS = 66A, VGS =10V.
ISD 66A, di/dt 1190A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
oss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
R is measured at TJ approximately 90°C.
.
C
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994.please refer to application note to AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
*
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 23A, VGS =10V.
Pulse drain current is limited at 360A by source bonding technology.
2
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IRFR/U7540PbF
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min.
200
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
–––
86
–––
130
–––
–––
–––
–––
–––
S
VDS = 10V, ID =66A
Qg
ID = 66A
Qgs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
22
VDS = 30V
VGS = 10V
nC
Qgd
27
Qsync
td(on)
tr
59
8.7
38
VDD = 30V
ID = 66A
Rise Time
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
59
32
–––
–––
–––
–––
–––
RG= 2.7
V
GS = 10V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
4360
410
260
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
pF
Effective Output Capacitance
(Energy Related)
Coss eff.(ER)
Coss eff.(TR)
–––
–––
410
530
–––
–––
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min.
Typ. Max. Units
Conditions
MOSFET symbol
D
Continuous Source Current
(Body Diode)
IS
–––
––– 110
showing the
A
G
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
ISM
–––
–––
–––
–––
440*
1.2
S
VSD
Diode Forward Voltage
V
TJ = 25°C,IS = 66A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
–––
–––
–––
–––
–––
–––
11
34
37
36
47
1.9
––– V/ns TJ = 175°C,IS = 66A,VDS = 60V
–––
–––
–––
–––
–––
TJ = 25°C
VDD = 51V
IF = 66A,
trr
Reverse Recovery Time
ns
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
TJ = 125°C
TJ = 25°C
IRRM
3
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IRFR/U7540PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
1
60µs
PULSE WIDTH
Tj = 175°C
60µs
Tj = 25°C
PULSE WIDTH
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 66A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
0.1
2
3
4
5
6
7
8
-60
-20
20
T , Junction Temperature (°C)
J
60
100
140
180
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I
= 66A
V
D
= C + C , C SHORTED
iss
gs
gd ds
12
10
8
C
= C
= 48V
= 30V
rss
gd
DS
C
= C + C
V
oss
ds
gd
DS
VDS= 12V
C
iss
6
C
oss
C
4
rss
2
0
100
0
20
40
Q , Total Gate Charge (nC)
G
60
80
100
120
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Typical Gate Charge vs.
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
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Gate-to-Source Voltage
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IRFR/U7540PbF
1000
100
10
1000
100
10
100µsec
T
= 175°C
J
Limited by Package
T
= 25°C
J
1msec
OPERATION IN THIS
AREA LIMITED BY R (on)
DS
10msec
1
1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.1
1
10
0.2
0.4
V
0.6
0.8
1.0
1.2
V
, Drain-toSource Voltage (V)
DS
, Source-to-Drain Voltage (V)
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
80
Id = 1.0mA
76
72
68
64
0
10
20
30
40
50
60
-60
-20
20
60
100
140
180
T
, Temperature ( °C )
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
17
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
14
11
8
5
2
0
50
100
150
200
I
, Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRFR/U7540PbF
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
180
160
140
120
100
80
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
= 66A
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
60
40
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
20
tav = Average time in avalanche.
0
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)· av
t
Fig 16. Maximum Avalanche Energy vs. Temperature
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IRFR/U7540PbF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
12
10
8
I
= 66A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
6
4
ID = 100µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
2
0
-60 -40 -20 0 20 40 60 80 100120140160180
0
200
400
600
800
1000
T
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
180
12
10
8
I
= 66A
= 51V
I
= 44A
=51V
F
F
160
140
120
100
80
V
V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
6
4
60
2
40
20
0
0
200
400
600
800
1000
0
100 200 300 400 500 600 700 800 9001000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
180
I
= 44A
= 51V
F
160
140
120
100
80
V
R
T = 25°C
J
T = 125°C
J
60
40
20
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRFR/U7540PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
8
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IRFR/U7540PbF
D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 1 = 2001
WEEK 16
IRFR120
116A
ASSEMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in assembly line position
ASSEMBLY
LOT CODE
indicates "Lead-Free"
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
OR
IRFR120
12 34
LOGO
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
ASSEMBLY
LOT CODE
YEAR 1 = 2001
WEEK 16
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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December 17, 2014
IRFR/U7540PbF
I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
WITH ASSEMBLY
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 1 = 2001
WEEK 19
IRFU120
119A
78
LOT CODE 5678
ASSEMBLED ON WW 19, 2001
56
IN THE ASSEMBLY LINE "A"
LINE A
ASSEMBLY
LOT CODE
Note: "P" in assembly line position
indicates Lead-Free"
OR
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56
78
YEAR 1 = 2001
ASSEMBLY
LOT CODE
WEEK 19
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFR/U7540PbF
D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFR/U7540PbF
Qualification Information†
Qualification Level
Industrial
(per JEDEC JESD47F) ††
D-Pak
I-Pak
MSL1
Moisture Sensitivity Level
RoHS Compliant
N/A
Yes
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
Updated EAS (L =1mH) = 273mJ on page 2
Updated note 10 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 23A, VGS =10V”. on page 2
Updated package outline on page 9 & 10
11/5/2014
12/17/2014
Added “IRFR7540TRLPbF” in orderable part number on page 1.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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