IRFR812TRPBF [INFINEON]
ZERO VOLTAGE SWITCHING SMPS; 零电压开关SMPS
| 型号： | IRFR812TRPBF |
| 厂家： | 
Infineon |
| 描述： | ZERO VOLTAGE SWITCHING SMPS |
| 文件： | 总9页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -97773
IRFR812TRPbF
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
• Uninterruptible Power Supplies
• Motor Control applications
Trr typ.
VDSS RDS(on)
ID
typ.
500V
75ns 3.6A
Ω
1.85
D
Features and Benefits
• Fast body diode eliminates the need for external
S
diodes in ZVS applications.
G
• Lower Gate charge results in simpler drive requirements.
• Higher Gate voltage threshold offers improved noise
immunity.
D-Pak
IRFR812TRPbF
Absolute Maximum Ratings
Parameter
Max.
3.6
Units
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
2.3
Pulsed Drain Current
IDM
14.4
78
PD @TC = 25°C Power Dissipation
Linear Derating Factor
W
0.63
± 20
W/°C
V
VGS
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
dv/dt
TJ
32
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
°C
300 (1.6mm from case )
10lb in (1.1N m)
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
––– ––– 3.6
Conditions
MOSFET symbol
D
S
I
I
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
––– ––– 14.4
SM
(Body Diode)
p-n junction diode.
V
t
T = 25°C, I = 3.6A, V = 0V
J S GS
Diode Forward Voltage
Reverse Recovery Time
––– ––– 1.2
––– 75 110
––– 94 140
V
SD
T = 25°C, I = 3.6A
ns
rr
J
F
TJ = 125°C, di/dt = 100A/μs
Q
T = 25°C, I = 3.6A, V = 0V
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– 135 200 nC
––– 220 330
rr
J
S
GS
TJ = 125°C, di/dt = 100A/μs
IRRM
T = 25°C, I = 3.6A, V = 0V
––– 3.2 4.8
A
J
S
GS
di/dt = 100A/μs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
t
on
Notes through are on page 2
www.irf.com
1
4/10/12
IRFR812TRPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250μA
500
–––
0.37
1.85
–––
–––
–––
–––
–––
–––
V
ΔV(BR)DSS/ΔTJ
RDS(on)
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 250μA
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
3.0
2.2
5.0
V
GS = 10V, ID = 2.2A
Ω
V
VGS(th)
VDS = VGS, ID = 250μA
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
25
μA
V
DS = 500V, VGS = 0V
2.0
mA
V
DS = 400V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
100
-100
nA VGS = 20V
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 2.2A
gfs
Qg
7.6
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
–––
S
20
ID = 3.6A
Qgs
Qgd
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
7.3
nC
V
DS = 400V
7.1
V
GS = 10V, See Fig.14a &14b
td(on)
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
VDD = 250V
tr
22
ns ID = 3.6A
td(off)
Turn-Off Delay Time
Fall Time
24
RG = 17Ω
tf
17
VGS = 10V, See Fig. 15a & 15b
VGS = 0V
DS = 25V
Ciss
Input Capacitance
810
47
Coss
Output Capacitance
V
Crss
Reverse Transfer Capacitance
Output Capacitance
7.3
610
16
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Coss
pF
Coss
Output Capacitance
Coss eff.
Coss eff. (ER)
Effective Output Capacitance
Effective Output Capacitance
5.9
37
VGS = 0V,VDS = 0V to 400V
(Energy Related)
Avalanche Characteristics
Symbol
Parameter
Typ.
–––
–––
–––
Max.
150
1.8
Units
mJ
A
Single Pulse Avalanche Energy
EAS
IAR
Avalanche Current
Repetitive Avalanche Energy
EAR
7.8
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
–––
–––
Max.
1.6
Units
Junction-to-Case
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
40
°C/W
110
Pulse width ≤ 300μs; duty cycle ≤ 2%.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS
Rθ is measured at TJ approximately 90°C
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 93mH, RG = 25Ω,
IAS = 1.8A. (See Figure 13).
ISD = 3.6A, di/dt ≤ 520A/μs, VDDV(BR)DSS
TJ ≤ 150°C.
.
.
,
When mounted on 1" square PCB (FR-4 or G-10 Material)
2
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IRFR812TRPbF
100
10
100
10
1
VGS
15V
10V
6.2V
5.9V
5.8V
5.6V
5.5V
5.3V
VGS
15V
10V
6.2V
5.9V
5.8V
5.6V
5.5V
TOP
TOP
BOTTOM
BOTTOM
5.3V
1
5.3V
0.1
0.01
5.3V
60μs PULSE WIDTH
≤
60μs PULSE WIDTH
Tj = 150°C
≤
Tj = 25°C
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
100
I
= 3.6A
D
V
= 50V
DS
60μs PULSE WIDTH
V
= 10V
GS
≤
2.5
2.0
1.5
1.0
0.5
0.0
10
1
T
= 150°C
J
T
= 25°C
J
0.1
-60 -40 -20
T
0
20 40 60 80 100120 140 160
4
5
6
7
8
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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3
IRFR812TRPbF
100000
650
600
550
500
V
C
= 0V,
f = 1 MHZ
GS
Id = 250uA
= C + C , C SHORTED
iss
gs
gd ds
C
= C
rss
gd
10000
1000
100
10
C
= C + C
oss
ds
gd
C
iss
C
oss
C
rss
1
1
10
100
1000
-60 -40 -20
0
20 40 60 80 100 120140 160
, Temperature ( °C )
V
, Drain-to-Source Voltage (V)
T
DS
J
Fig 5. Typical Capacitance Vs.
Fig 6. Typ. Breadown Voltage
Drain-to-Source Voltage
vs. Temperature
100
10
1
16
12
8
I
= 3.6A
D
V
V
V
= 400V
= 250V
= 100V
DS
DS
DS
T
= 150°C
J
T
= 25°C
4
J
V
= 0V
GS
0
0.1
0
4
8
12
16
0.2
0.4
0.6
0.8
1.0
Q
Total Gate Charge (nC)
G
V
, Source-to-Drain Voltage (V)
SD
4
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IRFR812TRPbF
3.0
2.5
2.0
1.5
4
3
2
1
0
V
= 20V
GS
V
= 10V
GS
25
50
75
100
125
150
0
1
2
3
4
5
6
7
T
, CaseTemperature (°C)
I
, Drain Current (A)
C
D
Fig 9. Maximum Drain Current Vs.
Fig 9. Typical Rdson Vs. Drain Current
Case Temperature
10
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
0.01
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR812TRPbF
700
600
500
400
300
200
100
0
I
D
100
TOP
0.4A
0.7A
BOTTOM 1.8A
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
10
1
100μsec
1msec
10msec
0.1
0.01
Tc = 25°C
Tj = 150°C
Single Pulse
DC
25
50
75
100
125
150
1
10
100
1000
Starting T , Junction Temperature (°C)
J
V
, Drain-toSource Voltage (V)
DS
Fig 13. Maximum Avalanche Energy
Fig 12. Maximum Safe Operating Area
vs. Drain Current
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
Ω
0.01
t
p
I
AS
Fig 13b. Unclamped Inductive Waveforms
Fig 13a. Unclamped Inductive Test Circuit
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 14b. Gate Charge Waveform
Fig 14a. Gate Charge Test Circuit
6
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IRFR812TRPbF
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+VDD
-
10%
VGS
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
td(on)
td(off)
tr
tf
Fig 15a. Switching Time Test Circuit
Fig 15b. Switching Time Waveforms
Driver Gate Drive
P.W.
Period
D =
D.U.T
Period
P.W.
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
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7
IRFR812TRPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY
INTERNATIONAL
LOT CODE 1234
RECTIFIER
ASSEMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
DATE CODE
YEAR 1 = 2001
WEEK 16
IRFR120
116A
LOGO
12
34
LINE A
Note: "P" in assembly lineposition
AS S E MB L Y
LOT CODE
indicates "Lead-F ree"
"P" in assembly lineposition indicates
"Lead-Free" qualification to theconsumer-level
PART NUMBER
DAT E CODE
INTERNATIONAL
RECTIFIER
LOGO
OR
IRFR120
12 34
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
ASSEMBLY
LOT CODE
YEAR 1 = 2001
WEEK 16
A= ASSEMBLY SITE CODE
D-Pak (TO-252AA) packages are not recommended for Surface Mount Application.
Note:For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFR812TRPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101N Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/12
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9
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