IRFU3410PBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFU3410PBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总10页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95514A
IRFR3410PbF
IRFU3410PbF
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l Lead-Free
VDSS
100V
RDS(on) max
ID
31A
39mΩ
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D-Pak
IRFR3410
I-Pak
IRFU3410
Absolute Maximum Ratings
Symbol
Parameter
Max.
Units
VDS
Drain-Source Voltage
100
V
VGS
Gate-to-Source Voltage
± 20
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
31
22
A
125
PD @TC = 25°C
PD @TA = 25°C
Maximum Power Dissipation
Maximum Power Dissipation
Linear Derating Factor
110
W
3.0
0.71
mW°C
V/ns
°C
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
15
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Thermal Resistance
Parameter
Typ.
Max.
Units
RθJC
RθJA
RθJA
Junction-to-Case
–––
–––
–––
1.4
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
40
°C/W
110
Notes through are on page 10
www.irf.com
1
12/03/04
IRFR/U3410PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance ––– 34 39 mΩ VGS = 10V, ID = 18A
––– 4.0
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
VGS(th)
Gate Threshold Voltage
2.0
V
VDS = VGS, ID = 250µA
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 20V
––– ––– 20
––– ––– 250
––– ––– 200
––– ––– -200
IDSS
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
nA
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
33 ––– –––
––– 37 56
Conditions
VDS = 25V, ID = 18A
ID = 18A
gfs
S
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
–––
–––
10 –––
11 –––
12 –––
27 –––
40 –––
13 –––
nC VDS = 50V
VGS = 10V,
VDD = 50V
ID = 18A
ns
pF
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 9.1Ω
VGS = 10V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 1690 –––
––– 220 –––
VGS = 0V
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
–––
26 –––
ƒ = 1.0MHz
––– 1640 –––
––– 130 –––
––– 250 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V ꢀ
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
Max.
140
18
Units
mJ
EAS
IAR
Avalanche Current
–––
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
––– –––
31
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
––– ––– 125
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 84 –––
––– 260 –––
V
TJ = 25°C, IS = 18A, VGS = 0V
ns
TJ = 25°C, IF = 18A
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U3410PbF
100
10
1
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
3.0
2.0
1.0
0.0
I
= 30A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
10
V
= 50V
DS
20µs PULSE WIDTH
1
4.0
5.0
6.0
7.0
8.0
9.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
V
, Gate-to-Source Voltage (V)
, Junction Temperature (°C)
GS
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFR/U3410PbF
20
16
12
8
100000
V
= 0V,
f = 1 MHZ
GS
I = 18A
D
V
= 80V
C
= C + C
,
C
SHORTED
DS
iss
gs
gd
ds
VDS= 50V
VDS= 20V
C
= C
rss
gd
C
= C + C
10000
1000
100
oss
ds
gd
Ciss
Coss
Crss
4
0
10
0
10
Q
20
30
40
50
60
1
10
100
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000.0
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100.0
10.0
1.0
T
= 175°C
J
100µsec
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
T
= 25°C
J
V
= 0V
GS
0.1
0.1
1
10
100
1000
0.0
0.5
1.0
1.5
2.0
V
, Drain-toSource Voltage (V)
V
, Source-toDrain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U3410PbF
RD
32
28
24
20
16
12
8
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
4
DS
90%
0
25
50
75
100
125
150
175
T
, Case Temperature (°C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3410PbF
250
200
150
100
50
ID
7.3A
13A
15V
TOP
BOTTOM 18A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
GS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
0
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFR/U3410PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U3410PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WEEK 16
IRFU120
916A
AS SEMBLED ON WW 16, 1999
IN THE ASSEMBLYLINE "A"
12
34
LINE A
Note: "P" in as sembly line position
ASSEMBLY
LOT CODE
indicates "L ead-F ree"
OR
PART NUMBER
DAT E CODE
P = DE S I GNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WE E K 16
A = AS S E MB L Y S I T E CODE
8
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IRFR/U3410PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
WITH ASSEMBLY
DAT E CODE
YEAR 9 = 1999
WE E K 19
RECTIFIER
LOGO
IRFU120
919A
78
LOT CODE 5678
AS SEMBLED ON WW19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
AS S E MB LY
LOT CODE
Note: "P" in assembly line
pos ition indicates "Lead-F ree"
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
AS S E MB LY
LOT CODE
WEE K 19
A = AS S E MB L Y S IT E CODE
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9
IRFR/U3410PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 0.85mH
RG = 25Ω, IAS = 18A.
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 30A.
ISD ≤ 18A, di/dt ≤ 360A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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