IRLZ34NS [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRLZ34NS |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总8页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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PD - 9.1308A
IRLZ34NS
PRELIMINARY
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Surface Mount
D
VDSS = 55V
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
RDS(on) = 0.035Ω
G
l Fully Avalanche Rated
ID = 27A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowestpossibleon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
D 2 Pak
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10Vꢀ
Continuous Drain Current, VGS @ 10Vꢀ
Pulsed Drain Current
27
19
A
110
PD @TC = 25°C
Power Dissipation
56
W
W/°C
V
Linear Derating Factor
0.37
VGS
EAS
IAR
Gate-to-Source Voltage
±16
Single Pulse Avalanche Energy ꢀ
Avalanche Current
110
mJ
A
16
5.6
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ꢀ
Operating Junction and
mJ
V/ns
10
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case)
Thermal Resistance
Parameter
Min.
––––
––––
Typ.
––––
––––
Max.
2.7
40
Units
RθJC
RθJA
Junction-to-Case
°C/W
Junction-to-Ambient (PCB Mount,steady-state)**
To Order
11/11/96
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IRLZ34NS
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.065 ––– V/°C Reference to 25°C, ID = 1mAꢀ
––– ––– 0.035
––– ––– 0.046
VGS = 10V, ID = 16A
VGS = 5.0V, ID = 16A
VGS = 4.0V, ID = 14A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 16Aꢀ
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
Ω
–––
1.0
11
––– 0.060
––– 2.0
––– –––
VGS(th)
gfs
Gate Threshold Voltage
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 25
––– ––– 5.2
––– ––– 14
µA
IDSS
IGSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA
VGS = -16V
Qg
ID = 16A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13 ꢀ
–––
8.9 –––
VDD = 28V
––– 100 –––
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
29 –––
21 –––
RG = 6.5Ω, VGS = 5.0V
RD = 1.8Ω, See Fig. 10 ꢀ
Between lead,
nH
pF
LS
Internal Source Inductance
––– 7.5 –––
and center of die contact
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 880 –––
––– 220 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
–––
94 –––
ƒ = 1.0MHz, See Fig. 5ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 27
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 110
p-n junction diode.
TJ = 25°C, IS = 16A, VGS = 0V
TJ = 25°C, IF = 16A
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 76 110
––– 190 290
V
ns
Qrr
ton
nC di/dt = 100A/µs ꢀ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Specification changes
Rev. #
Parameters Old spec. New spec.
Comments
Revision Date
1
VGS (Max.)
±20
±16
Decrease VGS ( Max). Specification
5/1/96
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Uses IRLZ34N data and test conditions
** When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
To Order
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IRLZ34NS
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TO P
12V
12V
10V
10V
8.0V
6.0V
4.0V
3.0V
8.0V
6.0V
4.0V
3.0V
BOT TOM 2.5V
BOTTOM 2.5V
2.5V
1
1
2.5V
20µs PULSE W IDTH
TJ = 25°C
20µs PULSE W IDTH
T
= 175°C
J
0.1
0.1
A
A
0.1
1
10
100
0.1
1
10
100
VD S , Drain-to-Source Voltage (V)
VD S , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3. 0
2. 5
2. 0
1. 5
1. 0
0. 5
0. 0
1 0 0 0
I
= 27A
D
1 0 0
1 0
1
T
J
= 25°C
T
= 17 5°C
J
V
= 25V
DS
V
= 10V
GS
20µs P ULSE W ID TH
0. 1
A
1 0 A
- 6 0 - 4 0 - 2 0
0
2 0
4 0
6 0
8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
2
3
4
5
6
7
8
9
TJ , Junction Tem perature (°C)
VG S , Ga te-to-So urce Voltage (V )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
To Order
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IRLZ34NS
15
12
9
1400
1200
1000
800
600
400
200
0
I
= 16A
D
V
C
C
C
= 0V,
f = 1M Hz
GS
iss
= C
= C
= C
+ C
+ C
,
C
ds
SHORTE D
gs
gd
d s
gd
V
V
= 44V
= 28V
rss
oss
DS
DS
gd
C
iss
C
C
o s s
rs s
6
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
0
4
8
12
16
20
24
28
32
1
10
100
Q G , Total Gate Charge (nC)
VD S , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1 0 0 0
1000
100
10
OPE RATION IN THIS A RE A LIMITE D
BY R
D S(o n)
1 0 0
1 0
1
10µs
T
= 175°C
J
T
= 25°C
1 00µs
J
1m s
T
T
= 25°C
= 175°C
C
J
10m s
V
= 0V
S ingle Pulse
GS
A
1
A
0. 4
0. 6
0. 8
1. 0
1. 2
1. 4
1. 6
1. 8
2. 0
1
10
100
V
, Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
To Order
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IRLZ34NS
3 0
2 5
2 0
1 5
1 0
5
RD
VDS
VGS
D.U.T.
RG
+VDD
-
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
A
1 7 5
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
TC , Case Tem perature (°C)
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D
= 0.5 0
0.2 0
1
0 .1 0
0.05
P
D M
0.02
0.01
0.1
t
1
t
SIN G LE PU LSE
(TH ER M AL R ESPO NS E)
2
N o te s:
1 . D u ty fac to r D
=
t
/ t
2
1
Z
2 . Pe a k T
=
P
x
+ T
th JC C
D M
J
A
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
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IRLZ34NS
250
200
150
100
50
L
I
D
V
DS
TOP
6.6A
11A
BOTTOM 16A
D.U.T.
R
+
-
G
V
DD
I
5.0 V
AS
t
p
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V
= 25V
50
D D
V
(BR)DSS
0
A
175
25
75
100
125
150
t
p
Starting TJ , Junction Temperature (°C)
V
DD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
V
DS
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
G
.3µF
+
5.0 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
To Order
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IRLZ34NS
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V *
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
To Order
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IRLZ34NS
D2Pak Package Details
10.54 (.415)
10.29 (.405)
- B
-
10.16 (.400)
R EF .
4.69 (.185)
4.20 (.165)
1.40 (.055)
MA X.
-
A
2
-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.18 (.243)
1.78 (.070)
1.27 (.050)
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
1
3
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
8.89 (.350)
R EF .
1.40 (.055)
1.14 (.045)
1.39 (.055)
1.14 (.045)
3X
0.55 (.022)
0.46 (.018)
0.93 (.037)
0.69 (.027)
3X
5.08 (.200)
0.25 (.010)
M
B
A
M
M IN IM U M R EC OM M EN D ED F OOT PR IN T
11.43 (.450)
8.89 (.350)
N OT ES:
LE AD ASSIGN M EN T S
1
2
3
-
-
-
GAT E
D RA IN
SOU R C E
1
2
3
4
D IME NS IO N S AF TE R SO LD ER D IP.
D IME NS IO N IN G T OLER AN C IN G PER AN SI Y14.5M, 1982.
C ON T RO LLIN G D IM ENS IO N : IN CH .
17.78 (.700)
&
H EA TSIN K
&
LEA D D IM E N SIO NS DO NO T INC LU D E BU R R S.
3.81 (.150)
T R R
2.54 (.100)
2.08 (.082)
2X
1.60 (.063)
1.50 (.059)
1.60 (.063)
2X
4.10 (.161)
3.90 (.153)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
Part Marking
(This is an IRF530S with assembly lot
code 9B1M )
F E E D D IR E C T IO N
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
T R L
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
A
IN TERN ATION AL
R EC TIFIER
LO GO
PAR T N U M BER
F
E E D D IR E C T IO N
F 53 0 S
9 24 6
1 M
Tape & Reel
D ATE C O DE
(YYW W )
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
9B
ASSEM BL Y
4
YY
=
YEAR
= W EEK
L OT
C OD E
W W
330.00
(14.173)
M A X.
60.00 (2.362)
M IN.
30.40 (1.197)
M A X.
NO TES
:
1. COM F ORM S TO EIA-418.
2. CON TROLLING DIM ENS IO N: M ILLIM ETE R.
3. DIM E NS IO N M E AS URED
4. INCLUDES FLAN GE DIS TORT ION
26.40 (1.039)
24.40 (.961)
4
@ HUB .
3
@
O UTE R E DGE .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
11/96
To Order
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