ISC010N06NM5 [INFINEON]
英飞凌 OptiMOS™ 5 功率 MOSFET 60 V 采用 SuperSO8 封装 (ISC010N06NM5)，具备低导通电阻 RDS(on)（25˚C 和 175˚C 下）和高连续电流（可达 330 A）。英飞凌 OptiMOS™ 3 和 5 产品系列新增 SuperSO8 封装型 OptiMOS™ MOSFET，器件功率密度和稳健性更高，可降低系统成本并增强性能。低反向恢复电荷 (Qrr) 将大幅降低电压过冲，因此无需使用吸收电路，进而可减少工程成本和工作量，提高系统可靠性。;
| 型号： | ISC010N06NM5 |
| 厂家： | 
Infineon |
| 描述： | 英飞凌 OptiMOS™ 5 功率 MOSFET 60 V 采用 SuperSO8 封装 (ISC010N06NM5)，具备低导通电阻 RDS(on)（25˚C 和 175˚C 下）和高连续电流（可达 330 A）。英飞凌 OptiMOS™ 3 和 5 产品系列新增 SuperSO8 封装型 OptiMOS™ MOSFET，器件功率密度和稳健性更高，可降低系统成本并增强性能。低反向恢复电荷 (Qrr) 将大幅降低电压过冲，因此无需使用吸收电路，进而可减少工程成本和工作量，提高系统可靠性。 |
| 文件： | 总11页 (文件大小：984K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISC010N06NM5
MOSFET
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
PG-TSON-8-3
8
7
5
6
6
Features
7
5
8
•ꢀOptimizedꢀforꢀsynchronousꢀrectification
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
Pin 1
2
4
3
3
4
2
1
•ꢀN-channel
•ꢀ175°Cꢀrated
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
•ꢀHigherꢀsolderꢀjointꢀreliabilityꢀdueꢀtoꢀenlargedꢀsourceꢀinterconnection
Productꢀvalidation
Drain
Pin 5-8
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
*1
Gate
Pin 4
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
Source
Pin 1-3
*1: Internal body diode
VDS
60
V
RDS(on),max
ID
1.05
330
123
115
mΩ
A
Qoss
nC
nC
QG(0V..10V)
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
ISC010N06NM5
PG-TSON-8-3
010N06N
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
-
-
-
-
-
-
330
233
39
Continuous drain current1)
ID
A
VGS=10ꢀV,ꢀTA=25ꢀ°C,
RthJA=50ꢀ°C/W2)
Pulsed drain current3)
Avalanche energy, single pulse4)
ID,pulse
EAS
-
-
-
-
1320
911
20
A
TC=25ꢀ°C
-
mJ
V
ID=50ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
-
-
-
-
-
214
3.0
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=50ꢀ°C/W2)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJC
RthJA
-
0.35
0.7
°C/W -
°C/W -
°C/W -
Thermal resistance, junction - case,
top
-
-
-
-
20
50
Device on PCB,
6 cm² cooling area2)
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
60
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
2.1
2.8
3.3
VDS=VGS,ꢀID=147ꢀµA
-
-
0.5
10
1
100
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
0.87
1.23
1.05
1.45
VGS=10ꢀV,ꢀID=50ꢀA
VGS=6ꢀV,ꢀID=12.5ꢀA
RDS(on)
mΩ
Gate resistance
Transconductance1)
RG
gfs
-
2.2
3.3
-
Ω
-
85
170
S
|VDS|≥2|ID|RDS(on)max,ꢀID=50ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
8300 11000 pF
1800 2300 pF
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
71
11
120
-
pF
ns
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
15
54
31
-
-
-
ns
ns
ns
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=50ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
35
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge1)
Switching charge
Qgs
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=30ꢀV,ꢀID=50ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV
Qg(th)
Qgd
23
-
21
31
Qsw
32
-
Gate charge total1)
Qg
115
4.2
143
Gate plateau voltage
Gate charge total, sync. FET
Output charge1)
Vplateau
Qg(sync)
Qoss
-
102
123
-
nC
nC
163
VDS=30ꢀV,ꢀVGS=0ꢀV
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
151
1320
1.2
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.82
41
V
VGS=0ꢀV,ꢀIF=50ꢀA,ꢀTj=25ꢀ°C
VR=30ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=30ꢀV,ꢀIF=50ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
82
ns
nC
Qrr
170
340
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
240
360
320
280
240
200
160
120
80
200
160
120
80
40
40
0
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
175
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
104
101
single pulse
0.01
0.02
1 µs
103
102
101
100
10-1
10-2
0.05
0.1
0.2
0.5
100
10 µs
1 ms
100 µs
10-1
10-2
10-3
DC
10 ms
10-1
100
101
102
10-6
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
1400
2.4
8 V
2.2
1200
10 V
7 V
6.5 V
2.0
1000
800
600
400
200
0
5 V
1.8
6 V
1.6
5.5 V
1.4
5.5 V
5 V
6 V
1.2
1.0
0.8
6.5 V
7 V
8 V
10 V
0
1
2
3
4
5
0
50
100
150
200
250
300
350
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀtransconductance
1400
450
400
350
300
250
200
150
100
50
1200
1000
800
600
400
200
0
25 °C
175 °C
0
0
1
2
3
4
5
6
7
0
50
100
150
200
250
300
350
VGSꢀ[V]
IDꢀ[A]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
gfs=f(ID),ꢀVDS=25ꢀV,ꢀTj=25ꢀ°C
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.0
3.6
1.8
1.6
1.4
1.2
1.0
0.8
0.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
1470 µA
147 µA
-75 -50 -25
0
25
50
75 100 125 150 175
-75 -50 -25
0
25
50
75 100 125 150 175
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=50ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
105
104
25 °C
25 °C, max
175 °C
175 °C, max
104
103
102
101
Ciss
103
102
101
Coss
Crss
0
10
20
30
40
50
60
0.0
0.5
1.0
1.5
2.0
2.5
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
12 V
30 V
48 V
9
8
25 °C
7
6
5
4
3
2
1
0
100 °C
150 °C
101
100
100
101
102
103
0
25
50
75
100
125
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=50ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
65
64
63
62
61
60
59
58
57
-75 -50 -25
0
25
50
75 100 125 150 175
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
5ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B00187559
MILLIMETERS
DIMENSION
REVISION
MIN.
MAX.
1.10
0.54
0.05
01
A
b
-
0.34
-
SCALE 10:1
b1
c
0.20
0
1
2mm
D
4.90
4.25
5.90
4.00
3.14
0.20
5.10
4.45
6.10
4.20
3.34
0.40
D1
E
EUROPEAN PROJECTION
E1
E2
E3
e
1.27
(0.37)
K2
L
0.60
0.43
0.80
0.63
ISSUE DATE
14.12.2017
L1
L2
(0.25)
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TSON-8-3,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2021-08-27
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC010N06NM5
RevisionꢀHistory
ISC010N06NM5
Revision:ꢀ2021-08-27,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2021-08-27
Trademarks
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Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
TechnologiesꢀOfficeꢀ(www.infineon.com).
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2021-08-27
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ISC012N04LM6
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