ISC0703NLS [INFINEON]
OptiMOS™ PD 功率 MOSFET 是英飞凌针对 USB-PD 和适配器应用推出的产品组合。产品上量迅速，交付周期短。供电用 OptiMOS™ 低压 MOSFET 可精简设计元件用量，进而降低物料成本。OptiMOS™ PD 采用紧凑型轻量封装，打造优质产品。;
| 型号： | ISC0703NLS |
| 厂家： | 
Infineon |
| 描述： | OptiMOS™ PD 功率 MOSFET 是英飞凌针对 USB-PD 和适配器应用推出的产品组合。产品上量迅速，交付周期短。供电用 OptiMOS™ 低压 MOSFET 可精简设计元件用量，进而降低物料成本。OptiMOS™ PD 采用紧凑型轻量封装，打造优质产品。 光电二极管 |
| 文件： | 总11页 (文件大小：1212K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISC0703NLS
MOSFET
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
PG-TDSON-8
8
5
7
6
Features
•ꢀIdealꢀforꢀhigh-frequencyꢀswitching
•ꢀOptimizedꢀforꢀchargers
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
6
7
5
4
8
Pin 1
2
3
3
•ꢀN-channel,ꢀlogicꢀlevel
2
4
1
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
•ꢀQualifiedꢀforꢀstandardꢀgradeꢀapplications
Productꢀvalidation
Drain
Pin 5-8
QualifiedꢀaccordingꢀtoꢀJEDECꢀStandard
*1
Gate
Pin 4
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
Source
Pin 1-3
*1: Internal body diode
VDS
60
V
RDS(on),max
ID
6.9
57
mΩ
A
Qoss
15
nC
nC
QG(0V..4.5V)
8.7
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
ISC0703NLS
PG-TDSON-8
0703NL
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
-
-
-
-
-
-
57
40
13
Continuous drain current1)
ID
A
VGS=10ꢀV,ꢀTA=25ꢀ°C,
RthJA=50ꢀ°C/W2)
Pulsed drain current3)
Avalanche energy, single pulse4)
ID,pulse
EAS
-
-
-
-
228
13
A
TA=25ꢀ°C
-
mJ
V
ID=32ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
20
-
-
-
-
-
44
3.0
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=50ꢀ°C/W2)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJC
RthJA
-
2.5
3.4
°C/W -
°C/W -
°C/W -
Thermal resistance, junction - case,
top
-
-
-
-
20
50
Device on PCB,
6 cm² cooling area 2)
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
60
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
VDS=VGS,ꢀID=15ꢀµA
1.1
1.6
2.3
-
-
0.1
10
1
100
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
5.8
7.6
6.9
8.9
VGS=10ꢀV,ꢀID=32ꢀA
VGS=4.5ꢀV,ꢀID=16ꢀA
RDS(on)
mΩ
Gate resistance1)
Transconductance
RG
gfs
-
-
1.2
65
-
-
Ω
-
S
|VDS|≥2|ID|RDS(on)max,ꢀID=32ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
1100 1400 pF
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz
250
14
320
24
pF
pF
VDD=30ꢀV,ꢀVGS=4.5ꢀV,ꢀID=32ꢀA,
RG,ext=3ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
3.0
2.0
9.4
2.8
-
-
-
-
ns
ns
ns
ns
VDD=30ꢀV,ꢀVGS=4.5ꢀV,ꢀID=32ꢀA,
RG,ext=3ꢀΩ
VDD=30ꢀV,ꢀVGS=4.5ꢀV,ꢀID=32ꢀA,
RG,ext=3ꢀΩ
Turn-off delay time
Fall time
VDD=30ꢀV,ꢀVGS=4.5ꢀV,ꢀID=32ꢀA,
RG,ext=3ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
3.3
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
Qgs
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=30ꢀV,ꢀID=32ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV
Qg(th)
Qgd
1.7
-
3.1
-
Qsw
4.6
-
Gate charge total1)
Qg
8.7
11
-
Gate plateau voltage
Gate charge total1)
Vplateau
Qg
3.0
17
23
-
nC
nC
nC
Gate charge total, sync. FET
Output charge
Qg(sync)
Qoss
15
15
-
VDS=30ꢀV,ꢀVGS=0ꢀV
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
41
228
1.1
-
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.88
28
21
V
VGS=0ꢀV,ꢀIF=32ꢀA,ꢀTj=25ꢀ°C
VR=30ꢀV,ꢀIF=32ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=30ꢀV,ꢀIF=32ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
-
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
50
60
50
40
30
20
10
0
40
30
20
10
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
175
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
101
single pulse
0.01
0.02
0.05
1 µs
102
101
0.1
0.2
0.5
10 µs
100 µs
100
DC
1 ms
100
10 ms
10-1
10-2
10-1
10-1
100
101
102
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
240
10 V
5 V
20
18
2.8 V
200
4.5 V
16
3.5 V
3 V
160
14
12
10
8
4 V
120
80
40
0
4 V
5 V
3.5 V
4.5 V
6
4
3 V
2.8 V
10 V
0
1
2
3
4
5
0
10
20
30
40
50
60
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
240
28
24
20
16
200
160
120
80
25 °C
175 °C
12
175 °C
8
25 °C
40
4
0
0
0
1
2
3
4
5
0
4
8
12
16
20
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=32ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.4
2.4
2.0
1.6
1.2
0.8
0.4
2.0
1.6
1.2
0.8
0.4
150 µA
15 µA
-75 -50 -25
0
25
50
75 100 125 150 175
-75 -50 -25
0
25
50
75 100 125 150 175
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=32ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
25 °C, max
175 °C
175 °C, max
103
102
101
100
Ciss
102
101
100
Coss
Crss
0
10
20
30
40
50
60
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
12 V
30 V
48 V
8
6
4
2
0
101
25 °C
100 °C
150 °C
100
10-1
10-2
10-1
100
101
102
103
0
2
4
6
8
10
12
14
16
18
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=32ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
65
64
63
62
61
60
59
58
57
-75 -50 -25
0
25
50
75 100 125 150 175
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
5ꢀꢀꢀꢀꢀPackageꢀOutlines
PACKAGE - GROUP
NUMBER:
PG-TDSON-8-U08
REVISION: 01
DATE: 12.02.2021
MILLIMETERS
DIMENSIONS
MIN.
MAX.
1.20
0.54
0.35
5.35
4.40
0.22
6.10
4.25
A
b
0.90
0.34
0.15
4.80
3.90
0.00
5.70
4.05
c
D
D1
D2
E
E1
e
1.27
L
0.45
0.45
0.65
0.65
L1
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2021-03-15
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV
ISC0703NLS
RevisionꢀHistory
ISC0703NLS
Revision:ꢀ2021-03-15,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2021-03-15
Trademarks
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documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.
Information
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon
TechnologiesꢀOfficeꢀ(www.infineon.com).
Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2021-03-15
相关型号：
ISC073N12LM6
This is a logic level 120 V MOSFET in SuperSO8 packaging with 7.3 mOhm on-resistance. ISC073N12LM6 is part of Infineon’s OptiMOS™ 6 power MOSFET family.
INFINEON
ISC080N10NM6
正常电平 ISC080N10NM6 OptiMOS™ 6 系列 100 V 器件在分立式功率 MOSFET 领域树立了全新技术标准。相较于替代产品，英飞凌的领先薄晶圆技术显示出卓越性能优势。
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ISC1008ER1R0M
General Fixed Inductor, 1 ELEMENT, 1 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP, 1414, ROHS COMPLIANT
VISHAY
ISC1008ER220M
General Fixed Inductor, 1 ELEMENT, 22 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP, 1414, ROHS COMPLIANT
VISHAY
ISC104N12LM6
This is a logic level 120 V MOSFET in SuperSO8 packaging with 10.4 mOhm on-resistance. ISC104N12LM6 is part of Infineon’s OptiMOS™ 6 power MOSFET family.
INFINEON
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